1 // SPDX-License-Identifier: GPL-2.0
3 * Mediatek "glue layer"
5 * Copyright (C) 2019-2021 by Mediatek
6 * Based on the AllWinner SUNXI "glue layer" code.
7 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
8 * Copyright (C) 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
10 * This file is part of the Inventra Controller Driver for Linux.
17 #include <linux/usb/musb.h>
19 #include "linux-compat.h"
20 #include "musb_core.h"
21 #include "musb_uboot.h"
23 #define DBG_I(fmt, ...) \
24 pr_info(fmt, ##__VA_ARGS__)
26 struct mtk_musb_config {
27 struct musb_hdrc_config *config;
30 struct mtk_musb_glue {
31 struct musb_host_data mdata;
35 struct mtk_musb_config *cfg;
39 #define to_mtk_musb_glue(d) container_of(d, struct mtk_musb_glue, dev)
41 /******************************************************************************
43 ******************************************************************************/
44 #define USB20_PHY_BASE 0x11110800
45 #define USBPHY_READ8(offset) \
46 readb((void *)(USB20_PHY_BASE + (offset)))
47 #define USBPHY_WRITE8(offset, value) \
48 writeb(value, (void *)(USB20_PHY_BASE + (offset)))
49 #define USBPHY_SET8(offset, mask) \
50 USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask))
51 #define USBPHY_CLR8(offset, mask) \
52 USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) & (~(mask)))
54 static void mt_usb_phy_poweron(void)
57 * switch to USB function.
58 * (system register, force ip into usb mode).
60 USBPHY_CLR8(0x6b, 0x04);
61 USBPHY_CLR8(0x6e, 0x01);
62 USBPHY_CLR8(0x21, 0x03);
64 /* RG_USB20_BC11_SW_EN = 1'b0 */
65 USBPHY_SET8(0x22, 0x04);
66 USBPHY_CLR8(0x1a, 0x80);
68 /* RG_USB20_DP_100K_EN = 1'b0 */
69 /* RG_USB20_DP_100K_EN = 1'b0 */
70 USBPHY_CLR8(0x22, 0x03);
73 USBPHY_SET8(0x20, 0x10);
74 /* release force suspendm */
75 USBPHY_CLR8(0x6a, 0x04);
79 /* force enter device mode */
80 USBPHY_CLR8(0x6c, 0x10);
81 USBPHY_SET8(0x6c, 0x2E);
82 USBPHY_SET8(0x6d, 0x3E);
85 static void mt_usb_phy_savecurrent(void)
88 * switch to USB function.
89 * (system register, force ip into usb mode).
91 USBPHY_CLR8(0x6b, 0x04);
92 USBPHY_CLR8(0x6e, 0x01);
93 USBPHY_CLR8(0x21, 0x03);
95 /* release force suspendm */
96 USBPHY_CLR8(0x6a, 0x04);
97 USBPHY_SET8(0x68, 0x04);
98 /* RG_DPPULLDOWN./RG_DMPULLDOWN. */
99 USBPHY_SET8(0x68, 0xc0);
100 /* RG_XCVRSEL[1:0] = 2'b01 */
101 USBPHY_CLR8(0x68, 0x30);
102 USBPHY_SET8(0x68, 0x10);
103 /* RG_TERMSEL = 1'b1 */
104 USBPHY_SET8(0x68, 0x04);
105 /* RG_DATAIN[3:0] = 4'b0000 */
106 USBPHY_CLR8(0x69, 0x3c);
109 * force_dp_pulldown, force_dm_pulldown,
110 * force_xcversel, force_termsel.
112 USBPHY_SET8(0x6a, 0xba);
114 /* RG_USB20_BC11_SW_EN = 1'b0 */
115 USBPHY_CLR8(0x1a, 0x80);
116 /* RG_USB20_OTG_VBUSSCMP_EN = 1'b0 */
117 USBPHY_CLR8(0x1a, 0x10);
121 USBPHY_CLR8(0x6a, 0x04);
122 /* rg_usb20_pll_stable = 1 */
123 //USBPHY_SET8(0x63, 0x02);
127 /* force suspendm = 1 */
128 //USBPHY_SET8(0x6a, 0x04);
131 static void mt_usb_phy_recover(void)
133 /* clean PUPD_BIST_EN */
134 /* PUPD_BIST_EN = 1'b0 */
135 /* PMIC will use it to detect charger type */
136 USBPHY_CLR8(0x1d, 0x10);
138 /* force_uart_en = 1'b0 */
139 USBPHY_CLR8(0x6b, 0x04);
140 /* RG_UART_EN = 1'b0 */
141 USBPHY_CLR8(0x6e, 0x01);
142 /* force_uart_en = 1'b0 */
143 USBPHY_CLR8(0x6a, 0x04);
145 USBPHY_CLR8(0x21, 0x03);
146 USBPHY_CLR8(0x68, 0xf4);
148 /* RG_DATAIN[3:0] = 4'b0000 */
149 USBPHY_CLR8(0x69, 0x3c);
151 USBPHY_CLR8(0x6a, 0xba);
153 /* RG_USB20_BC11_SW_EN = 1'b0 */
154 USBPHY_CLR8(0x1a, 0x80);
155 /* RG_USB20_OTG_VBUSSCMP_EN = 1'b1 */
156 USBPHY_SET8(0x1a, 0x10);
159 USBPHY_CLR8(0x18, 0x08);
160 USBPHY_SET8(0x18, 0x06);
163 /* force enter device mode */
164 //USBPHY_CLR8(0x6c, 0x10);
165 //USBPHY_SET8(0x6c, 0x2E);
166 //USBPHY_SET8(0x6d, 0x3E);
168 /* enable VRT internal R architecture */
169 /* RG_USB20_INTR_EN = 1'b1 */
170 USBPHY_SET8(0x00, 0x20);
173 /******************************************************************************
175 ******************************************************************************/
177 static irqreturn_t mtk_musb_interrupt(int irq, void *__hci)
179 struct musb *musb = __hci;
180 irqreturn_t retval = IRQ_NONE;
182 /* read and flush interrupts */
183 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
184 // last_int_usb = musb->int_usb;
186 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
187 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
189 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
190 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
192 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
194 if (musb->int_usb || musb->int_tx || musb->int_rx)
195 retval |= musb_interrupt(musb);
200 /* musb_core does not call enable / disable in a balanced manner <sigh> */
203 static int mtk_musb_enable(struct musb *musb)
205 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
207 DBG_I("%s():\n", __func__);
209 musb_ep_select(musb->mregs, 0);
210 musb_writeb(musb->mregs, MUSB_FADDR, 0);
215 mt_usb_phy_recover();
222 static void mtk_musb_disable(struct musb *musb)
224 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
227 DBG_I("%s():\n", __func__);
232 mt_usb_phy_savecurrent();
237 static int mtk_musb_init(struct musb *musb)
239 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
242 DBG_I("%s():\n", __func__);
244 ret = clk_enable(&glue->usbpllclk);
246 dev_err(dev, "failed to enable usbpll clock\n");
249 ret = clk_enable(&glue->usbmcuclk);
251 dev_err(dev, "failed to enable usbmcu clock\n");
254 ret = clk_enable(&glue->usbclk);
256 dev_err(dev, "failed to enable usb clock\n");
260 musb->isr = mtk_musb_interrupt;
265 static int mtk_musb_exit(struct musb *musb)
267 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
269 clk_disable(&glue->usbclk);
270 clk_disable(&glue->usbmcuclk);
271 clk_disable(&glue->usbpllclk);
276 static const struct musb_platform_ops mtk_musb_ops = {
277 .init = mtk_musb_init,
278 .exit = mtk_musb_exit,
279 .enable = mtk_musb_enable,
280 .disable = mtk_musb_disable,
283 /* MTK OTG supports up to 7 endpoints */
284 #define MTK_MUSB_MAX_EP_NUM 8
285 #define MTK_MUSB_RAM_BITS 16
287 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
288 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
289 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
290 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
291 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
292 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
293 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
294 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
295 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
296 MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
297 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
298 MUSB_EP_FIFO_SINGLE(6, FIFO_TX, 512),
299 MUSB_EP_FIFO_SINGLE(6, FIFO_RX, 512),
300 MUSB_EP_FIFO_SINGLE(7, FIFO_TX, 512),
301 MUSB_EP_FIFO_SINGLE(7, FIFO_RX, 512),
304 static struct musb_hdrc_config musb_config = {
305 .fifo_cfg = mtk_musb_mode_cfg,
306 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
309 .num_eps = MTK_MUSB_MAX_EP_NUM,
310 .ram_bits = MTK_MUSB_RAM_BITS,
313 static int musb_usb_probe(struct udevice *dev)
315 struct mtk_musb_glue *glue = dev_get_priv(dev);
316 struct musb_host_data *host = &glue->mdata;
317 struct musb_hdrc_platform_data pdata;
318 void *base = dev_read_addr_ptr(dev);
321 DBG_I("%s():\n", __func__);
323 #ifdef CONFIG_USB_MUSB_HOST
324 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
330 glue->cfg = (struct mtk_musb_config *)dev_get_driver_data(dev);
334 ret = clk_get_by_name(dev, "usbpll", &glue->usbpllclk);
336 dev_err(dev, "failed to get usbpll clock\n");
339 ret = clk_get_by_name(dev, "usbmcu", &glue->usbmcuclk);
341 dev_err(dev, "failed to get usbmcu clock\n");
344 ret = clk_get_by_name(dev, "usb", &glue->usbclk);
346 dev_err(dev, "failed to get usb clock\n");
350 memset(&pdata, 0, sizeof(pdata));
351 pdata.power = (u8)400;
352 pdata.platform_ops = &mtk_musb_ops;
353 pdata.config = glue->cfg->config;
355 #ifdef CONFIG_USB_MUSB_HOST
356 priv->desc_before_addr = true;
358 pdata.mode = MUSB_HOST;
359 host->host = musb_init_controller(&pdata, &glue->dev, base);
363 ret = musb_lowlevel_init(host);
365 printf("MTK MUSB OTG (Host)\n");
367 pdata.mode = MUSB_PERIPHERAL;
368 host->host = musb_register(&pdata, &glue->dev, base);
372 printf("MTK MUSB OTG (Peripheral)\n");
375 mt_usb_phy_poweron();
380 static int musb_usb_remove(struct udevice *dev)
382 struct mtk_musb_glue *glue = dev_get_priv(dev);
383 struct musb_host_data *host = &glue->mdata;
385 musb_stop(host->host);
392 static const struct mtk_musb_config mt8518_cfg = {
393 .config = &musb_config,
396 static const struct udevice_id mtk_musb_ids[] = {
397 { .compatible = "mediatek,mt8518-musb",
398 .data = (ulong)&mt8518_cfg },
402 U_BOOT_DRIVER(mtk_musb) = {
404 #ifdef CONFIG_USB_MUSB_HOST
407 .id = UCLASS_USB_GADGET_GENERIC,
409 .of_match = mtk_musb_ids,
410 .probe = musb_usb_probe,
411 .remove = musb_usb_remove,
412 #ifdef CONFIG_USB_MUSB_HOST
413 .ops = &musb_usb_ops,
415 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
416 .priv_auto_alloc_size = sizeof(struct mtk_musb_glue),