drivers/usb/host/xhci-rcar.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
   4  *
   5  * Renesas RCar USB HOST xHCI Controller
   6  */
   7
   8 #include <common.h>
   9 #include <clk.h>
  10 #include <dm.h>
  11 #include <fdtdec.h>
  12 #include <log.h>
  13 #include <malloc.h>
  14 #include <usb.h>
  15 #include <wait_bit.h>
  16 #include <dm/device_compat.h>
  17
  18 #include <usb/xhci.h>
  19 #include "xhci-rcar-r8a779x_usb3_v3.h"
  20
  21 /* Register Offset */
  22 #define RCAR_USB3_DL_CTRL       0x250   /* FW Download Control & Status */
  23 #define RCAR_USB3_FW_DATA0      0x258   /* FW Data0 */
  24
  25 /* Register Settings */
  26 /* FW Download Control & Status */
  27 #define RCAR_USB3_DL_CTRL_ENABLE        BIT(0)
  28 #define RCAR_USB3_DL_CTRL_FW_SUCCESS    BIT(4)
  29 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0  BIT(8)
  30
  31 struct rcar_xhci_platdata {
  32         fdt_addr_t      hcd_base;
  33         struct clk      clk;
  34 };
  35
  36 /**
  37  * Contains pointers to register base addresses
  38  * for the usb controller.
  39  */
  40 struct rcar_xhci {
  41         struct xhci_ctrl ctrl;  /* Needs to come first in this struct! */
  42         struct usb_platdata usb_plat;
  43         struct xhci_hccr *hcd;
  44 };
  45
  46 static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
  47                                  const size_t fw_array_size)
  48 {
  49         void __iomem *regs = (void __iomem *)ctx->hcd;
  50         int i, ret;
  51
  52         /* Download R-Car USB3.0 firmware */
  53         setbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
  54
  55         for (i = 0; i < fw_array_size; i++) {
  56                 writel(fw_data[i], regs + RCAR_USB3_FW_DATA0);
  57                 setbits_le32(regs + RCAR_USB3_DL_CTRL,
  58                              RCAR_USB3_DL_CTRL_FW_SET_DATA0);
  59
  60                 ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
  61                                         RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
  62                                         10, false);
  63                 if (ret)
  64                         break;
  65         }
  66
  67         clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
  68
  69         ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
  70                                 RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
  71                                 10, false);
  72
  73         return ret;
  74 }
  75
  76 static int xhci_rcar_probe(struct udevice *dev)
  77 {
  78         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
  79         struct rcar_xhci *ctx = dev_get_priv(dev);
  80         struct xhci_hcor *hcor;
  81         int len, ret;
  82
  83         ret = clk_get_by_index(dev, 0, &plat->clk);
  84         if (ret < 0) {
  85                 dev_err(dev, "Failed to get USB3 clock\n");
  86                 return ret;
  87         }
  88
  89         ret = clk_enable(&plat->clk);
  90         if (ret) {
  91                 dev_err(dev, "Failed to enable USB3 clock\n");
  92                 goto err_clk;
  93         }
  94
  95         ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
  96         len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
  97         hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len);
  98
  99         ret = xhci_rcar_download_fw(ctx, firmware_r8a779x_usb3_v3,
 100                                     ARRAY_SIZE(firmware_r8a779x_usb3_v3));
 101         if (ret) {
 102                 dev_err(dev, "Failed to download firmware\n");
 103                 goto err_fw;
 104         }
 105
 106         ret = xhci_register(dev, ctx->hcd, hcor);
 107         if (ret) {
 108                 dev_err(dev, "Failed to register xHCI\n");
 109                 goto err_fw;
 110         }
 111
 112         return 0;
 113
 114 err_fw:
 115         clk_disable(&plat->clk);
 116 err_clk:
 117         clk_free(&plat->clk);
 118         return ret;
 119 }
 120
 121 static int xhci_rcar_deregister(struct udevice *dev)
 122 {
 123         int ret;
 124         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
 125
 126         ret = xhci_deregister(dev);
 127
 128         clk_disable(&plat->clk);
 129         clk_free(&plat->clk);
 130
 131         return ret;
 132 }
 133
 134 static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
 135 {
 136         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
 137
 138         plat->hcd_base = devfdt_get_addr(dev);
 139         if (plat->hcd_base == FDT_ADDR_T_NONE) {
 140                 debug("Can't get the XHCI register base address\n");
 141                 return -ENXIO;
 142         }
 143
 144         return 0;
 145 }
 146
 147 static const struct udevice_id xhci_rcar_ids[] = {
 148         { .compatible = "renesas,xhci-r8a7795" },
 149         { .compatible = "renesas,xhci-r8a7796" },
 150         { .compatible = "renesas,xhci-r8a77965" },
 151         { }
 152 };
 153
 154 U_BOOT_DRIVER(usb_xhci) = {
 155         .name           = "xhci_rcar",
 156         .id             = UCLASS_USB,
 157         .probe          = xhci_rcar_probe,
 158         .remove         = xhci_rcar_deregister,
 159         .ops            = &xhci_usb_ops,
 160         .of_match       = xhci_rcar_ids,
 161         .ofdata_to_platdata = xhci_rcar_ofdata_to_platdata,
 162         .platdata_auto_alloc_size = sizeof(struct rcar_xhci_platdata),
 163         .priv_auto_alloc_size = sizeof(struct rcar_xhci),
 164         .flags          = DM_FLAG_ALLOC_PRIV_DMA,
 165 };