drivers/usb/host/ohci-hcd.c

   1 /*
   2  * Open Host Controller Interface (OHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   7  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   8  *
   9  * [ Initialisation is based on Linus'  ]
  10  * [ uhci code and gregs ohci fragments ]
  11  * [ (C) Copyright 1999 Linus Torvalds  ]
  12  * [ (C) Copyright 1999 Gregory P. Smith]
  13  *
  14  *
  15  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  16  * interfaces (though some non-x86 Intel chips use it).  It supports
  17  * smarter hardware than UHCI.  A download link for the spec available
  18  * through the http://www.usb.org website.
  19  *
  20  * This file is licenced under the GPL.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/debugfs.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/irq.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/byteorder.h>
  47
  48
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /* For initializing controller (mask in an HCFS mode too) */
  55 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  56 #define OHCI_INTR_INIT \
  57                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  58                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  59
  60 #ifdef __hppa__
  61 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  62 #define IR_DISABLE
  63 #endif
  64
  65 #ifdef CONFIG_ARCH_OMAP
  66 /* OMAP doesn't support IR (no SMM; not needed) */
  67 #define IR_DISABLE
  68 #endif
  69
  70 /*-------------------------------------------------------------------------*/
  71
  72 static const char       hcd_name [] = "ohci_hcd";
  73
  74 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  75
  76 #include "ohci.h"
  77 #include "pci-quirks.h"
  78
  79 static void ohci_dump(struct ohci_hcd *ohci);
  80 static void ohci_stop(struct usb_hcd *hcd);
  81
  82 #include "ohci-hub.c"
  83 #include "ohci-dbg.c"
  84 #include "ohci-mem.c"
  85 #include "ohci-q.c"
  86
  87
  88 /*
  89  * On architectures with edge-triggered interrupts we must never return
  90  * IRQ_NONE.
  91  */
  92 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  93 #define IRQ_NOTMINE     IRQ_HANDLED
  94 #else
  95 #define IRQ_NOTMINE     IRQ_NONE
  96 #endif
  97
  98
  99 /* Some boards misreport power switching/overcurrent */
 100 static bool distrust_firmware = 1;
 101 module_param (distrust_firmware, bool, 0);
 102 MODULE_PARM_DESC (distrust_firmware,
 103         "true to distrust firmware power/overcurrent setup");
 104
 105 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 106 static bool no_handshake = 0;
 107 module_param (no_handshake, bool, 0);
 108 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 109
 110 /*-------------------------------------------------------------------------*/
 111
 112 /*
 113  * queue up an urb for anything except the root hub
 114  */
 115 static int ohci_urb_enqueue (
 116         struct usb_hcd  *hcd,
 117         struct urb      *urb,
 118         gfp_t           mem_flags
 119 ) {
 120         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 121         struct ed       *ed;
 122         urb_priv_t      *urb_priv;
 123         unsigned int    pipe = urb->pipe;
 124         int             i, size = 0;
 125         unsigned long   flags;
 126         int             retval = 0;
 127
 128         /* every endpoint has a ed, locate and maybe (re)initialize it */
 129         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 130                 return -ENOMEM;
 131
 132         /* for the private part of the URB we need the number of TDs (size) */
 133         switch (ed->type) {
 134                 case PIPE_CONTROL:
 135                         /* td_submit_urb() doesn't yet handle these */
 136                         if (urb->transfer_buffer_length > 4096)
 137                                 return -EMSGSIZE;
 138
 139                         /* 1 TD for setup, 1 for ACK, plus ... */
 140                         size = 2;
 141                         /* FALLTHROUGH */
 142                 // case PIPE_INTERRUPT:
 143                 // case PIPE_BULK:
 144                 default:
 145                         /* one TD for every 4096 Bytes (can be up to 8K) */
 146                         size += urb->transfer_buffer_length / 4096;
 147                         /* ... and for any remaining bytes ... */
 148                         if ((urb->transfer_buffer_length % 4096) != 0)
 149                                 size++;
 150                         /* ... and maybe a zero length packet to wrap it up */
 151                         if (size == 0)
 152                                 size++;
 153                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 154                                 && (urb->transfer_buffer_length
 155                                         % usb_maxpacket (urb->dev, pipe,
 156                                                 usb_pipeout (pipe))) == 0)
 157                                 size++;
 158                         break;
 159                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 160                         size = urb->number_of_packets;
 161                         break;
 162         }
 163
 164         /* allocate the private part of the URB */
 165         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 166                         mem_flags);
 167         if (!urb_priv)
 168                 return -ENOMEM;
 169         INIT_LIST_HEAD (&urb_priv->pending);
 170         urb_priv->length = size;
 171         urb_priv->ed = ed;
 172
 173         /* allocate the TDs (deferring hash chain updates) */
 174         for (i = 0; i < size; i++) {
 175                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 176                 if (!urb_priv->td [i]) {
 177                         urb_priv->length = i;
 178                         urb_free_priv (ohci, urb_priv);
 179                         return -ENOMEM;
 180                 }
 181         }
 182
 183         spin_lock_irqsave (&ohci->lock, flags);
 184
 185         /* don't submit to a dead HC */
 186         if (!HCD_HW_ACCESSIBLE(hcd)) {
 187                 retval = -ENODEV;
 188                 goto fail;
 189         }
 190         if (ohci->rh_state != OHCI_RH_RUNNING) {
 191                 retval = -ENODEV;
 192                 goto fail;
 193         }
 194         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 195         if (retval)
 196                 goto fail;
 197
 198         /* schedule the ed if needed */
 199         if (ed->state == ED_IDLE) {
 200                 retval = ed_schedule (ohci, ed);
 201                 if (retval < 0) {
 202                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 203                         goto fail;
 204                 }
 205                 if (ed->type == PIPE_ISOCHRONOUS) {
 206                         u16     frame = ohci_frame_no(ohci);
 207
 208                         /* delay a few frames before the first TD */
 209                         frame += max_t (u16, 8, ed->interval);
 210                         frame &= ~(ed->interval - 1);
 211                         frame |= ed->branch;
 212                         urb->start_frame = frame;
 213                         ed->last_iso = frame + ed->interval * (size - 1);
 214                 }
 215         } else if (ed->type == PIPE_ISOCHRONOUS) {
 216                 u16     next = ohci_frame_no(ohci) + 1;
 217                 u16     frame = ed->last_iso + ed->interval;
 218                 u16     length = ed->interval * (size - 1);
 219
 220                 /* Behind the scheduling threshold? */
 221                 if (unlikely(tick_before(frame, next))) {
 222
 223                         /* URB_ISO_ASAP: Round up to the first available slot */
 224                         if (urb->transfer_flags & URB_ISO_ASAP) {
 225                                 frame += (next - frame + ed->interval - 1) &
 226                                                 -ed->interval;
 227
 228                         /*
 229                          * Not ASAP: Use the next slot in the stream,
 230                          * no matter what.
 231                          */
 232                         } else {
 233                                 /*
 234                                  * Some OHCI hardware doesn't handle late TDs
 235                                  * correctly.  After retiring them it proceeds
 236                                  * to the next ED instead of the next TD.
 237                                  * Therefore we have to omit the late TDs
 238                                  * entirely.
 239                                  */
 240                                 urb_priv->td_cnt = DIV_ROUND_UP(
 241                                                 (u16) (next - frame),
 242                                                 ed->interval);
 243                                 if (urb_priv->td_cnt >= urb_priv->length) {
 244                                         ++urb_priv->td_cnt;     /* Mark it */
 245                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 246                                                         urb, frame, length,
 247                                                         next);
 248                                 }
 249                         }
 250                 }
 251                 urb->start_frame = frame;
 252                 ed->last_iso = frame + length;
 253         }
 254
 255         /* fill the TDs and link them to the ed; and
 256          * enable that part of the schedule, if needed
 257          * and update count of queued periodic urbs
 258          */
 259         urb->hcpriv = urb_priv;
 260         td_submit_urb (ohci, urb);
 261
 262 fail:
 263         if (retval)
 264                 urb_free_priv (ohci, urb_priv);
 265         spin_unlock_irqrestore (&ohci->lock, flags);
 266         return retval;
 267 }
 268
 269 /*
 270  * decouple the URB from the HC queues (TDs, urb_priv).
 271  * reporting is always done
 272  * asynchronously, and we might be dealing with an urb that's
 273  * partially transferred, or an ED with other urbs being unlinked.
 274  */
 275 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 276 {
 277         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 278         unsigned long           flags;
 279         int                     rc;
 280
 281         spin_lock_irqsave (&ohci->lock, flags);
 282         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 283         if (rc) {
 284                 ;       /* Do nothing */
 285         } else if (ohci->rh_state == OHCI_RH_RUNNING) {
 286                 urb_priv_t  *urb_priv;
 287
 288                 /* Unless an IRQ completed the unlink while it was being
 289                  * handed to us, flag it for unlink and giveback, and force
 290                  * some upcoming INTR_SF to call finish_unlinks()
 291                  */
 292                 urb_priv = urb->hcpriv;
 293                 if (urb_priv) {
 294                         if (urb_priv->ed->state == ED_OPER)
 295                                 start_ed_unlink (ohci, urb_priv->ed);
 296                 }
 297         } else {
 298                 /*
 299                  * with HC dead, we won't respect hc queue pointers
 300                  * any more ... just clean up every urb's memory.
 301                  */
 302                 if (urb->hcpriv)
 303                         finish_urb(ohci, urb, status);
 304         }
 305         spin_unlock_irqrestore (&ohci->lock, flags);
 306         return rc;
 307 }
 308
 309 /*-------------------------------------------------------------------------*/
 310
 311 /* frees config/altsetting state for endpoints,
 312  * including ED memory, dummy TD, and bulk/intr data toggle
 313  */
 314
 315 static void
 316 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 317 {
 318         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 319         unsigned long           flags;
 320         struct ed               *ed = ep->hcpriv;
 321         unsigned                limit = 1000;
 322
 323         /* ASSERT:  any requests/urbs are being unlinked */
 324         /* ASSERT:  nobody can be submitting urbs for this any more */
 325
 326         if (!ed)
 327                 return;
 328
 329 rescan:
 330         spin_lock_irqsave (&ohci->lock, flags);
 331
 332         if (ohci->rh_state != OHCI_RH_RUNNING) {
 333 sanitize:
 334                 ed->state = ED_IDLE;
 335                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
 336                         ohci->eds_scheduled--;
 337                 finish_unlinks (ohci, 0);
 338         }
 339
 340         switch (ed->state) {
 341         case ED_UNLINK:         /* wait for hw to finish? */
 342                 /* major IRQ delivery trouble loses INTR_SF too... */
 343                 if (limit-- == 0) {
 344                         ohci_warn(ohci, "ED unlink timeout\n");
 345                         if (quirk_zfmicro(ohci)) {
 346                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
 347                                 ohci->ed_to_check = ed;
 348                                 ohci->zf_delay = 2;
 349                         }
 350                         goto sanitize;
 351                 }
 352                 spin_unlock_irqrestore (&ohci->lock, flags);
 353                 schedule_timeout_uninterruptible(1);
 354                 goto rescan;
 355         case ED_IDLE:           /* fully unlinked */
 356                 if (list_empty (&ed->td_list)) {
 357                         td_free (ohci, ed->dummy);
 358                         ed_free (ohci, ed);
 359                         break;
 360                 }
 361                 /* else FALL THROUGH */
 362         default:
 363                 /* caller was supposed to have unlinked any requests;
 364                  * that's not our job.  can't recover; must leak ed.
 365                  */
 366                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 367                         ed, ep->desc.bEndpointAddress, ed->state,
 368                         list_empty (&ed->td_list) ? "" : " (has tds)");
 369                 td_free (ohci, ed->dummy);
 370                 break;
 371         }
 372         ep->hcpriv = NULL;
 373         spin_unlock_irqrestore (&ohci->lock, flags);
 374 }
 375
 376 static int ohci_get_frame (struct usb_hcd *hcd)
 377 {
 378         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 379
 380         return ohci_frame_no(ohci);
 381 }
 382
 383 static void ohci_usb_reset (struct ohci_hcd *ohci)
 384 {
 385         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 386         ohci->hc_control &= OHCI_CTRL_RWC;
 387         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 388         ohci->rh_state = OHCI_RH_HALTED;
 389 }
 390
 391 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 392  * other cases where the next software may expect clean state from the
 393  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 394  */
 395 static void _ohci_shutdown(struct usb_hcd *hcd)
 396 {
 397         struct ohci_hcd *ohci;
 398
 399         ohci = hcd_to_ohci (hcd);
 400         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 401
 402         /* Software reset, after which the controller goes into SUSPEND */
 403         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 404         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 405         udelay(10);
 406
 407         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 408 }
 409
 410 static void ohci_shutdown(struct usb_hcd *hcd)
 411 {
 412         struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 413         unsigned long flags;
 414
 415         spin_lock_irqsave(&ohci->lock, flags);
 416         _ohci_shutdown(hcd);
 417         spin_unlock_irqrestore(&ohci->lock, flags);
 418 }
 419
 420 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
 421 {
 422         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
 423                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
 424                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
 425                 && !list_empty(&ed->td_list);
 426 }
 427
 428 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 429  * an interrupt TD but neglects to add it to the donelist.  On systems with
 430  * this chipset, we need to periodically check the state of the queues to look
 431  * for such "lost" TDs.
 432  */
 433 static void unlink_watchdog_func(unsigned long _ohci)
 434 {
 435         unsigned long   flags;
 436         unsigned        max;
 437         unsigned        seen_count = 0;
 438         unsigned        i;
 439         struct ed       **seen = NULL;
 440         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 441
 442         spin_lock_irqsave(&ohci->lock, flags);
 443         max = ohci->eds_scheduled;
 444         if (!max)
 445                 goto done;
 446
 447         if (ohci->ed_to_check)
 448                 goto out;
 449
 450         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
 451         if (!seen)
 452                 goto out;
 453
 454         for (i = 0; i < NUM_INTS; i++) {
 455                 struct ed       *ed = ohci->periodic[i];
 456
 457                 while (ed) {
 458                         unsigned        temp;
 459
 460                         /* scan this branch of the periodic schedule tree */
 461                         for (temp = 0; temp < seen_count; temp++) {
 462                                 if (seen[temp] == ed) {
 463                                         /* we've checked it and what's after */
 464                                         ed = NULL;
 465                                         break;
 466                                 }
 467                         }
 468                         if (!ed)
 469                                 break;
 470                         seen[seen_count++] = ed;
 471                         if (!check_ed(ohci, ed)) {
 472                                 ed = ed->ed_next;
 473                                 continue;
 474                         }
 475
 476                         /* HC's TD list is empty, but HCD sees at least one
 477                          * TD that's not been sent through the donelist.
 478                          */
 479                         ohci->ed_to_check = ed;
 480                         ohci->zf_delay = 2;
 481
 482                         /* The HC may wait until the next frame to report the
 483                          * TD as done through the donelist and INTR_WDH.  (We
 484                          * just *assume* it's not a multi-TD interrupt URB;
 485                          * those could defer the IRQ more than one frame, using
 486                          * DI...)  Check again after the next INTR_SF.
 487                          */
 488                         ohci_writel(ohci, OHCI_INTR_SF,
 489                                         &ohci->regs->intrstatus);
 490                         ohci_writel(ohci, OHCI_INTR_SF,
 491                                         &ohci->regs->intrenable);
 492
 493                         /* flush those writes */
 494                         (void) ohci_readl(ohci, &ohci->regs->control);
 495
 496                         goto out;
 497                 }
 498         }
 499 out:
 500         kfree(seen);
 501         if (ohci->eds_scheduled)
 502                 mod_timer(&ohci->unlink_watchdog, round_jiffies(jiffies + HZ));
 503 done:
 504         spin_unlock_irqrestore(&ohci->lock, flags);
 505 }
 506
 507 /*-------------------------------------------------------------------------*
 508  * HC functions
 509  *-------------------------------------------------------------------------*/
 510
 511 /* init memory, and kick BIOS/SMM off */
 512
 513 static int ohci_init (struct ohci_hcd *ohci)
 514 {
 515         int ret;
 516         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 517
 518         if (distrust_firmware)
 519                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 520
 521         ohci->rh_state = OHCI_RH_HALTED;
 522         ohci->regs = hcd->regs;
 523
 524         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 525          * was never needed for most non-PCI systems ... remove the code?
 526          */
 527
 528 #ifndef IR_DISABLE
 529         /* SMM owns the HC?  not for long! */
 530         if (!no_handshake && ohci_readl (ohci,
 531                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 532                 u32 temp;
 533
 534                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 535
 536                 /* this timeout is arbitrary.  we make it long, so systems
 537                  * depending on usb keyboards may be usable even if the
 538                  * BIOS/SMM code seems pretty broken.
 539                  */
 540                 temp = 500;     /* arbitrary: five seconds */
 541
 542                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 543                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 544                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 545                         msleep (10);
 546                         if (--temp == 0) {
 547                                 ohci_err (ohci, "USB HC takeover failed!"
 548                                         "  (BIOS/SMM bug)\n");
 549                                 return -EBUSY;
 550                         }
 551                 }
 552                 ohci_usb_reset (ohci);
 553         }
 554 #endif
 555
 556         /* Disable HC interrupts */
 557         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 558
 559         /* flush the writes, and save key bits like RWC */
 560         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 561                 ohci->hc_control |= OHCI_CTRL_RWC;
 562
 563         /* Read the number of ports unless overridden */
 564         if (ohci->num_ports == 0)
 565                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 566
 567         if (ohci->hcca)
 568                 return 0;
 569
 570         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 571                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 572         if (!ohci->hcca)
 573                 return -ENOMEM;
 574
 575         if ((ret = ohci_mem_init (ohci)) < 0)
 576                 ohci_stop (hcd);
 577         else {
 578                 create_debug_files (ohci);
 579         }
 580
 581         return ret;
 582 }
 583
 584 /*-------------------------------------------------------------------------*/
 585
 586 /* Start an OHCI controller, set the BUS operational
 587  * resets USB and controller
 588  * enable interrupts
 589  */
 590 static int ohci_run (struct ohci_hcd *ohci)
 591 {
 592         u32                     mask, val;
 593         int                     first = ohci->fminterval == 0;
 594         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 595
 596         ohci->rh_state = OHCI_RH_HALTED;
 597
 598         /* boot firmware should have set this up (5.1.1.3.1) */
 599         if (first) {
 600
 601                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 602                 ohci->fminterval = val & 0x3fff;
 603                 if (ohci->fminterval != FI)
 604                         ohci_dbg (ohci, "fminterval delta %d\n",
 605                                 ohci->fminterval - FI);
 606                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 607                 /* also: power/overcurrent flags in roothub.a */
 608         }
 609
 610         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 611          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 612          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 613          * If the bus glue detected wakeup capability then it should
 614          * already be enabled; if so we'll just enable it again.
 615          */
 616         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 617                 device_set_wakeup_capable(hcd->self.controller, 1);
 618
 619         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 620         case OHCI_USB_OPER:
 621                 val = 0;
 622                 break;
 623         case OHCI_USB_SUSPEND:
 624         case OHCI_USB_RESUME:
 625                 ohci->hc_control &= OHCI_CTRL_RWC;
 626                 ohci->hc_control |= OHCI_USB_RESUME;
 627                 val = 10 /* msec wait */;
 628                 break;
 629         // case OHCI_USB_RESET:
 630         default:
 631                 ohci->hc_control &= OHCI_CTRL_RWC;
 632                 ohci->hc_control |= OHCI_USB_RESET;
 633                 val = 50 /* msec wait */;
 634                 break;
 635         }
 636         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 637         // flush the writes
 638         (void) ohci_readl (ohci, &ohci->regs->control);
 639         msleep(val);
 640
 641         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 642
 643         /* 2msec timelimit here means no irqs/preempt */
 644         spin_lock_irq (&ohci->lock);
 645
 646 retry:
 647         /* HC Reset requires max 10 us delay */
 648         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 649         val = 30;       /* ... allow extra time */
 650         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 651                 if (--val == 0) {
 652                         spin_unlock_irq (&ohci->lock);
 653                         ohci_err (ohci, "USB HC reset timed out!\n");
 654                         return -1;
 655                 }
 656                 udelay (1);
 657         }
 658
 659         /* now we're in the SUSPEND state ... must go OPERATIONAL
 660          * within 2msec else HC enters RESUME
 661          *
 662          * ... but some hardware won't init fmInterval "by the book"
 663          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 664          * this if we write fmInterval after we're OPERATIONAL.
 665          * Unclear about ALi, ServerWorks, and others ... this could
 666          * easily be a longstanding bug in chip init on Linux.
 667          */
 668         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 669                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 670                 // flush those writes
 671                 (void) ohci_readl (ohci, &ohci->regs->control);
 672         }
 673
 674         /* Tell the controller where the control and bulk lists are
 675          * The lists are empty now. */
 676         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 677         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 678
 679         /* a reset clears this */
 680         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 681
 682         periodic_reinit (ohci);
 683
 684         /* some OHCI implementations are finicky about how they init.
 685          * bogus values here mean not even enumeration could work.
 686          */
 687         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 688                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 689                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 690                         ohci->flags |= OHCI_QUIRK_INITRESET;
 691                         ohci_dbg (ohci, "enabling initreset quirk\n");
 692                         goto retry;
 693                 }
 694                 spin_unlock_irq (&ohci->lock);
 695                 ohci_err (ohci, "init err (%08x %04x)\n",
 696                         ohci_readl (ohci, &ohci->regs->fminterval),
 697                         ohci_readl (ohci, &ohci->regs->periodicstart));
 698                 return -EOVERFLOW;
 699         }
 700
 701         /* use rhsc irqs after khubd is fully initialized */
 702         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 703         hcd->uses_new_polling = 1;
 704
 705         /* start controller operations */
 706         ohci->hc_control &= OHCI_CTRL_RWC;
 707         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 708         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 709         ohci->rh_state = OHCI_RH_RUNNING;
 710
 711         /* wake on ConnectStatusChange, matching external hubs */
 712         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 713
 714         /* Choose the interrupts we care about now, others later on demand */
 715         mask = OHCI_INTR_INIT;
 716         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 717         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 718
 719         /* handle root hub init quirks ... */
 720         val = roothub_a (ohci);
 721         val &= ~(RH_A_PSM | RH_A_OCPM);
 722         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 723                 /* NSC 87560 and maybe others */
 724                 val |= RH_A_NOCP;
 725                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 726                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 727         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 728                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 729                 /* hub power always on; required for AMD-756 and some
 730                  * Mac platforms.  ganged overcurrent reporting, if any.
 731                  */
 732                 val |= RH_A_NPS;
 733                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 734         }
 735         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 736         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 737                                                 &ohci->regs->roothub.b);
 738         // flush those writes
 739         (void) ohci_readl (ohci, &ohci->regs->control);
 740
 741         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 742         spin_unlock_irq (&ohci->lock);
 743
 744         // POTPGT delay is bits 24-31, in 2 ms units.
 745         mdelay ((val >> 23) & 0x1fe);
 746
 747         if (quirk_zfmicro(ohci)) {
 748                 /* Create timer to watch for bad queue state on ZF Micro */
 749                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
 750                                 (unsigned long) ohci);
 751
 752                 ohci->eds_scheduled = 0;
 753                 ohci->ed_to_check = NULL;
 754         }
 755
 756         ohci_dump(ohci);
 757
 758         return 0;
 759 }
 760
 761 /* ohci_setup routine for generic controller initialization */
 762
 763 int ohci_setup(struct usb_hcd *hcd)
 764 {
 765         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 766
 767         ohci_hcd_init(ohci);
 768
 769         return ohci_init(ohci);
 770 }
 771 EXPORT_SYMBOL_GPL(ohci_setup);
 772
 773 /* ohci_start routine for generic controller start of all OHCI bus glue */
 774 static int ohci_start(struct usb_hcd *hcd)
 775 {
 776         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 777         int     ret;
 778
 779         ret = ohci_run(ohci);
 780         if (ret < 0) {
 781                 ohci_err(ohci, "can't start\n");
 782                 ohci_stop(hcd);
 783         }
 784         return ret;
 785 }
 786
 787 /*-------------------------------------------------------------------------*/
 788
 789 /* an interrupt happens */
 790
 791 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 792 {
 793         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 794         struct ohci_regs __iomem *regs = ohci->regs;
 795         int                     ints;
 796
 797         /* Read interrupt status (and flush pending writes).  We ignore the
 798          * optimization of checking the LSB of hcca->done_head; it doesn't
 799          * work on all systems (edge triggering for OHCI can be a factor).
 800          */
 801         ints = ohci_readl(ohci, &regs->intrstatus);
 802
 803         /* Check for an all 1's result which is a typical consequence
 804          * of dead, unclocked, or unplugged (CardBus...) devices
 805          */
 806         if (ints == ~(u32)0) {
 807                 ohci->rh_state = OHCI_RH_HALTED;
 808                 ohci_dbg (ohci, "device removed!\n");
 809                 usb_hc_died(hcd);
 810                 return IRQ_HANDLED;
 811         }
 812
 813         /* We only care about interrupts that are enabled */
 814         ints &= ohci_readl(ohci, &regs->intrenable);
 815
 816         /* interrupt for some other device? */
 817         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 818                 return IRQ_NOTMINE;
 819
 820         if (ints & OHCI_INTR_UE) {
 821                 // e.g. due to PCI Master/Target Abort
 822                 if (quirk_nec(ohci)) {
 823                         /* Workaround for a silicon bug in some NEC chips used
 824                          * in Apple's PowerBooks. Adapted from Darwin code.
 825                          */
 826                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 827
 828                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 829
 830                         schedule_work (&ohci->nec_work);
 831                 } else {
 832                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 833                         ohci->rh_state = OHCI_RH_HALTED;
 834                         usb_hc_died(hcd);
 835                 }
 836
 837                 ohci_dump(ohci);
 838                 ohci_usb_reset (ohci);
 839         }
 840
 841         if (ints & OHCI_INTR_RHSC) {
 842                 ohci_dbg(ohci, "rhsc\n");
 843                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 844                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 845                                 &regs->intrstatus);
 846
 847                 /* NOTE: Vendors didn't always make the same implementation
 848                  * choices for RHSC.  Many followed the spec; RHSC triggers
 849                  * on an edge, like setting and maybe clearing a port status
 850                  * change bit.  With others it's level-triggered, active
 851                  * until khubd clears all the port status change bits.  We'll
 852                  * always disable it here and rely on polling until khubd
 853                  * re-enables it.
 854                  */
 855                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 856                 usb_hcd_poll_rh_status(hcd);
 857         }
 858
 859         /* For connect and disconnect events, we expect the controller
 860          * to turn on RHSC along with RD.  But for remote wakeup events
 861          * this might not happen.
 862          */
 863         else if (ints & OHCI_INTR_RD) {
 864                 ohci_dbg(ohci, "resume detect\n");
 865                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 866                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 867                 if (ohci->autostop) {
 868                         spin_lock (&ohci->lock);
 869                         ohci_rh_resume (ohci);
 870                         spin_unlock (&ohci->lock);
 871                 } else
 872                         usb_hcd_resume_root_hub(hcd);
 873         }
 874
 875         if (ints & OHCI_INTR_WDH) {
 876                 spin_lock (&ohci->lock);
 877                 dl_done_list (ohci);
 878                 spin_unlock (&ohci->lock);
 879         }
 880
 881         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
 882                 spin_lock(&ohci->lock);
 883                 if (ohci->ed_to_check) {
 884                         struct ed *ed = ohci->ed_to_check;
 885
 886                         if (check_ed(ohci, ed)) {
 887                                 /* HC thinks the TD list is empty; HCD knows
 888                                  * at least one TD is outstanding
 889                                  */
 890                                 if (--ohci->zf_delay == 0) {
 891                                         struct td *td = list_entry(
 892                                                 ed->td_list.next,
 893                                                 struct td, td_list);
 894                                         ohci_warn(ohci,
 895                                                   "Reclaiming orphan TD %p\n",
 896                                                   td);
 897                                         takeback_td(ohci, td);
 898                                         ohci->ed_to_check = NULL;
 899                                 }
 900                         } else
 901                                 ohci->ed_to_check = NULL;
 902                 }
 903                 spin_unlock(&ohci->lock);
 904         }
 905
 906         /* could track INTR_SO to reduce available PCI/... bandwidth */
 907
 908         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 909          * when there's still unlinking to be done (next frame).
 910          */
 911         spin_lock (&ohci->lock);
 912         if (ohci->ed_rm_list)
 913                 finish_unlinks (ohci, ohci_frame_no(ohci));
 914         if ((ints & OHCI_INTR_SF) != 0
 915                         && !ohci->ed_rm_list
 916                         && !ohci->ed_to_check
 917                         && ohci->rh_state == OHCI_RH_RUNNING)
 918                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 919         spin_unlock (&ohci->lock);
 920
 921         if (ohci->rh_state == OHCI_RH_RUNNING) {
 922                 ohci_writel (ohci, ints, &regs->intrstatus);
 923                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 924                 // flush those writes
 925                 (void) ohci_readl (ohci, &ohci->regs->control);
 926         }
 927
 928         return IRQ_HANDLED;
 929 }
 930
 931 /*-------------------------------------------------------------------------*/
 932
 933 static void ohci_stop (struct usb_hcd *hcd)
 934 {
 935         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 936
 937         ohci_dump(ohci);
 938
 939         if (quirk_nec(ohci))
 940                 flush_work(&ohci->nec_work);
 941
 942         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 943         ohci_usb_reset(ohci);
 944         free_irq(hcd->irq, hcd);
 945         hcd->irq = 0;
 946
 947         if (quirk_zfmicro(ohci))
 948                 del_timer(&ohci->unlink_watchdog);
 949         if (quirk_amdiso(ohci))
 950                 usb_amd_dev_put();
 951
 952         remove_debug_files (ohci);
 953         ohci_mem_cleanup (ohci);
 954         if (ohci->hcca) {
 955                 dma_free_coherent (hcd->self.controller,
 956                                 sizeof *ohci->hcca,
 957                                 ohci->hcca, ohci->hcca_dma);
 958                 ohci->hcca = NULL;
 959                 ohci->hcca_dma = 0;
 960         }
 961 }
 962
 963 /*-------------------------------------------------------------------------*/
 964
 965 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 966
 967 /* must not be called from interrupt context */
 968 int ohci_restart(struct ohci_hcd *ohci)
 969 {
 970         int temp;
 971         int i;
 972         struct urb_priv *priv;
 973
 974         ohci_init(ohci);
 975         spin_lock_irq(&ohci->lock);
 976         ohci->rh_state = OHCI_RH_HALTED;
 977
 978         /* Recycle any "live" eds/tds (and urbs). */
 979         if (!list_empty (&ohci->pending))
 980                 ohci_dbg(ohci, "abort schedule...\n");
 981         list_for_each_entry (priv, &ohci->pending, pending) {
 982                 struct urb      *urb = priv->td[0]->urb;
 983                 struct ed       *ed = priv->ed;
 984
 985                 switch (ed->state) {
 986                 case ED_OPER:
 987                         ed->state = ED_UNLINK;
 988                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 989                         ed_deschedule (ohci, ed);
 990
 991                         ed->ed_next = ohci->ed_rm_list;
 992                         ed->ed_prev = NULL;
 993                         ohci->ed_rm_list = ed;
 994                         /* FALLTHROUGH */
 995                 case ED_UNLINK:
 996                         break;
 997                 default:
 998                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 999                                         ed, ed->state);
1000                 }
1001
1002                 if (!urb->unlinked)
1003                         urb->unlinked = -ESHUTDOWN;
1004         }
1005         finish_unlinks (ohci, 0);
1006         spin_unlock_irq(&ohci->lock);
1007
1008         /* paranoia, in case that didn't work: */
1009
1010         /* empty the interrupt branches */
1011         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1012         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1013
1014         /* no EDs to remove */
1015         ohci->ed_rm_list = NULL;
1016
1017         /* empty control and bulk lists */
1018         ohci->ed_controltail = NULL;
1019         ohci->ed_bulktail    = NULL;
1020
1021         if ((temp = ohci_run (ohci)) < 0) {
1022                 ohci_err (ohci, "can't restart, %d\n", temp);
1023                 return temp;
1024         }
1025         ohci_dbg(ohci, "restart complete\n");
1026         return 0;
1027 }
1028 EXPORT_SYMBOL_GPL(ohci_restart);
1029
1030 #endif
1031
1032 #ifdef CONFIG_PM
1033
1034 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1035 {
1036         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1037         unsigned long   flags;
1038         int             rc = 0;
1039
1040         /* Disable irq emission and mark HW unaccessible. Use
1041          * the spinlock to properly synchronize with possible pending
1042          * RH suspend or resume activity.
1043          */
1044         spin_lock_irqsave (&ohci->lock, flags);
1045         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1046         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1047
1048         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1049         spin_unlock_irqrestore (&ohci->lock, flags);
1050
1051         synchronize_irq(hcd->irq);
1052
1053         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1054                 ohci_resume(hcd, false);
1055                 rc = -EBUSY;
1056         }
1057         return rc;
1058 }
1059 EXPORT_SYMBOL_GPL(ohci_suspend);
1060
1061
1062 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1063 {
1064         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1065         int                     port;
1066         bool                    need_reinit = false;
1067
1068         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1069
1070         /* Make sure resume from hibernation re-enumerates everything */
1071         if (hibernated)
1072                 ohci_usb_reset(ohci);
1073
1074         /* See if the controller is already running or has been reset */
1075         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1076         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1077                 need_reinit = true;
1078         } else {
1079                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1080                 case OHCI_USB_OPER:
1081                 case OHCI_USB_RESET:
1082                         need_reinit = true;
1083                 }
1084         }
1085
1086         /* If needed, reinitialize and suspend the root hub */
1087         if (need_reinit) {
1088                 spin_lock_irq(&ohci->lock);
1089                 ohci_rh_resume(ohci);
1090                 ohci_rh_suspend(ohci, 0);
1091                 spin_unlock_irq(&ohci->lock);
1092         }
1093
1094         /* Normally just turn on port power and enable interrupts */
1095         else {
1096                 ohci_dbg(ohci, "powerup ports\n");
1097                 for (port = 0; port < ohci->num_ports; port++)
1098                         ohci_writel(ohci, RH_PS_PPS,
1099                                         &ohci->regs->roothub.portstatus[port]);
1100
1101                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1102                 ohci_readl(ohci, &ohci->regs->intrenable);
1103                 msleep(20);
1104         }
1105
1106         usb_hcd_resume_root_hub(hcd);
1107
1108         return 0;
1109 }
1110 EXPORT_SYMBOL_GPL(ohci_resume);
1111
1112 #endif
1113
1114 /*-------------------------------------------------------------------------*/
1115
1116 /*
1117  * Generic structure: This gets copied for platform drivers so that
1118  * individual entries can be overridden as needed.
1119  */
1120
1121 static const struct hc_driver ohci_hc_driver = {
1122         .description =          hcd_name,
1123         .product_desc =         "OHCI Host Controller",
1124         .hcd_priv_size =        sizeof(struct ohci_hcd),
1125
1126         /*
1127          * generic hardware linkage
1128         */
1129         .irq =                  ohci_irq,
1130         .flags =                HCD_MEMORY | HCD_USB11,
1131
1132         /*
1133         * basic lifecycle operations
1134         */
1135         .reset =                ohci_setup,
1136         .start =                ohci_start,
1137         .stop =                 ohci_stop,
1138         .shutdown =             ohci_shutdown,
1139
1140         /*
1141          * managing i/o requests and associated device resources
1142         */
1143         .urb_enqueue =          ohci_urb_enqueue,
1144         .urb_dequeue =          ohci_urb_dequeue,
1145         .endpoint_disable =     ohci_endpoint_disable,
1146
1147         /*
1148         * scheduling support
1149         */
1150         .get_frame_number =     ohci_get_frame,
1151
1152         /*
1153         * root hub support
1154         */
1155         .hub_status_data =      ohci_hub_status_data,
1156         .hub_control =          ohci_hub_control,
1157 #ifdef CONFIG_PM
1158         .bus_suspend =          ohci_bus_suspend,
1159         .bus_resume =           ohci_bus_resume,
1160 #endif
1161         .start_port_reset =     ohci_start_port_reset,
1162 };
1163
1164 void ohci_init_driver(struct hc_driver *drv,
1165                 const struct ohci_driver_overrides *over)
1166 {
1167         /* Copy the generic table to drv and then apply the overrides */
1168         *drv = ohci_hc_driver;
1169
1170         if (over) {
1171                 drv->product_desc = over->product_desc;
1172                 drv->hcd_priv_size += over->extra_priv_size;
1173                 if (over->reset)
1174                         drv->reset = over->reset;
1175         }
1176 }
1177 EXPORT_SYMBOL_GPL(ohci_init_driver);
1178
1179 /*-------------------------------------------------------------------------*/
1180
1181 MODULE_AUTHOR (DRIVER_AUTHOR);
1182 MODULE_DESCRIPTION(DRIVER_DESC);
1183 MODULE_LICENSE ("GPL");
1184
1185 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1186 #include "ohci-sa1111.c"
1187 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1188 #endif
1189
1190 #ifdef CONFIG_USB_OHCI_HCD_DAVINCI
1191 #include "ohci-da8xx.c"
1192 #define DAVINCI_PLATFORM_DRIVER ohci_hcd_da8xx_driver
1193 #endif
1194
1195 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1196 #include "ohci-ppc-of.c"
1197 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1198 #endif
1199
1200 #ifdef CONFIG_PPC_PS3
1201 #include "ohci-ps3.c"
1202 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1203 #endif
1204
1205 #ifdef CONFIG_MFD_SM501
1206 #include "ohci-sm501.c"
1207 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1208 #endif
1209
1210 #ifdef CONFIG_MFD_TC6393XB
1211 #include "ohci-tmio.c"
1212 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1213 #endif
1214
1215 #ifdef CONFIG_MACH_JZ4740
1216 #include "ohci-jz4740.c"
1217 #define PLATFORM_DRIVER ohci_hcd_jz4740_driver
1218 #endif
1219
1220 #ifdef CONFIG_USB_OCTEON_OHCI
1221 #include "ohci-octeon.c"
1222 #define PLATFORM_DRIVER         ohci_octeon_driver
1223 #endif
1224
1225 #ifdef CONFIG_TILE_USB
1226 #include "ohci-tilegx.c"
1227 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1228 #endif
1229
1230 static int __init ohci_hcd_mod_init(void)
1231 {
1232         int retval = 0;
1233
1234         if (usb_disabled())
1235                 return -ENODEV;
1236
1237         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1238         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1239                 sizeof (struct ed), sizeof (struct td));
1240         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1241
1242         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1243         if (!ohci_debug_root) {
1244                 retval = -ENOENT;
1245                 goto error_debug;
1246         }
1247
1248 #ifdef PS3_SYSTEM_BUS_DRIVER
1249         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1250         if (retval < 0)
1251                 goto error_ps3;
1252 #endif
1253
1254 #ifdef PLATFORM_DRIVER
1255         retval = platform_driver_register(&PLATFORM_DRIVER);
1256         if (retval < 0)
1257                 goto error_platform;
1258 #endif
1259
1260 #ifdef OF_PLATFORM_DRIVER
1261         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1262         if (retval < 0)
1263                 goto error_of_platform;
1264 #endif
1265
1266 #ifdef SA1111_DRIVER
1267         retval = sa1111_driver_register(&SA1111_DRIVER);
1268         if (retval < 0)
1269                 goto error_sa1111;
1270 #endif
1271
1272 #ifdef SM501_OHCI_DRIVER
1273         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1274         if (retval < 0)
1275                 goto error_sm501;
1276 #endif
1277
1278 #ifdef TMIO_OHCI_DRIVER
1279         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1280         if (retval < 0)
1281                 goto error_tmio;
1282 #endif
1283
1284 #ifdef DAVINCI_PLATFORM_DRIVER
1285         retval = platform_driver_register(&DAVINCI_PLATFORM_DRIVER);
1286         if (retval < 0)
1287                 goto error_davinci;
1288 #endif
1289
1290         return retval;
1291
1292         /* Error path */
1293 #ifdef DAVINCI_PLATFORM_DRIVER
1294         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1295  error_davinci:
1296 #endif
1297 #ifdef TMIO_OHCI_DRIVER
1298         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1299  error_tmio:
1300 #endif
1301 #ifdef SM501_OHCI_DRIVER
1302         platform_driver_unregister(&SM501_OHCI_DRIVER);
1303  error_sm501:
1304 #endif
1305 #ifdef SA1111_DRIVER
1306         sa1111_driver_unregister(&SA1111_DRIVER);
1307  error_sa1111:
1308 #endif
1309 #ifdef OF_PLATFORM_DRIVER
1310         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1311  error_of_platform:
1312 #endif
1313 #ifdef PLATFORM_DRIVER
1314         platform_driver_unregister(&PLATFORM_DRIVER);
1315  error_platform:
1316 #endif
1317 #ifdef PS3_SYSTEM_BUS_DRIVER
1318         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1319  error_ps3:
1320 #endif
1321         debugfs_remove(ohci_debug_root);
1322         ohci_debug_root = NULL;
1323  error_debug:
1324
1325         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1326         return retval;
1327 }
1328 module_init(ohci_hcd_mod_init);
1329
1330 static void __exit ohci_hcd_mod_exit(void)
1331 {
1332 #ifdef DAVINCI_PLATFORM_DRIVER
1333         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1334 #endif
1335 #ifdef TMIO_OHCI_DRIVER
1336         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1337 #endif
1338 #ifdef SM501_OHCI_DRIVER
1339         platform_driver_unregister(&SM501_OHCI_DRIVER);
1340 #endif
1341 #ifdef SA1111_DRIVER
1342         sa1111_driver_unregister(&SA1111_DRIVER);
1343 #endif
1344 #ifdef OF_PLATFORM_DRIVER
1345         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1346 #endif
1347 #ifdef PLATFORM_DRIVER
1348         platform_driver_unregister(&PLATFORM_DRIVER);
1349 #endif
1350 #ifdef PS3_SYSTEM_BUS_DRIVER
1351         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1352 #endif
1353         debugfs_remove(ohci_debug_root);
1354         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1355 }
1356 module_exit(ohci_hcd_mod_exit);
1357