drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* PID Codes that are used here, from EHCI specification, Table 3-16. */
  44 #define PID_CODE_IN    1
  45 #define PID_CODE_SETUP 2
  46
  47 /* fill a qtd, returning how much of the buffer we were able to queue up */
  48
  49 static int
  50 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  51                   size_t len, int token, int maxpacket)
  52 {
  53         int     i, count;
  54         u64     addr = buf;
  55
  56         /* one buffer entry per 4K ... first might be short or unaligned */
  57         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  58         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  59         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  60         if (likely (len < count))               /* ... iff needed */
  61                 count = len;
  62         else {
  63                 buf +=  0x1000;
  64                 buf &= ~0x0fff;
  65
  66                 /* per-qtd limit: from 16K to 20K (best alignment) */
  67                 for (i = 1; count < len && i < 5; i++) {
  68                         addr = buf;
  69                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  70                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  71                                         (u32)(addr >> 32));
  72                         buf += 0x1000;
  73                         if ((count + 0x1000) < len)
  74                                 count += 0x1000;
  75                         else
  76                                 count = len;
  77                 }
  78
  79                 /* short packets may only terminate transfers */
  80                 if (count != len)
  81                         count -= (count % maxpacket);
  82         }
  83         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  84         qtd->length = count;
  85
  86         return count;
  87 }
  88
  89 /*-------------------------------------------------------------------------*/
  90
  91 static inline void
  92 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  93 {
  94         struct ehci_qh_hw *hw = qh->hw;
  95
  96         /* writes to an active overlay are unsafe */
  97         WARN_ON(qh->qh_state != QH_STATE_IDLE);
  98
  99         hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
 100         hw->hw_alt_next = EHCI_LIST_END(ehci);
 101
 102         /* Except for control endpoints, we make hardware maintain data
 103          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
 104          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
 105          * ever clear it.
 106          */
 107         if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
 108                 unsigned        is_out, epnum;
 109
 110                 is_out = qh->is_out;
 111                 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
 112                 if (unlikely(!usb_gettoggle(qh->ps.udev, epnum, is_out))) {
 113                         hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 114                         usb_settoggle(qh->ps.udev, epnum, is_out, 1);
 115                 }
 116         }
 117
 118         hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 119 }
 120
 121 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 122  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 123  * recovery (including urb dequeue) would need software changes to a QH...
 124  */
 125 static void
 126 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 127 {
 128         struct ehci_qtd *qtd;
 129
 130         qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
 131
 132         /*
 133          * first qtd may already be partially processed.
 134          * If we come here during unlink, the QH overlay region
 135          * might have reference to the just unlinked qtd. The
 136          * qtd is updated in qh_completions(). Update the QH
 137          * overlay here.
 138          */
 139         if (qh->hw->hw_token & ACTIVE_BIT(ehci))
 140                 qh->hw->hw_qtd_next = qtd->hw_next;
 141         else
 142                 qh_update(ehci, qh, qtd);
 143 }
 144
 145 /*-------------------------------------------------------------------------*/
 146
 147 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
 148
 149 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
 150                 struct usb_host_endpoint *ep)
 151 {
 152         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 153         struct ehci_qh          *qh = ep->hcpriv;
 154         unsigned long           flags;
 155
 156         spin_lock_irqsave(&ehci->lock, flags);
 157         qh->clearing_tt = 0;
 158         if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
 159                         && ehci->rh_state == EHCI_RH_RUNNING)
 160                 qh_link_async(ehci, qh);
 161         spin_unlock_irqrestore(&ehci->lock, flags);
 162 }
 163
 164 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
 165                 struct urb *urb, u32 token)
 166 {
 167
 168         /* If an async split transaction gets an error or is unlinked,
 169          * the TT buffer may be left in an indeterminate state.  We
 170          * have to clear the TT buffer.
 171          *
 172          * Note: this routine is never called for Isochronous transfers.
 173          */
 174         if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
 175 #ifdef CONFIG_DYNAMIC_DEBUG
 176                 struct usb_device *tt = urb->dev->tt->hub;
 177                 dev_dbg(&tt->dev,
 178                         "clear tt buffer port %d, a%d ep%d t%08x\n",
 179                         urb->dev->ttport, urb->dev->devnum,
 180                         usb_pipeendpoint(urb->pipe), token);
 181 #endif /* CONFIG_DYNAMIC_DEBUG */
 182                 if (!ehci_is_TDI(ehci)
 183                                 || urb->dev->tt->hub !=
 184                                    ehci_to_hcd(ehci)->self.root_hub) {
 185                         if (usb_hub_clear_tt_buffer(urb) == 0)
 186                                 qh->clearing_tt = 1;
 187                 } else {
 188
 189                         /* REVISIT ARC-derived cores don't clear the root
 190                          * hub TT buffer in this way...
 191                          */
 192                 }
 193         }
 194 }
 195
 196 static int qtd_copy_status (
 197         struct ehci_hcd *ehci,
 198         struct urb *urb,
 199         size_t length,
 200         u32 token
 201 )
 202 {
 203         int     status = -EINPROGRESS;
 204
 205         /* count IN/OUT bytes, not SETUP (even short packets) */
 206         if (likely(QTD_PID(token) != PID_CODE_SETUP))
 207                 urb->actual_length += length - QTD_LENGTH (token);
 208
 209         /* don't modify error codes */
 210         if (unlikely(urb->unlinked))
 211                 return status;
 212
 213         /* force cleanup after short read; not always an error */
 214         if (unlikely (IS_SHORT_READ (token)))
 215                 status = -EREMOTEIO;
 216
 217         /* serious "can't proceed" faults reported by the hardware */
 218         if (token & QTD_STS_HALT) {
 219                 if (token & QTD_STS_BABBLE) {
 220                         /* FIXME "must" disable babbling device's port too */
 221                         status = -EOVERFLOW;
 222                 /*
 223                  * When MMF is active and PID Code is IN, queue is halted.
 224                  * EHCI Specification, Table 4-13.
 225                  */
 226                 } else if ((token & QTD_STS_MMF) &&
 227                                         (QTD_PID(token) == PID_CODE_IN)) {
 228                         status = -EPROTO;
 229                 /* CERR nonzero + halt --> stall */
 230                 } else if (QTD_CERR(token)) {
 231                         status = -EPIPE;
 232
 233                 /* In theory, more than one of the following bits can be set
 234                  * since they are sticky and the transaction is retried.
 235                  * Which to test first is rather arbitrary.
 236                  */
 237                 } else if (token & QTD_STS_MMF) {
 238                         /* fs/ls interrupt xfer missed the complete-split */
 239                         status = -EPROTO;
 240                 } else if (token & QTD_STS_DBE) {
 241                         status = (QTD_PID (token) == 1) /* IN ? */
 242                                 ? -ENOSR  /* hc couldn't read data */
 243                                 : -ECOMM; /* hc couldn't write data */
 244                 } else if (token & QTD_STS_XACT) {
 245                         /* timeout, bad CRC, wrong PID, etc */
 246                         ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
 247                                 urb->dev->devpath,
 248                                 usb_pipeendpoint(urb->pipe),
 249                                 usb_pipein(urb->pipe) ? "in" : "out");
 250                         status = -EPROTO;
 251                 } else {        /* unknown */
 252                         status = -EPROTO;
 253                 }
 254         }
 255
 256         return status;
 257 }
 258
 259 static void
 260 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
 261 {
 262         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
 263                 /* ... update hc-wide periodic stats */
 264                 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 265         }
 266
 267         if (unlikely(urb->unlinked)) {
 268                 COUNT(ehci->stats.unlink);
 269         } else {
 270                 /* report non-error and short read status as zero */
 271                 if (status == -EINPROGRESS || status == -EREMOTEIO)
 272                         status = 0;
 273                 COUNT(ehci->stats.complete);
 274         }
 275
 276 #ifdef EHCI_URB_TRACE
 277         ehci_dbg (ehci,
 278                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 279                 __func__, urb->dev->devpath, urb,
 280                 usb_pipeendpoint (urb->pipe),
 281                 usb_pipein (urb->pipe) ? "in" : "out",
 282                 status,
 283                 urb->actual_length, urb->transfer_buffer_length);
 284 #endif
 285
 286         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 287         usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
 288 }
 289
 290 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 291
 292 /*
 293  * Process and free completed qtds for a qh, returning URBs to drivers.
 294  * Chases up to qh->hw_current.  Returns nonzero if the caller should
 295  * unlink qh.
 296  */
 297 static unsigned
 298 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 299 {
 300         struct ehci_qtd         *last, *end = qh->dummy;
 301         struct list_head        *entry, *tmp;
 302         int                     last_status;
 303         int                     stopped;
 304         u8                      state;
 305         struct ehci_qh_hw       *hw = qh->hw;
 306
 307         /* completions (or tasks on other cpus) must never clobber HALT
 308          * till we've gone through and cleaned everything up, even when
 309          * they add urbs to this qh's queue or mark them for unlinking.
 310          *
 311          * NOTE:  unlinking expects to be done in queue order.
 312          *
 313          * It's a bug for qh->qh_state to be anything other than
 314          * QH_STATE_IDLE, unless our caller is scan_async() or
 315          * scan_intr().
 316          */
 317         state = qh->qh_state;
 318         qh->qh_state = QH_STATE_COMPLETING;
 319         stopped = (state == QH_STATE_IDLE);
 320
 321  rescan:
 322         last = NULL;
 323         last_status = -EINPROGRESS;
 324         qh->dequeue_during_giveback = 0;
 325
 326         /* remove de-activated QTDs from front of queue.
 327          * after faults (including short reads), cleanup this urb
 328          * then let the queue advance.
 329          * if queue is stopped, handles unlinks.
 330          */
 331         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 332                 struct ehci_qtd *qtd;
 333                 struct urb      *urb;
 334                 u32             token = 0;
 335
 336                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 337                 urb = qtd->urb;
 338
 339                 /* clean up any state from previous QTD ...*/
 340                 if (last) {
 341                         if (likely (last->urb != urb)) {
 342                                 ehci_urb_done(ehci, last->urb, last_status);
 343                                 last_status = -EINPROGRESS;
 344                         }
 345                         ehci_qtd_free (ehci, last);
 346                         last = NULL;
 347                 }
 348
 349                 /* ignore urbs submitted during completions we reported */
 350                 if (qtd == end)
 351                         break;
 352
 353                 /* hardware copies qtd out of qh overlay */
 354                 rmb ();
 355                 token = hc32_to_cpu(ehci, qtd->hw_token);
 356
 357                 /* always clean up qtds the hc de-activated */
 358  retry_xacterr:
 359                 if ((token & QTD_STS_ACTIVE) == 0) {
 360
 361                         /* Report Data Buffer Error: non-fatal but useful */
 362                         if (token & QTD_STS_DBE)
 363                                 ehci_dbg(ehci,
 364                                         "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 365                                         urb,
 366                                         usb_endpoint_num(&urb->ep->desc),
 367                                         usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
 368                                         urb->transfer_buffer_length,
 369                                         qtd,
 370                                         qh);
 371
 372                         /* on STALL, error, and short reads this urb must
 373                          * complete and all its qtds must be recycled.
 374                          */
 375                         if ((token & QTD_STS_HALT) != 0) {
 376
 377                                 /* retry transaction errors until we
 378                                  * reach the software xacterr limit
 379                                  */
 380                                 if ((token & QTD_STS_XACT) &&
 381                                                 QTD_CERR(token) == 0 &&
 382                                                 ++qh->xacterrs < QH_XACTERR_MAX &&
 383                                                 !urb->unlinked) {
 384                                         ehci_dbg(ehci,
 385         "detected XactErr len %zu/%zu retry %d\n",
 386         qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
 387
 388                                         /* reset the token in the qtd and the
 389                                          * qh overlay (which still contains
 390                                          * the qtd) so that we pick up from
 391                                          * where we left off
 392                                          */
 393                                         token &= ~QTD_STS_HALT;
 394                                         token |= QTD_STS_ACTIVE |
 395                                                         (EHCI_TUNE_CERR << 10);
 396                                         qtd->hw_token = cpu_to_hc32(ehci,
 397                                                         token);
 398                                         wmb();
 399                                         hw->hw_token = cpu_to_hc32(ehci,
 400                                                         token);
 401                                         goto retry_xacterr;
 402                                 }
 403                                 stopped = 1;
 404
 405                         /* magic dummy for some short reads; qh won't advance.
 406                          * that silicon quirk can kick in with this dummy too.
 407                          *
 408                          * other short reads won't stop the queue, including
 409                          * control transfers (status stage handles that) or
 410                          * most other single-qtd reads ... the queue stops if
 411                          * URB_SHORT_NOT_OK was set so the driver submitting
 412                          * the urbs could clean it up.
 413                          */
 414                         } else if (IS_SHORT_READ (token)
 415                                         && !(qtd->hw_alt_next
 416                                                 & EHCI_LIST_END(ehci))) {
 417                                 stopped = 1;
 418                         }
 419
 420                 /* stop scanning when we reach qtds the hc is using */
 421                 } else if (likely (!stopped
 422                                 && ehci->rh_state >= EHCI_RH_RUNNING)) {
 423                         break;
 424
 425                 /* scan the whole queue for unlinks whenever it stops */
 426                 } else {
 427                         stopped = 1;
 428
 429                         /* cancel everything if we halt, suspend, etc */
 430                         if (ehci->rh_state < EHCI_RH_RUNNING)
 431                                 last_status = -ESHUTDOWN;
 432
 433                         /* this qtd is active; skip it unless a previous qtd
 434                          * for its urb faulted, or its urb was canceled.
 435                          */
 436                         else if (last_status == -EINPROGRESS && !urb->unlinked)
 437                                 continue;
 438
 439                         /*
 440                          * If this was the active qtd when the qh was unlinked
 441                          * and the overlay's token is active, then the overlay
 442                          * hasn't been written back to the qtd yet so use its
 443                          * token instead of the qtd's.  After the qtd is
 444                          * processed and removed, the overlay won't be valid
 445                          * any more.
 446                          */
 447                         if (state == QH_STATE_IDLE &&
 448                                         qh->qtd_list.next == &qtd->qtd_list &&
 449                                         (hw->hw_token & ACTIVE_BIT(ehci))) {
 450                                 token = hc32_to_cpu(ehci, hw->hw_token);
 451                                 hw->hw_token &= ~ACTIVE_BIT(ehci);
 452
 453                                 /* An unlink may leave an incomplete
 454                                  * async transaction in the TT buffer.
 455                                  * We have to clear it.
 456                                  */
 457                                 ehci_clear_tt_buffer(ehci, qh, urb, token);
 458                         }
 459                 }
 460
 461                 /* unless we already know the urb's status, collect qtd status
 462                  * and update count of bytes transferred.  in common short read
 463                  * cases with only one data qtd (including control transfers),
 464                  * queue processing won't halt.  but with two or more qtds (for
 465                  * example, with a 32 KB transfer), when the first qtd gets a
 466                  * short read the second must be removed by hand.
 467                  */
 468                 if (last_status == -EINPROGRESS) {
 469                         last_status = qtd_copy_status(ehci, urb,
 470                                         qtd->length, token);
 471                         if (last_status == -EREMOTEIO
 472                                         && (qtd->hw_alt_next
 473                                                 & EHCI_LIST_END(ehci)))
 474                                 last_status = -EINPROGRESS;
 475
 476                         /* As part of low/full-speed endpoint-halt processing
 477                          * we must clear the TT buffer (11.17.5).
 478                          */
 479                         if (unlikely(last_status != -EINPROGRESS &&
 480                                         last_status != -EREMOTEIO)) {
 481                                 /* The TT's in some hubs malfunction when they
 482                                  * receive this request following a STALL (they
 483                                  * stop sending isochronous packets).  Since a
 484                                  * STALL can't leave the TT buffer in a busy
 485                                  * state (if you believe Figures 11-48 - 11-51
 486                                  * in the USB 2.0 spec), we won't clear the TT
 487                                  * buffer in this case.  Strictly speaking this
 488                                  * is a violation of the spec.
 489                                  */
 490                                 if (last_status != -EPIPE)
 491                                         ehci_clear_tt_buffer(ehci, qh, urb,
 492                                                         token);
 493                         }
 494                 }
 495
 496                 /* if we're removing something not at the queue head,
 497                  * patch the hardware queue pointer.
 498                  */
 499                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 500                         last = list_entry (qtd->qtd_list.prev,
 501                                         struct ehci_qtd, qtd_list);
 502                         last->hw_next = qtd->hw_next;
 503                 }
 504
 505                 /* remove qtd; it's recycled after possible urb completion */
 506                 list_del (&qtd->qtd_list);
 507                 last = qtd;
 508
 509                 /* reinit the xacterr counter for the next qtd */
 510                 qh->xacterrs = 0;
 511         }
 512
 513         /* last urb's completion might still need calling */
 514         if (likely (last != NULL)) {
 515                 ehci_urb_done(ehci, last->urb, last_status);
 516                 ehci_qtd_free (ehci, last);
 517         }
 518
 519         /* Do we need to rescan for URBs dequeued during a giveback? */
 520         if (unlikely(qh->dequeue_during_giveback)) {
 521                 /* If the QH is already unlinked, do the rescan now. */
 522                 if (state == QH_STATE_IDLE)
 523                         goto rescan;
 524
 525                 /* Otherwise the caller must unlink the QH. */
 526         }
 527
 528         /* restore original state; caller must unlink or relink */
 529         qh->qh_state = state;
 530
 531         /* be sure the hardware's done with the qh before refreshing
 532          * it after fault cleanup, or recovering from silicon wrongly
 533          * overlaying the dummy qtd (which reduces DMA chatter).
 534          *
 535          * We won't refresh a QH that's linked (after the HC
 536          * stopped the queue).  That avoids a race:
 537          *  - HC reads first part of QH;
 538          *  - CPU updates that first part and the token;
 539          *  - HC reads rest of that QH, including token
 540          * Result:  HC gets an inconsistent image, and then
 541          * DMAs to/from the wrong memory (corrupting it).
 542          *
 543          * That should be rare for interrupt transfers,
 544          * except maybe high bandwidth ...
 545          */
 546         if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
 547                 qh->exception = 1;
 548
 549         /* Let the caller know if the QH needs to be unlinked. */
 550         return qh->exception;
 551 }
 552
 553 /*-------------------------------------------------------------------------*/
 554
 555 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 556 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 557 // ... and packet size, for any kind of endpoint descriptor
 558 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 559
 560 /*
 561  * reverse of qh_urb_transaction:  free a list of TDs.
 562  * used for cleanup after errors, before HC sees an URB's TDs.
 563  */
 564 static void qtd_list_free (
 565         struct ehci_hcd         *ehci,
 566         struct urb              *urb,
 567         struct list_head        *qtd_list
 568 ) {
 569         struct list_head        *entry, *temp;
 570
 571         list_for_each_safe (entry, temp, qtd_list) {
 572                 struct ehci_qtd *qtd;
 573
 574                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 575                 list_del (&qtd->qtd_list);
 576                 ehci_qtd_free (ehci, qtd);
 577         }
 578 }
 579
 580 /*
 581  * create a list of filled qtds for this URB; won't link into qh.
 582  */
 583 static struct list_head *
 584 qh_urb_transaction (
 585         struct ehci_hcd         *ehci,
 586         struct urb              *urb,
 587         struct list_head        *head,
 588         gfp_t                   flags
 589 ) {
 590         struct ehci_qtd         *qtd, *qtd_prev;
 591         dma_addr_t              buf;
 592         int                     len, this_sg_len, maxpacket;
 593         int                     is_input;
 594         u32                     token;
 595         int                     i;
 596         struct scatterlist      *sg;
 597
 598         /*
 599          * URBs map to sequences of QTDs:  one logical transaction
 600          */
 601         qtd = ehci_qtd_alloc (ehci, flags);
 602         if (unlikely (!qtd))
 603                 return NULL;
 604         list_add_tail (&qtd->qtd_list, head);
 605         qtd->urb = urb;
 606
 607         token = QTD_STS_ACTIVE;
 608         token |= (EHCI_TUNE_CERR << 10);
 609         /* for split transactions, SplitXState initialized to zero */
 610
 611         len = urb->transfer_buffer_length;
 612         is_input = usb_pipein (urb->pipe);
 613         if (usb_pipecontrol (urb->pipe)) {
 614                 /* SETUP pid */
 615                 qtd_fill(ehci, qtd, urb->setup_dma,
 616                                 sizeof (struct usb_ctrlrequest),
 617                                 token | (2 /* "setup" */ << 8), 8);
 618
 619                 /* ... and always at least one more pid */
 620                 token ^= QTD_TOGGLE;
 621                 qtd_prev = qtd;
 622                 qtd = ehci_qtd_alloc (ehci, flags);
 623                 if (unlikely (!qtd))
 624                         goto cleanup;
 625                 qtd->urb = urb;
 626                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 627                 list_add_tail (&qtd->qtd_list, head);
 628
 629                 /* for zero length DATA stages, STATUS is always IN */
 630                 if (len == 0)
 631                         token |= (1 /* "in" */ << 8);
 632         }
 633
 634         /*
 635          * data transfer stage:  buffer setup
 636          */
 637         i = urb->num_mapped_sgs;
 638         if (len > 0 && i > 0) {
 639                 sg = urb->sg;
 640                 buf = sg_dma_address(sg);
 641
 642                 /* urb->transfer_buffer_length may be smaller than the
 643                  * size of the scatterlist (or vice versa)
 644                  */
 645                 this_sg_len = min_t(int, sg_dma_len(sg), len);
 646         } else {
 647                 sg = NULL;
 648                 buf = urb->transfer_dma;
 649                 this_sg_len = len;
 650         }
 651
 652         if (is_input)
 653                 token |= (1 /* "in" */ << 8);
 654         /* else it's already initted to "out" pid (0 << 8) */
 655
 656         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 657
 658         /*
 659          * buffer gets wrapped in one or more qtds;
 660          * last one may be "short" (including zero len)
 661          * and may serve as a control status ack
 662          */
 663         for (;;) {
 664                 int this_qtd_len;
 665
 666                 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
 667                                 maxpacket);
 668                 this_sg_len -= this_qtd_len;
 669                 len -= this_qtd_len;
 670                 buf += this_qtd_len;
 671
 672                 /*
 673                  * short reads advance to a "magic" dummy instead of the next
 674                  * qtd ... that forces the queue to stop, for manual cleanup.
 675                  * (this will usually be overridden later.)
 676                  */
 677                 if (is_input)
 678                         qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
 679
 680                 /* qh makes control packets use qtd toggle; maybe switch it */
 681                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 682                         token ^= QTD_TOGGLE;
 683
 684                 if (likely(this_sg_len <= 0)) {
 685                         if (--i <= 0 || len <= 0)
 686                                 break;
 687                         sg = sg_next(sg);
 688                         buf = sg_dma_address(sg);
 689                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 690                 }
 691
 692                 qtd_prev = qtd;
 693                 qtd = ehci_qtd_alloc (ehci, flags);
 694                 if (unlikely (!qtd))
 695                         goto cleanup;
 696                 qtd->urb = urb;
 697                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 698                 list_add_tail (&qtd->qtd_list, head);
 699         }
 700
 701         /*
 702          * unless the caller requires manual cleanup after short reads,
 703          * have the alt_next mechanism keep the queue running after the
 704          * last data qtd (the only one, for control and most other cases).
 705          */
 706         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 707                                 || usb_pipecontrol (urb->pipe)))
 708                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 709
 710         /*
 711          * control requests may need a terminating data "status" ack;
 712          * other OUT ones may need a terminating short packet
 713          * (zero length).
 714          */
 715         if (likely (urb->transfer_buffer_length != 0)) {
 716                 int     one_more = 0;
 717
 718                 if (usb_pipecontrol (urb->pipe)) {
 719                         one_more = 1;
 720                         token ^= 0x0100;        /* "in" <--> "out"  */
 721                         token |= QTD_TOGGLE;    /* force DATA1 */
 722                 } else if (usb_pipeout(urb->pipe)
 723                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 724                                 && !(urb->transfer_buffer_length % maxpacket)) {
 725                         one_more = 1;
 726                 }
 727                 if (one_more) {
 728                         qtd_prev = qtd;
 729                         qtd = ehci_qtd_alloc (ehci, flags);
 730                         if (unlikely (!qtd))
 731                                 goto cleanup;
 732                         qtd->urb = urb;
 733                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 734                         list_add_tail (&qtd->qtd_list, head);
 735
 736                         /* never any data in such packets */
 737                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 738                 }
 739         }
 740
 741         /* by default, enable interrupt on urb completion */
 742         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 743                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 744         return head;
 745
 746 cleanup:
 747         qtd_list_free (ehci, urb, head);
 748         return NULL;
 749 }
 750
 751 /*-------------------------------------------------------------------------*/
 752
 753 // Would be best to create all qh's from config descriptors,
 754 // when each interface/altsetting is established.  Unlink
 755 // any previous qh and cancel its urbs first; endpoints are
 756 // implicitly reset then (data toggle too).
 757 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 758
 759
 760 /*
 761  * Each QH holds a qtd list; a QH is used for everything except iso.
 762  *
 763  * For interrupt urbs, the scheduler must set the microframe scheduling
 764  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 765  * just one microframe in the s-mask.  For split interrupt transactions
 766  * there are additional complications: c-mask, maybe FSTNs.
 767  */
 768 static struct ehci_qh *
 769 qh_make (
 770         struct ehci_hcd         *ehci,
 771         struct urb              *urb,
 772         gfp_t                   flags
 773 ) {
 774         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 775         u32                     info1 = 0, info2 = 0;
 776         int                     is_input, type;
 777         int                     maxp = 0;
 778         struct usb_tt           *tt = urb->dev->tt;
 779         struct ehci_qh_hw       *hw;
 780
 781         if (!qh)
 782                 return qh;
 783
 784         /*
 785          * init endpoint/device data for this QH
 786          */
 787         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 788         info1 |= usb_pipedevice (urb->pipe) << 0;
 789
 790         is_input = usb_pipein (urb->pipe);
 791         type = usb_pipetype (urb->pipe);
 792         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 793
 794         /* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
 795          * acts like up to 3KB, but is built from smaller packets.
 796          */
 797         if (max_packet(maxp) > 1024) {
 798                 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
 799                 goto done;
 800         }
 801
 802         /* Compute interrupt scheduling parameters just once, and save.
 803          * - allowing for high bandwidth, how many nsec/uframe are used?
 804          * - split transactions need a second CSPLIT uframe; same question
 805          * - splits also need a schedule gap (for full/low speed I/O)
 806          * - qh has a polling interval
 807          *
 808          * For control/bulk requests, the HC or TT handles these.
 809          */
 810         if (type == PIPE_INTERRUPT) {
 811                 unsigned        tmp;
 812
 813                 qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
 814                                 is_input, 0,
 815                                 hb_mult(maxp) * max_packet(maxp)));
 816                 qh->ps.phase = NO_FRAME;
 817
 818                 if (urb->dev->speed == USB_SPEED_HIGH) {
 819                         qh->ps.c_usecs = 0;
 820                         qh->gap_uf = 0;
 821
 822                         if (urb->interval > 1 && urb->interval < 8) {
 823                                 /* NOTE interval 2 or 4 uframes could work.
 824                                  * But interval 1 scheduling is simpler, and
 825                                  * includes high bandwidth.
 826                                  */
 827                                 urb->interval = 1;
 828                         } else if (urb->interval > ehci->periodic_size << 3) {
 829                                 urb->interval = ehci->periodic_size << 3;
 830                         }
 831                         qh->ps.period = urb->interval >> 3;
 832
 833                         /* period for bandwidth allocation */
 834                         tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
 835                                         1 << (urb->ep->desc.bInterval - 1));
 836
 837                         /* Allow urb->interval to override */
 838                         qh->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
 839                         qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
 840                 } else {
 841                         int             think_time;
 842
 843                         /* gap is f(FS/LS transfer times) */
 844                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 845                                         is_input, 0, maxp) / (125 * 1000);
 846
 847                         /* FIXME this just approximates SPLIT/CSPLIT times */
 848                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 849                                 qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
 850                                 qh->ps.usecs = HS_USECS(1);
 851                         } else {                // SPLIT+DATA, gap, CSPLIT
 852                                 qh->ps.usecs += HS_USECS(1);
 853                                 qh->ps.c_usecs = HS_USECS(0);
 854                         }
 855
 856                         think_time = tt ? tt->think_time : 0;
 857                         qh->ps.tt_usecs = NS_TO_US(think_time +
 858                                         usb_calc_bus_time (urb->dev->speed,
 859                                         is_input, 0, max_packet (maxp)));
 860                         if (urb->interval > ehci->periodic_size)
 861                                 urb->interval = ehci->periodic_size;
 862                         qh->ps.period = urb->interval;
 863
 864                         /* period for bandwidth allocation */
 865                         tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
 866                                         urb->ep->desc.bInterval);
 867                         tmp = rounddown_pow_of_two(tmp);
 868
 869                         /* Allow urb->interval to override */
 870                         qh->ps.bw_period = min_t(unsigned, tmp, urb->interval);
 871                         qh->ps.bw_uperiod = qh->ps.bw_period << 3;
 872                 }
 873         }
 874
 875         /* support for tt scheduling, and access to toggles */
 876         qh->ps.udev = urb->dev;
 877         qh->ps.ep = urb->ep;
 878
 879         /* using TT? */
 880         switch (urb->dev->speed) {
 881         case USB_SPEED_LOW:
 882                 info1 |= QH_LOW_SPEED;
 883                 /* FALL THROUGH */
 884
 885         case USB_SPEED_FULL:
 886                 /* EPS 0 means "full" */
 887                 if (type != PIPE_INTERRUPT)
 888                         info1 |= (EHCI_TUNE_RL_TT << 28);
 889                 if (type == PIPE_CONTROL) {
 890                         info1 |= QH_CONTROL_EP;         /* for TT */
 891                         info1 |= QH_TOGGLE_CTL;         /* toggle from qtd */
 892                 }
 893                 info1 |= maxp << 16;
 894
 895                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 896
 897                 /* Some Freescale processors have an erratum in which the
 898                  * port number in the queue head was 0..N-1 instead of 1..N.
 899                  */
 900                 if (ehci_has_fsl_portno_bug(ehci))
 901                         info2 |= (urb->dev->ttport-1) << 23;
 902                 else
 903                         info2 |= urb->dev->ttport << 23;
 904
 905                 /* set the address of the TT; for TDI's integrated
 906                  * root hub tt, leave it zeroed.
 907                  */
 908                 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
 909                         info2 |= tt->hub->devnum << 16;
 910
 911                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 912
 913                 break;
 914
 915         case USB_SPEED_HIGH:            /* no TT involved */
 916                 info1 |= QH_HIGH_SPEED;
 917                 if (type == PIPE_CONTROL) {
 918                         info1 |= (EHCI_TUNE_RL_HS << 28);
 919                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 920                         info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
 921                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 922                 } else if (type == PIPE_BULK) {
 923                         info1 |= (EHCI_TUNE_RL_HS << 28);
 924                         /* The USB spec says that high speed bulk endpoints
 925                          * always use 512 byte maxpacket.  But some device
 926                          * vendors decided to ignore that, and MSFT is happy
 927                          * to help them do so.  So now people expect to use
 928                          * such nonconformant devices with Linux too; sigh.
 929                          */
 930                         info1 |= max_packet(maxp) << 16;
 931                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 932                 } else {                /* PIPE_INTERRUPT */
 933                         info1 |= max_packet (maxp) << 16;
 934                         info2 |= hb_mult (maxp) << 30;
 935                 }
 936                 break;
 937         default:
 938                 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
 939                         urb->dev->speed);
 940 done:
 941                 qh_destroy(ehci, qh);
 942                 return NULL;
 943         }
 944
 945         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 946
 947         /* init as live, toggle clear */
 948         qh->qh_state = QH_STATE_IDLE;
 949         hw = qh->hw;
 950         hw->hw_info1 = cpu_to_hc32(ehci, info1);
 951         hw->hw_info2 = cpu_to_hc32(ehci, info2);
 952         qh->is_out = !is_input;
 953         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 954         return qh;
 955 }
 956
 957 /*-------------------------------------------------------------------------*/
 958
 959 static void enable_async(struct ehci_hcd *ehci)
 960 {
 961         if (ehci->async_count++)
 962                 return;
 963
 964         /* Stop waiting to turn off the async schedule */
 965         ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
 966
 967         /* Don't start the schedule until ASS is 0 */
 968         ehci_poll_ASS(ehci);
 969         turn_on_io_watchdog(ehci);
 970 }
 971
 972 static void disable_async(struct ehci_hcd *ehci)
 973 {
 974         if (--ehci->async_count)
 975                 return;
 976
 977         /* The async schedule and unlink lists are supposed to be empty */
 978         WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
 979                         !list_empty(&ehci->async_idle));
 980
 981         /* Don't turn off the schedule until ASS is 1 */
 982         ehci_poll_ASS(ehci);
 983 }
 984
 985 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 986
 987 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 988 {
 989         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 990         struct ehci_qh  *head;
 991
 992         /* Don't link a QH if there's a Clear-TT-Buffer pending */
 993         if (unlikely(qh->clearing_tt))
 994                 return;
 995
 996         WARN_ON(qh->qh_state != QH_STATE_IDLE);
 997
 998         /* clear halt and/or toggle; and maybe recover from silicon quirk */
 999         qh_refresh(ehci, qh);
1000
1001         /* splice right after start */
1002         head = ehci->async;
1003         qh->qh_next = head->qh_next;
1004         qh->hw->hw_next = head->hw->hw_next;
1005         wmb ();
1006
1007         head->qh_next.qh = qh;
1008         head->hw->hw_next = dma;
1009
1010         qh->qh_state = QH_STATE_LINKED;
1011         qh->xacterrs = 0;
1012         qh->exception = 0;
1013         /* qtd completions reported later by interrupt */
1014
1015         enable_async(ehci);
1016 }
1017
1018 /*-------------------------------------------------------------------------*/
1019
1020 /*
1021  * For control/bulk/interrupt, return QH with these TDs appended.
1022  * Allocates and initializes the QH if necessary.
1023  * Returns null if it can't allocate a QH it needs to.
1024  * If the QH has TDs (urbs) already, that's great.
1025  */
1026 static struct ehci_qh *qh_append_tds (
1027         struct ehci_hcd         *ehci,
1028         struct urb              *urb,
1029         struct list_head        *qtd_list,
1030         int                     epnum,
1031         void                    **ptr
1032 )
1033 {
1034         struct ehci_qh          *qh = NULL;
1035         __hc32                  qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1036
1037         qh = (struct ehci_qh *) *ptr;
1038         if (unlikely (qh == NULL)) {
1039                 /* can't sleep here, we have ehci->lock... */
1040                 qh = qh_make (ehci, urb, GFP_ATOMIC);
1041                 *ptr = qh;
1042         }
1043         if (likely (qh != NULL)) {
1044                 struct ehci_qtd *qtd;
1045
1046                 if (unlikely (list_empty (qtd_list)))
1047                         qtd = NULL;
1048                 else
1049                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
1050                                         qtd_list);
1051
1052                 /* control qh may need patching ... */
1053                 if (unlikely (epnum == 0)) {
1054
1055                         /* usb_reset_device() briefly reverts to address 0 */
1056                         if (usb_pipedevice (urb->pipe) == 0)
1057                                 qh->hw->hw_info1 &= ~qh_addr_mask;
1058                 }
1059
1060                 /* just one way to queue requests: swap with the dummy qtd.
1061                  * only hc or qh_refresh() ever modify the overlay.
1062                  */
1063                 if (likely (qtd != NULL)) {
1064                         struct ehci_qtd         *dummy;
1065                         dma_addr_t              dma;
1066                         __hc32                  token;
1067
1068                         /* to avoid racing the HC, use the dummy td instead of
1069                          * the first td of our list (becomes new dummy).  both
1070                          * tds stay deactivated until we're done, when the
1071                          * HC is allowed to fetch the old dummy (4.10.2).
1072                          */
1073                         token = qtd->hw_token;
1074                         qtd->hw_token = HALT_BIT(ehci);
1075
1076                         dummy = qh->dummy;
1077
1078                         dma = dummy->qtd_dma;
1079                         *dummy = *qtd;
1080                         dummy->qtd_dma = dma;
1081
1082                         list_del (&qtd->qtd_list);
1083                         list_add (&dummy->qtd_list, qtd_list);
1084                         list_splice_tail(qtd_list, &qh->qtd_list);
1085
1086                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1087                         qh->dummy = qtd;
1088
1089                         /* hc must see the new dummy at list end */
1090                         dma = qtd->qtd_dma;
1091                         qtd = list_entry (qh->qtd_list.prev,
1092                                         struct ehci_qtd, qtd_list);
1093                         qtd->hw_next = QTD_NEXT(ehci, dma);
1094
1095                         /* let the hc process these next qtds */
1096                         wmb ();
1097                         dummy->hw_token = token;
1098
1099                         urb->hcpriv = qh;
1100                 }
1101         }
1102         return qh;
1103 }
1104
1105 /*-------------------------------------------------------------------------*/
1106
1107 static int
1108 submit_async (
1109         struct ehci_hcd         *ehci,
1110         struct urb              *urb,
1111         struct list_head        *qtd_list,
1112         gfp_t                   mem_flags
1113 ) {
1114         int                     epnum;
1115         unsigned long           flags;
1116         struct ehci_qh          *qh = NULL;
1117         int                     rc;
1118
1119         epnum = urb->ep->desc.bEndpointAddress;
1120
1121 #ifdef EHCI_URB_TRACE
1122         {
1123                 struct ehci_qtd *qtd;
1124                 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1125                 ehci_dbg(ehci,
1126                          "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1127                          __func__, urb->dev->devpath, urb,
1128                          epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1129                          urb->transfer_buffer_length,
1130                          qtd, urb->ep->hcpriv);
1131         }
1132 #endif
1133
1134         spin_lock_irqsave (&ehci->lock, flags);
1135         if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1136                 rc = -ESHUTDOWN;
1137                 goto done;
1138         }
1139         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1140         if (unlikely(rc))
1141                 goto done;
1142
1143         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1144         if (unlikely(qh == NULL)) {
1145                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1146                 rc = -ENOMEM;
1147                 goto done;
1148         }
1149
1150         /* Control/bulk operations through TTs don't need scheduling,
1151          * the HC and TT handle it when the TT has a buffer ready.
1152          */
1153         if (likely (qh->qh_state == QH_STATE_IDLE))
1154                 qh_link_async(ehci, qh);
1155  done:
1156         spin_unlock_irqrestore (&ehci->lock, flags);
1157         if (unlikely (qh == NULL))
1158                 qtd_list_free (ehci, urb, qtd_list);
1159         return rc;
1160 }
1161
1162 /*-------------------------------------------------------------------------*/
1163 #ifdef CONFIG_USB_HCD_TEST_MODE
1164 /*
1165  * This function creates the qtds and submits them for the
1166  * SINGLE_STEP_SET_FEATURE Test.
1167  * This is done in two parts: first SETUP req for GetDesc is sent then
1168  * 15 seconds later, the IN stage for GetDesc starts to req data from dev
1169  *
1170  * is_setup : i/p arguement decides which of the two stage needs to be
1171  * performed; TRUE - SETUP and FALSE - IN+STATUS
1172  * Returns 0 if success
1173  */
1174 static int submit_single_step_set_feature(
1175         struct usb_hcd  *hcd,
1176         struct urb      *urb,
1177         int             is_setup
1178 ) {
1179         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1180         struct list_head        qtd_list;
1181         struct list_head        *head;
1182
1183         struct ehci_qtd         *qtd, *qtd_prev;
1184         dma_addr_t              buf;
1185         int                     len, maxpacket;
1186         u32                     token;
1187
1188         INIT_LIST_HEAD(&qtd_list);
1189         head = &qtd_list;
1190
1191         /* URBs map to sequences of QTDs:  one logical transaction */
1192         qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
1193         if (unlikely(!qtd))
1194                 return -1;
1195         list_add_tail(&qtd->qtd_list, head);
1196         qtd->urb = urb;
1197
1198         token = QTD_STS_ACTIVE;
1199         token |= (EHCI_TUNE_CERR << 10);
1200
1201         len = urb->transfer_buffer_length;
1202         /*
1203          * Check if the request is to perform just the SETUP stage (getDesc)
1204          * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
1205          * 15 secs after the setup
1206          */
1207         if (is_setup) {
1208                 /* SETUP pid */
1209                 qtd_fill(ehci, qtd, urb->setup_dma,
1210                                 sizeof(struct usb_ctrlrequest),
1211                                 token | (2 /* "setup" */ << 8), 8);
1212
1213                 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
1214                 return 0; /*Return now; we shall come back after 15 seconds*/
1215         }
1216
1217         /*
1218          * IN: data transfer stage:  buffer setup : start the IN txn phase for
1219          * the get_Desc SETUP which was sent 15seconds back
1220          */
1221         token ^= QTD_TOGGLE;   /*We need to start IN with DATA-1 Pid-sequence*/
1222         buf = urb->transfer_dma;
1223
1224         token |= (1 /* "in" */ << 8);  /*This is IN stage*/
1225
1226         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, 0));
1227
1228         qtd_fill(ehci, qtd, buf, len, token, maxpacket);
1229
1230         /*
1231          * Our IN phase shall always be a short read; so keep the queue running
1232          * and let it advance to the next qtd which zero length OUT status
1233          */
1234         qtd->hw_alt_next = EHCI_LIST_END(ehci);
1235
1236         /* STATUS stage for GetDesc control request */
1237         token ^= 0x0100;        /* "in" <--> "out"  */
1238         token |= QTD_TOGGLE;    /* force DATA1 */
1239
1240         qtd_prev = qtd;
1241         qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
1242         if (unlikely(!qtd))
1243                 goto cleanup;
1244         qtd->urb = urb;
1245         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1246         list_add_tail(&qtd->qtd_list, head);
1247
1248         /* dont fill any data in such packets */
1249         qtd_fill(ehci, qtd, 0, 0, token, 0);
1250
1251         /* by default, enable interrupt on urb completion */
1252         if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
1253                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
1254
1255         submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
1256
1257         return 0;
1258
1259 cleanup:
1260         qtd_list_free(ehci, urb, head);
1261         return -1;
1262 }
1263 #endif /* CONFIG_USB_HCD_TEST_MODE */
1264
1265 /*-------------------------------------------------------------------------*/
1266
1267 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1268 {
1269         struct ehci_qh          *prev;
1270
1271         /* Add to the end of the list of QHs waiting for the next IAAD */
1272         qh->qh_state = QH_STATE_UNLINK_WAIT;
1273         list_add_tail(&qh->unlink_node, &ehci->async_unlink);
1274
1275         /* Unlink it from the schedule */
1276         prev = ehci->async;
1277         while (prev->qh_next.qh != qh)
1278                 prev = prev->qh_next.qh;
1279
1280         prev->hw->hw_next = qh->hw->hw_next;
1281         prev->qh_next = qh->qh_next;
1282         if (ehci->qh_scan_next == qh)
1283                 ehci->qh_scan_next = qh->qh_next.qh;
1284 }
1285
1286 static void start_iaa_cycle(struct ehci_hcd *ehci)
1287 {
1288         /* Do nothing if an IAA cycle is already running */
1289         if (ehci->iaa_in_progress)
1290                 return;
1291         ehci->iaa_in_progress = true;
1292
1293         /* If the controller isn't running, we don't have to wait for it */
1294         if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1295                 end_unlink_async(ehci);
1296
1297         /* Otherwise start a new IAA cycle */
1298         } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
1299
1300                 /* Make sure the unlinks are all visible to the hardware */
1301                 wmb();
1302
1303                 ehci_writel(ehci, ehci->command | CMD_IAAD,
1304                                 &ehci->regs->command);
1305                 ehci_readl(ehci, &ehci->regs->command);
1306                 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1307         }
1308 }
1309
1310 /* the async qh for the qtds being unlinked are now gone from the HC */
1311
1312 static void end_unlink_async(struct ehci_hcd *ehci)
1313 {
1314         struct ehci_qh          *qh;
1315         bool                    early_exit;
1316
1317         if (ehci->has_synopsys_hc_bug)
1318                 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1319                             &ehci->regs->async_next);
1320
1321         /* The current IAA cycle has ended */
1322         ehci->iaa_in_progress = false;
1323
1324         if (list_empty(&ehci->async_unlink))
1325                 return;
1326         qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
1327                         unlink_node);   /* QH whose IAA cycle just ended */
1328
1329         /*
1330          * If async_unlinking is set then this routine is already running,
1331          * either on the stack or on another CPU.
1332          */
1333         early_exit = ehci->async_unlinking;
1334
1335         /* If the controller isn't running, process all the waiting QHs */
1336         if (ehci->rh_state < EHCI_RH_RUNNING)
1337                 list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
1338
1339         /*
1340          * Intel (?) bug: The HC can write back the overlay region even
1341          * after the IAA interrupt occurs.  In self-defense, always go
1342          * through two IAA cycles for each QH.
1343          */
1344         else if (qh->qh_state == QH_STATE_UNLINK_WAIT) {
1345                 qh->qh_state = QH_STATE_UNLINK;
1346                 early_exit = true;
1347         }
1348
1349         /* Otherwise process only the first waiting QH (NVIDIA bug?) */
1350         else
1351                 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1352
1353         /* Start a new IAA cycle if any QHs are waiting for it */
1354         if (!list_empty(&ehci->async_unlink))
1355                 start_iaa_cycle(ehci);
1356
1357         /*
1358          * Don't allow nesting or concurrent calls,
1359          * or wait for the second IAA cycle for the next QH.
1360          */
1361         if (early_exit)
1362                 return;
1363
1364         /* Process the idle QHs */
1365         ehci->async_unlinking = true;
1366         while (!list_empty(&ehci->async_idle)) {
1367                 qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
1368                                 unlink_node);
1369                 list_del(&qh->unlink_node);
1370
1371                 qh->qh_state = QH_STATE_IDLE;
1372                 qh->qh_next.qh = NULL;
1373
1374                 if (!list_empty(&qh->qtd_list))
1375                         qh_completions(ehci, qh);
1376                 if (!list_empty(&qh->qtd_list) &&
1377                                 ehci->rh_state == EHCI_RH_RUNNING)
1378                         qh_link_async(ehci, qh);
1379                 disable_async(ehci);
1380         }
1381         ehci->async_unlinking = false;
1382 }
1383
1384 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
1385
1386 static void unlink_empty_async(struct ehci_hcd *ehci)
1387 {
1388         struct ehci_qh          *qh;
1389         struct ehci_qh          *qh_to_unlink = NULL;
1390         int                     count = 0;
1391
1392         /* Find the last async QH which has been empty for a timer cycle */
1393         for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
1394                 if (list_empty(&qh->qtd_list) &&
1395                                 qh->qh_state == QH_STATE_LINKED) {
1396                         ++count;
1397                         if (qh->unlink_cycle != ehci->async_unlink_cycle)
1398                                 qh_to_unlink = qh;
1399                 }
1400         }
1401
1402         /* If nothing else is being unlinked, unlink the last empty QH */
1403         if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
1404                 start_unlink_async(ehci, qh_to_unlink);
1405                 --count;
1406         }
1407
1408         /* Other QHs will be handled later */
1409         if (count > 0) {
1410                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1411                 ++ehci->async_unlink_cycle;
1412         }
1413 }
1414
1415 /* The root hub is suspended; unlink all the async QHs */
1416 static void __maybe_unused unlink_empty_async_suspended(struct ehci_hcd *ehci)
1417 {
1418         struct ehci_qh          *qh;
1419
1420         while (ehci->async->qh_next.qh) {
1421                 qh = ehci->async->qh_next.qh;
1422                 WARN_ON(!list_empty(&qh->qtd_list));
1423                 single_unlink_async(ehci, qh);
1424         }
1425         start_iaa_cycle(ehci);
1426 }
1427
1428 /* makes sure the async qh will become idle */
1429 /* caller must own ehci->lock */
1430
1431 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1432 {
1433         /* If the QH isn't linked then there's nothing we can do. */
1434         if (qh->qh_state != QH_STATE_LINKED)
1435                 return;
1436
1437         single_unlink_async(ehci, qh);
1438         start_iaa_cycle(ehci);
1439 }
1440
1441 /*-------------------------------------------------------------------------*/
1442
1443 static void scan_async (struct ehci_hcd *ehci)
1444 {
1445         struct ehci_qh          *qh;
1446         bool                    check_unlinks_later = false;
1447
1448         ehci->qh_scan_next = ehci->async->qh_next.qh;
1449         while (ehci->qh_scan_next) {
1450                 qh = ehci->qh_scan_next;
1451                 ehci->qh_scan_next = qh->qh_next.qh;
1452
1453                 /* clean any finished work for this qh */
1454                 if (!list_empty(&qh->qtd_list)) {
1455                         int temp;
1456
1457                         /*
1458                          * Unlinks could happen here; completion reporting
1459                          * drops the lock.  That's why ehci->qh_scan_next
1460                          * always holds the next qh to scan; if the next qh
1461                          * gets unlinked then ehci->qh_scan_next is adjusted
1462                          * in single_unlink_async().
1463                          */
1464                         temp = qh_completions(ehci, qh);
1465                         if (unlikely(temp)) {
1466                                 start_unlink_async(ehci, qh);
1467                         } else if (list_empty(&qh->qtd_list)
1468                                         && qh->qh_state == QH_STATE_LINKED) {
1469                                 qh->unlink_cycle = ehci->async_unlink_cycle;
1470                                 check_unlinks_later = true;
1471                         }
1472                 }
1473         }
1474
1475         /*
1476          * Unlink empty entries, reducing DMA usage as well
1477          * as HCD schedule-scanning costs.  Delay for any qh
1478          * we just scanned, there's a not-unusual case that it
1479          * doesn't stay idle for long.
1480          */
1481         if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1482                         !(ehci->enabled_hrtimer_events &
1483                                 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1484                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1485                 ++ehci->async_unlink_cycle;
1486         }
1487 }