2 * (C) Copyright 2011 Ilya Yanok, Emcraft Systems
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
6 * Derived from Beagle Board code by
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
32 #include <asm/arch/clocks.h>
33 #include <asm/arch/clocks_omap3.h>
34 #include <asm/arch/ehci_omap3.h>
35 #include <asm/arch/sys_proto.h>
36 #include "ehci-core.h"
38 inline int __board_usb_init(void)
42 int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
44 #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
45 defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
46 /* controls PHY(s) reset signal(s) */
47 static inline void omap_ehci_phy_reset(int on, int delay)
51 * Hold the PHY in RESET for enough time till
52 * PHY is settled and ready
56 #ifdef CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
57 gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB PHY1 reset");
58 gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, !on);
60 #ifdef CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
61 gpio_request(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, "USB PHY2 reset");
62 gpio_direction_output(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, !on);
65 /* Hold the PHY in RESET for enough time till DIR is high */
71 #define omap_ehci_phy_reset(on, delay) do {} while (0)
74 /* Reset is needed otherwise the kernel-driver will throw an error. */
75 int ehci_hcd_stop(void)
77 debug("Resetting OMAP3 EHCI\n");
78 omap_ehci_phy_reset(1, 0);
79 writel(OMAP_UHH_SYSCONFIG_SOFTRESET,
80 OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
81 /* disable USB clocks */
82 struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
83 sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
84 sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
85 sr32(&prcm_base->iclken3_core, 2, 1, 0);
86 sr32(&prcm_base->fclken3_core, 2, 1, 0);
91 * Initialize the OMAP3 EHCI controller and PHY.
92 * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
93 * See there for additional Copyrights.
95 int ehci_hcd_init(void)
99 debug("Initializing OMAP3 EHCI\n");
101 ret = board_usb_init();
105 /* Put the PHY in RESET */
106 omap_ehci_phy_reset(1, 10);
108 struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
109 /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
110 sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
112 * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
113 * and USBHOST_120M_FCLK (USBHOST_FCLK2)
115 sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
116 /* Enable USBTTL_ICLK */
117 sr32(&prcm_base->iclken3_core, 2, 1, 1);
118 /* Enable USBTTL_FCLK */
119 sr32(&prcm_base->fclken3_core, 2, 1, 1);
120 debug("USB clocks enabled\n");
122 /* perform TLL soft reset, and wait until reset is complete */
123 writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
124 OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
125 /* Wait for TLL reset to complete */
126 while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
127 & OMAP_USBTLL_SYSSTATUS_RESETDONE))
129 debug("TLL reset done\n");
131 writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
132 OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
133 OMAP_USBTLL_SYSCONFIG_CACTIVITY,
134 OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
136 /* Put UHH in NoIdle/NoStandby mode */
137 writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
138 | OMAP_UHH_SYSCONFIG_SIDLEMODE
139 | OMAP_UHH_SYSCONFIG_CACTIVITY
140 | OMAP_UHH_SYSCONFIG_MIDLEMODE,
141 OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
143 /* setup burst configurations */
144 writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
145 | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
146 | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
147 OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
149 omap_ehci_phy_reset(0, 10);
151 hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
152 hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
154 debug("OMAP3 EHCI init done\n");