2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
34 volatile struct ehci_hcor *hcor;
36 static uint16_t portreset;
37 static struct QH qh_list __attribute__((aligned(32)));
39 static struct descriptor {
40 struct usb_hub_descriptor hub;
41 struct usb_device_descriptor device;
42 struct usb_linux_config_descriptor config;
43 struct usb_linux_interface_descriptor interface;
44 struct usb_endpoint_descriptor endpoint;
45 } __attribute__ ((packed)) descriptor = {
47 0x8, /* bDescLength */
48 0x29, /* bDescriptorType: hub descriptor */
49 2, /* bNrPorts -- runtime modified */
50 0, /* wHubCharacteristics */
51 0xff, /* bPwrOn2PwrGood */
52 0, /* bHubCntrCurrent */
53 {}, /* Device removable */
54 {} /* at most 7 ports! XXX */
58 1, /* bDescriptorType: UDESC_DEVICE */
59 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
60 9, /* bDeviceClass: UDCLASS_HUB */
61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
62 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
63 64, /* bMaxPacketSize: 64 bytes */
64 0x0000, /* idVendor */
65 0x0000, /* idProduct */
66 cpu_to_le16(0x0100), /* bcdDevice */
67 1, /* iManufacturer */
69 0, /* iSerialNumber */
70 1 /* bNumConfigurations: 1 */
74 2, /* bDescriptorType: UDESC_CONFIG */
76 1, /* bNumInterface */
77 1, /* bConfigurationValue */
78 0, /* iConfiguration */
79 0x40, /* bmAttributes: UC_SELF_POWER */
84 4, /* bDescriptorType: UDESC_INTERFACE */
85 0, /* bInterfaceNumber */
86 0, /* bAlternateSetting */
87 1, /* bNumEndpoints */
88 9, /* bInterfaceClass: UICLASS_HUB */
89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
95 5, /* bDescriptorType: UDESC_ENDPOINT */
96 0x81, /* bEndpointAddress:
97 * UE_DIR_IN | EHCI_INTR_ENDPT
99 3, /* bmAttributes: UE_INTERRUPT */
100 8, /* wMaxPacketSize */
105 #if defined(CONFIG_EHCI_IS_TDI)
106 #define ehci_is_TDI() (1)
108 #define ehci_is_TDI() (0)
111 #if defined(CONFIG_EHCI_DCACHE)
113 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
114 * structures and data buffers. This is needed on platforms using this
115 * EHCI support with dcache enabled.
117 static void flush_invalidate(u32 addr, int size, int flush)
120 flush_dcache_range(addr, addr + size);
122 invalidate_dcache_range(addr, addr + size);
125 static void cache_qtd(struct qTD *qtd, int flush)
127 u32 *ptr = (u32 *)qtd->qt_buffer[0];
128 int len = (qtd->qt_token & 0x7fff0000) >> 16;
130 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
132 flush_invalidate((u32)ptr, len, flush);
136 static inline struct QH *qh_addr(struct QH *qh)
138 return (struct QH *)((u32)qh & 0xffffffe0);
141 static void cache_qh(struct QH *qh, int flush)
145 static struct qTD *first_qtd;
148 * Walk the QH list and flush/invalidate all entries
151 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
152 if ((u32)qh & QH_LINK_TYPE_QH)
155 qh = (struct QH *)qh->qh_link;
160 * Save first qTD pointer, needed for invalidating pass on this QH
163 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
169 * Walk the qTD list and flush/invalidate all entries
174 cache_qtd(qtd, flush);
175 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
182 static inline void ehci_flush_dcache(struct QH *qh)
187 static inline void ehci_invalidate_dcache(struct QH *qh)
191 #else /* CONFIG_EHCI_DCACHE */
195 static inline void ehci_flush_dcache(struct QH *qh)
199 static inline void ehci_invalidate_dcache(struct QH *qh)
202 #endif /* CONFIG_EHCI_DCACHE */
204 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
208 result = ehci_readl(ptr);
210 if (result == ~(uint32_t)0)
220 static void ehci_free(void *p, size_t sz)
225 static int ehci_reset(void)
232 cmd = ehci_readl(&hcor->or_usbcmd);
233 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
234 ehci_writel(&hcor->or_usbcmd, cmd);
235 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
237 printf("EHCI fail to reset\n");
242 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
243 tmp = ehci_readl(reg_ptr);
244 tmp |= USBMODE_CM_HC;
245 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
248 ehci_writel(reg_ptr, tmp);
254 static void *ehci_alloc(size_t sz, size_t align)
256 static struct QH qh __attribute__((aligned(32)));
257 static struct qTD td[3] __attribute__((aligned (32)));
262 case sizeof(struct QH):
266 case sizeof(struct qTD):
268 debug("out of TDs\n");
275 debug("unknown allocation size\n");
283 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
285 uint32_t addr, delta, next;
288 addr = (uint32_t) buf;
291 td->qt_buffer[idx] = cpu_to_hc32(addr);
292 td->qt_buffer_hi[idx] = 0;
293 next = (addr + 4096) & ~4095;
303 debug("out of buffer pointers (%u bytes left)\n", sz);
311 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
312 int length, struct devrequest *req)
316 volatile struct qTD *vtd;
319 uint32_t endpt, token, usbsts;
324 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
325 buffer, length, req);
327 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
328 req->request, req->request,
329 req->requesttype, req->requesttype,
330 le16_to_cpu(req->value), le16_to_cpu(req->value),
331 le16_to_cpu(req->index));
333 qh = ehci_alloc(sizeof(struct QH), 32);
335 debug("unable to allocate QH\n");
338 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
339 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
340 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
343 (usb_maxpacket(dev, pipe) << 16) |
346 (usb_pipespeed(pipe) << 12) |
347 (usb_pipeendpoint(pipe) << 8) |
348 (0 << 7) | (usb_pipedevice(pipe) << 0);
349 qh->qh_endpt1 = cpu_to_hc32(endpt);
351 (dev->portnr << 23) |
352 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
353 qh->qh_endpt2 = cpu_to_hc32(endpt);
354 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
357 tdp = &qh->qh_overlay.qt_next;
360 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
363 td = ehci_alloc(sizeof(struct qTD), 32);
365 debug("unable to allocate SETUP td\n");
368 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
369 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
371 (sizeof(*req) << 16) |
372 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
373 td->qt_token = cpu_to_hc32(token);
374 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
375 debug("unable construct SETUP td\n");
376 ehci_free(td, sizeof(*td));
379 *tdp = cpu_to_hc32((uint32_t) td);
384 if (length > 0 || req == NULL) {
385 td = ehci_alloc(sizeof(struct qTD), 32);
387 debug("unable to allocate DATA td\n");
390 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
391 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
392 token = (toggle << 31) |
394 ((req == NULL ? 1 : 0) << 15) |
397 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
398 td->qt_token = cpu_to_hc32(token);
399 if (ehci_td_buffer(td, buffer, length) != 0) {
400 debug("unable construct DATA td\n");
401 ehci_free(td, sizeof(*td));
404 *tdp = cpu_to_hc32((uint32_t) td);
409 td = ehci_alloc(sizeof(struct qTD), 32);
411 debug("unable to allocate ACK td\n");
414 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
415 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
416 token = (toggle << 31) |
421 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
422 td->qt_token = cpu_to_hc32(token);
423 *tdp = cpu_to_hc32((uint32_t) td);
427 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
430 ehci_flush_dcache(&qh_list);
432 usbsts = ehci_readl(&hcor->or_usbsts);
433 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
435 /* Enable async. schedule. */
436 cmd = ehci_readl(&hcor->or_usbcmd);
438 ehci_writel(&hcor->or_usbcmd, cmd);
440 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
443 printf("EHCI fail timeout STD_ASS set\n");
447 /* Wait for TDs to be processed. */
451 /* Invalidate dcache */
452 ehci_invalidate_dcache(&qh_list);
453 token = hc32_to_cpu(vtd->qt_token);
457 } while (get_timer(ts) < CONFIG_SYS_HZ);
459 /* Disable async schedule. */
460 cmd = ehci_readl(&hcor->or_usbcmd);
462 ehci_writel(&hcor->or_usbcmd, cmd);
464 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
467 printf("EHCI fail timeout STD_ASS reset\n");
471 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
473 token = hc32_to_cpu(qh->qh_overlay.qt_token);
474 if (!(token & 0x80)) {
475 debug("TOKEN=%#x\n", token);
476 switch (token & 0xfc) {
478 toggle = token >> 31;
479 usb_settoggle(dev, usb_pipeendpoint(pipe),
480 usb_pipeout(pipe), toggle);
484 dev->status = USB_ST_STALLED;
488 dev->status = USB_ST_BUF_ERR;
492 dev->status = USB_ST_BABBLE_DET;
495 dev->status = USB_ST_CRC_ERR;
496 if ((token & 0x40) == 0x40)
497 dev->status |= USB_ST_STALLED;
500 dev->act_len = length - ((token >> 16) & 0x7fff);
503 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
504 dev->devnum, ehci_readl(&hcor->or_usbsts),
505 ehci_readl(&hcor->or_portsc[0]),
506 ehci_readl(&hcor->or_portsc[1]));
509 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
512 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
513 while (td != (void *)QT_NEXT_TERMINATE) {
514 qh->qh_overlay.qt_next = td->qt_next;
515 ehci_free(td, sizeof(*td));
516 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
518 ehci_free(qh, sizeof(*qh));
522 static inline int min3(int a, int b, int c)
533 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
534 int length, struct devrequest *req)
541 uint32_t *status_reg;
543 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
544 printf("The request port(%d) is not configured\n",
545 le16_to_cpu(req->index) - 1);
548 status_reg = (uint32_t *)&hcor->or_portsc[
549 le16_to_cpu(req->index) - 1];
552 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
553 req->request, req->request,
554 req->requesttype, req->requesttype,
555 le16_to_cpu(req->value), le16_to_cpu(req->index));
557 typeReq = req->request | req->requesttype << 8;
560 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
561 switch (le16_to_cpu(req->value) >> 8) {
563 debug("USB_DT_DEVICE request\n");
564 srcptr = &descriptor.device;
568 debug("USB_DT_CONFIG config\n");
569 srcptr = &descriptor.config;
573 debug("USB_DT_STRING config\n");
574 switch (le16_to_cpu(req->value) & 0xff) {
575 case 0: /* Language */
580 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
583 case 2: /* Product */
584 srcptr = "\52\3E\0H\0C\0I\0 "
586 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
590 debug("unknown value DT_STRING %x\n",
591 le16_to_cpu(req->value));
596 debug("unknown value %x\n", le16_to_cpu(req->value));
600 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
601 switch (le16_to_cpu(req->value) >> 8) {
603 debug("USB_DT_HUB config\n");
604 srcptr = &descriptor.hub;
608 debug("unknown value %x\n", le16_to_cpu(req->value));
612 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
613 debug("USB_REQ_SET_ADDRESS\n");
614 rootdev = le16_to_cpu(req->value);
616 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
617 debug("USB_REQ_SET_CONFIGURATION\n");
620 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
621 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
626 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
627 memset(tmpbuf, 0, 4);
628 reg = ehci_readl(status_reg);
629 if (reg & EHCI_PS_CS)
630 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
631 if (reg & EHCI_PS_PE)
632 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
633 if (reg & EHCI_PS_SUSP)
634 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
635 if (reg & EHCI_PS_OCA)
636 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
637 if (reg & EHCI_PS_PR)
638 tmpbuf[0] |= USB_PORT_STAT_RESET;
639 if (reg & EHCI_PS_PP)
640 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
643 switch ((reg >> 26) & 3) {
647 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
651 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
655 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
658 if (reg & EHCI_PS_CSC)
659 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
660 if (reg & EHCI_PS_PEC)
661 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
662 if (reg & EHCI_PS_OCC)
663 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
664 if (portreset & (1 << le16_to_cpu(req->index)))
665 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
670 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
671 reg = ehci_readl(status_reg);
672 reg &= ~EHCI_PS_CLEAR;
673 switch (le16_to_cpu(req->value)) {
674 case USB_PORT_FEAT_ENABLE:
676 ehci_writel(status_reg, reg);
678 case USB_PORT_FEAT_POWER:
679 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
681 ehci_writel(status_reg, reg);
684 case USB_PORT_FEAT_RESET:
685 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
687 EHCI_PS_IS_LOWSPEED(reg)) {
688 /* Low speed device, give up ownership. */
689 debug("port %d low speed --> companion\n",
692 ehci_writel(status_reg, reg);
699 ehci_writel(status_reg, reg);
701 * caller must wait, then call GetPortStatus
702 * usb 2.0 specification say 50 ms resets on
706 /* terminate the reset */
707 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
709 * A host controller must terminate the reset
710 * and stabilize the state of the port within
713 ret = handshake(status_reg, EHCI_PS_PR, 0,
717 1 << le16_to_cpu(req->index);
719 printf("port(%d) reset error\n",
720 le16_to_cpu(req->index) - 1);
724 debug("unknown feature %x\n", le16_to_cpu(req->value));
727 /* unblock posted writes */
728 (void) ehci_readl(&hcor->or_usbcmd);
730 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
731 reg = ehci_readl(status_reg);
732 switch (le16_to_cpu(req->value)) {
733 case USB_PORT_FEAT_ENABLE:
736 case USB_PORT_FEAT_C_ENABLE:
737 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
739 case USB_PORT_FEAT_POWER:
740 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
741 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
742 case USB_PORT_FEAT_C_CONNECTION:
743 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
745 case USB_PORT_FEAT_OVER_CURRENT:
746 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
748 case USB_PORT_FEAT_C_RESET:
749 portreset &= ~(1 << le16_to_cpu(req->index));
752 debug("unknown feature %x\n", le16_to_cpu(req->value));
755 ehci_writel(status_reg, reg);
756 /* unblock posted write */
757 (void) ehci_readl(&hcor->or_usbcmd);
760 debug("Unknown request\n");
765 len = min3(srclen, le16_to_cpu(req->length), length);
766 if (srcptr != NULL && len > 0)
767 memcpy(buffer, srcptr, len);
776 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
777 req->requesttype, req->request, le16_to_cpu(req->value),
778 le16_to_cpu(req->index), le16_to_cpu(req->length));
781 dev->status = USB_ST_STALLED;
785 int usb_lowlevel_stop(void)
787 return ehci_hcd_stop();
790 int usb_lowlevel_init(void)
795 if (ehci_hcd_init() != 0)
798 /* EHCI spec section 4.1 */
799 if (ehci_reset() != 0)
802 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
803 if (ehci_hcd_init() != 0)
807 /* Set head of reclaim list */
808 memset(&qh_list, 0, sizeof(qh_list));
809 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
810 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
811 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
812 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
813 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
814 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
816 /* Set async. queue head pointer. */
817 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
819 reg = ehci_readl(&hccr->cr_hcsparams);
820 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
821 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
822 /* Port Indicators */
823 if (HCS_INDICATOR(reg))
824 descriptor.hub.wHubCharacteristics |= 0x80;
825 /* Port Power Control */
827 descriptor.hub.wHubCharacteristics |= 0x01;
829 /* Start the host controller. */
830 cmd = ehci_readl(&hcor->or_usbcmd);
832 * Philips, Intel, and maybe others need CMD_RUN before the
833 * root hub will detect new devices (why?); NEC doesn't
835 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
837 ehci_writel(&hcor->or_usbcmd, cmd);
839 /* take control over the ports */
840 cmd = ehci_readl(&hcor->or_configflag);
842 ehci_writel(&hcor->or_configflag, cmd);
843 /* unblock posted write */
844 cmd = ehci_readl(&hcor->or_usbcmd);
846 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
847 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
855 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
859 if (usb_pipetype(pipe) != PIPE_BULK) {
860 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
863 return ehci_submit_async(dev, pipe, buffer, length, NULL);
867 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
868 int length, struct devrequest *setup)
871 if (usb_pipetype(pipe) != PIPE_CONTROL) {
872 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
876 if (usb_pipedevice(pipe) == rootdev) {
878 dev->speed = USB_SPEED_HIGH;
879 return ehci_submit_root(dev, pipe, buffer, length, setup);
881 return ehci_submit_async(dev, pipe, buffer, length, setup);
885 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
886 int length, int interval)
889 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
890 dev, pipe, buffer, length, interval);