ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
[oweals/u-boot.git] / drivers / usb / host / ehci-hcd.c
1 /*-
2  * Copyright (c) 2007-2008, Juniper Networks, Inc.
3  * Copyright (c) 2008, Excito Elektronik i Skåne AB
4  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
5  *
6  * All rights reserved.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation version 2 of
11  * the License.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 #include <common.h>
24 #include <asm/byteorder.h>
25 #include <usb.h>
26 #include <asm/io.h>
27 #include <malloc.h>
28 #include <watchdog.h>
29
30 #include "ehci.h"
31
32 int rootdev;
33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
34 volatile struct ehci_hcor *hcor;
35
36 static uint16_t portreset;
37 DEFINE_ALIGN_BUFFER(struct QH, qh_list, 1, USB_DMA_MINALIGN);
38
39 #define ALIGN_END_ADDR(type, ptr, size)                 \
40         ((uint32_t)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
41
42 static struct descriptor {
43         struct usb_hub_descriptor hub;
44         struct usb_device_descriptor device;
45         struct usb_linux_config_descriptor config;
46         struct usb_linux_interface_descriptor interface;
47         struct usb_endpoint_descriptor endpoint;
48 }  __attribute__ ((packed)) descriptor = {
49         {
50                 0x8,            /* bDescLength */
51                 0x29,           /* bDescriptorType: hub descriptor */
52                 2,              /* bNrPorts -- runtime modified */
53                 0,              /* wHubCharacteristics */
54                 10,             /* bPwrOn2PwrGood */
55                 0,              /* bHubCntrCurrent */
56                 {},             /* Device removable */
57                 {}              /* at most 7 ports! XXX */
58         },
59         {
60                 0x12,           /* bLength */
61                 1,              /* bDescriptorType: UDESC_DEVICE */
62                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
63                 9,              /* bDeviceClass: UDCLASS_HUB */
64                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
65                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
66                 64,             /* bMaxPacketSize: 64 bytes */
67                 0x0000,         /* idVendor */
68                 0x0000,         /* idProduct */
69                 cpu_to_le16(0x0100), /* bcdDevice */
70                 1,              /* iManufacturer */
71                 2,              /* iProduct */
72                 0,              /* iSerialNumber */
73                 1               /* bNumConfigurations: 1 */
74         },
75         {
76                 0x9,
77                 2,              /* bDescriptorType: UDESC_CONFIG */
78                 cpu_to_le16(0x19),
79                 1,              /* bNumInterface */
80                 1,              /* bConfigurationValue */
81                 0,              /* iConfiguration */
82                 0x40,           /* bmAttributes: UC_SELF_POWER */
83                 0               /* bMaxPower */
84         },
85         {
86                 0x9,            /* bLength */
87                 4,              /* bDescriptorType: UDESC_INTERFACE */
88                 0,              /* bInterfaceNumber */
89                 0,              /* bAlternateSetting */
90                 1,              /* bNumEndpoints */
91                 9,              /* bInterfaceClass: UICLASS_HUB */
92                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
93                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
94                 0               /* iInterface */
95         },
96         {
97                 0x7,            /* bLength */
98                 5,              /* bDescriptorType: UDESC_ENDPOINT */
99                 0x81,           /* bEndpointAddress:
100                                  * UE_DIR_IN | EHCI_INTR_ENDPT
101                                  */
102                 3,              /* bmAttributes: UE_INTERRUPT */
103                 8,              /* wMaxPacketSize */
104                 255             /* bInterval */
105         },
106 };
107
108 #if defined(CONFIG_EHCI_IS_TDI)
109 #define ehci_is_TDI()   (1)
110 #else
111 #define ehci_is_TDI()   (0)
112 #endif
113
114 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
115 {
116         mdelay(50);
117 }
118
119 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
120         __attribute__((weak, alias("__ehci_powerup_fixup")));
121
122 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
123 {
124         uint32_t result;
125         do {
126                 result = ehci_readl(ptr);
127                 udelay(5);
128                 if (result == ~(uint32_t)0)
129                         return -1;
130                 result &= mask;
131                 if (result == done)
132                         return 0;
133                 usec--;
134         } while (usec > 0);
135         return -1;
136 }
137
138 static int ehci_reset(void)
139 {
140         uint32_t cmd;
141         uint32_t tmp;
142         uint32_t *reg_ptr;
143         int ret = 0;
144
145         cmd = ehci_readl(&hcor->or_usbcmd);
146         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
147         ehci_writel(&hcor->or_usbcmd, cmd);
148         ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
149         if (ret < 0) {
150                 printf("EHCI fail to reset\n");
151                 goto out;
152         }
153
154         if (ehci_is_TDI()) {
155                 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
156                 tmp = ehci_readl(reg_ptr);
157                 tmp |= USBMODE_CM_HC;
158 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
159                 tmp |= USBMODE_BE;
160 #endif
161                 ehci_writel(reg_ptr, tmp);
162         }
163
164 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
165         cmd = ehci_readl(&hcor->or_txfilltuning);
166         cmd &= ~TXFIFO_THRESH(0x3f);
167         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
168         ehci_writel(&hcor->or_txfilltuning, cmd);
169 #endif
170 out:
171         return ret;
172 }
173
174 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
175 {
176         uint32_t delta, next;
177         uint32_t addr = (uint32_t)buf;
178         size_t rsz = roundup(sz, 32);
179         int idx;
180
181         if (sz != rsz)
182                 debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz);
183
184         if (addr & 31)
185                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
186
187         idx = 0;
188         while (idx < 5) {
189                 flush_dcache_range(addr, addr + rsz);
190                 td->qt_buffer[idx] = cpu_to_hc32(addr);
191                 td->qt_buffer_hi[idx] = 0;
192                 next = (addr + 4096) & ~4095;
193                 delta = next - addr;
194                 if (delta >= sz)
195                         break;
196                 sz -= delta;
197                 addr = next;
198                 idx++;
199         }
200
201         if (idx == 5) {
202                 debug("out of buffer pointers (%u bytes left)\n", sz);
203                 return -1;
204         }
205
206         return 0;
207 }
208
209 static int
210 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
211                    int length, struct devrequest *req)
212 {
213         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
214         ALLOC_ALIGN_BUFFER(struct qTD, qtd, 3, USB_DMA_MINALIGN);
215         int qtd_counter = 0;
216
217         volatile struct qTD *vtd;
218         unsigned long ts;
219         uint32_t *tdp;
220         uint32_t endpt, token, usbsts;
221         uint32_t c, toggle;
222         uint32_t cmd;
223         int timeout;
224         int ret = 0;
225
226         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
227               buffer, length, req);
228         if (req != NULL)
229                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
230                       req->request, req->request,
231                       req->requesttype, req->requesttype,
232                       le16_to_cpu(req->value), le16_to_cpu(req->value),
233                       le16_to_cpu(req->index));
234
235         memset(qh, 0, sizeof(struct QH));
236         memset(qtd, 0, 3 * sizeof(*qtd));
237
238         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
239
240         /*
241          * Setup QH (3.6 in ehci-r10.pdf)
242          *
243          *   qh_link ................. 03-00 H
244          *   qh_endpt1 ............... 07-04 H
245          *   qh_endpt2 ............... 0B-08 H
246          * - qh_curtd
247          *   qh_overlay.qt_next ...... 13-10 H
248          * - qh_overlay.qt_altnext
249          */
250         qh->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH);
251         c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
252              usb_pipeendpoint(pipe) == 0) ? 1 : 0;
253         endpt = (8 << 28) |
254             (c << 27) |
255             (usb_maxpacket(dev, pipe) << 16) |
256             (0 << 15) |
257             (1 << 14) |
258             (usb_pipespeed(pipe) << 12) |
259             (usb_pipeendpoint(pipe) << 8) |
260             (0 << 7) | (usb_pipedevice(pipe) << 0);
261         qh->qh_endpt1 = cpu_to_hc32(endpt);
262         endpt = (1 << 30) |
263             (dev->portnr << 23) |
264             (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
265         qh->qh_endpt2 = cpu_to_hc32(endpt);
266         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
267
268         tdp = &qh->qh_overlay.qt_next;
269
270         if (req != NULL) {
271                 /*
272                  * Setup request qTD (3.5 in ehci-r10.pdf)
273                  *
274                  *   qt_next ................ 03-00 H
275                  *   qt_altnext ............. 07-04 H
276                  *   qt_token ............... 0B-08 H
277                  *
278                  *   [ buffer, buffer_hi ] loaded with "req".
279                  */
280                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
281                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
282                 token = (0 << 31) |
283                     (sizeof(*req) << 16) |
284                     (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
285                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
286                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) {
287                         debug("unable construct SETUP td\n");
288                         goto fail;
289                 }
290                 /* Update previous qTD! */
291                 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
292                 tdp = &qtd[qtd_counter++].qt_next;
293                 toggle = 1;
294         }
295
296         if (length > 0 || req == NULL) {
297                 /*
298                  * Setup request qTD (3.5 in ehci-r10.pdf)
299                  *
300                  *   qt_next ................ 03-00 H
301                  *   qt_altnext ............. 07-04 H
302                  *   qt_token ............... 0B-08 H
303                  *
304                  *   [ buffer, buffer_hi ] loaded with "buffer".
305                  */
306                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
307                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
308                 token = (toggle << 31) |
309                     (length << 16) |
310                     ((req == NULL ? 1 : 0) << 15) |
311                     (0 << 12) |
312                     (3 << 10) |
313                     ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
314                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
315                 if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) {
316                         debug("unable construct DATA td\n");
317                         goto fail;
318                 }
319                 /* Update previous qTD! */
320                 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
321                 tdp = &qtd[qtd_counter++].qt_next;
322         }
323
324         if (req != NULL) {
325                 /*
326                  * Setup request qTD (3.5 in ehci-r10.pdf)
327                  *
328                  *   qt_next ................ 03-00 H
329                  *   qt_altnext ............. 07-04 H
330                  *   qt_token ............... 0B-08 H
331                  */
332                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
333                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
334                 token = (toggle << 31) |
335                     (0 << 16) |
336                     (1 << 15) |
337                     (0 << 12) |
338                     (3 << 10) |
339                     ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
340                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
341                 /* Update previous qTD! */
342                 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
343                 tdp = &qtd[qtd_counter++].qt_next;
344         }
345
346         qh_list->qh_link = cpu_to_hc32((uint32_t)qh | QH_LINK_TYPE_QH);
347
348         /* Flush dcache */
349         flush_dcache_range((uint32_t)qh_list,
350                 ALIGN_END_ADDR(struct QH, qh_list, 1));
351         flush_dcache_range((uint32_t)qh, ALIGN_END_ADDR(struct QH, qh, 1));
352         flush_dcache_range((uint32_t)qtd, ALIGN_END_ADDR(struct qTD, qtd, 3));
353
354         /* Set async. queue head pointer. */
355         ehci_writel(&hcor->or_asynclistaddr, (uint32_t)qh_list);
356
357         usbsts = ehci_readl(&hcor->or_usbsts);
358         ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
359
360         /* Enable async. schedule. */
361         cmd = ehci_readl(&hcor->or_usbcmd);
362         cmd |= CMD_ASE;
363         ehci_writel(&hcor->or_usbcmd, cmd);
364
365         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
366                         100 * 1000);
367         if (ret < 0) {
368                 printf("EHCI fail timeout STD_ASS set\n");
369                 goto fail;
370         }
371
372         /* Wait for TDs to be processed. */
373         ts = get_timer(0);
374         vtd = &qtd[qtd_counter - 1];
375         timeout = USB_TIMEOUT_MS(pipe);
376         do {
377                 /* Invalidate dcache */
378                 invalidate_dcache_range((uint32_t)qh_list,
379                         ALIGN_END_ADDR(struct QH, qh_list, 1));
380                 invalidate_dcache_range((uint32_t)qh,
381                         ALIGN_END_ADDR(struct QH, qh, 1));
382                 invalidate_dcache_range((uint32_t)qtd,
383                         ALIGN_END_ADDR(struct qTD, qtd, 3));
384
385                 token = hc32_to_cpu(vtd->qt_token);
386                 if (!(token & 0x80))
387                         break;
388                 WATCHDOG_RESET();
389         } while (get_timer(ts) < timeout);
390
391         /* Invalidate the memory area occupied by buffer */
392         invalidate_dcache_range(((uint32_t)buffer & ~31),
393                 ((uint32_t)buffer & ~31) + roundup(length, 32));
394
395         /* Check that the TD processing happened */
396         if (token & 0x80) {
397                 printf("EHCI timed out on TD - token=%#x\n", token);
398         }
399
400         /* Disable async schedule. */
401         cmd = ehci_readl(&hcor->or_usbcmd);
402         cmd &= ~CMD_ASE;
403         ehci_writel(&hcor->or_usbcmd, cmd);
404
405         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
406                         100 * 1000);
407         if (ret < 0) {
408                 printf("EHCI fail timeout STD_ASS reset\n");
409                 goto fail;
410         }
411
412         token = hc32_to_cpu(qh->qh_overlay.qt_token);
413         if (!(token & 0x80)) {
414                 debug("TOKEN=%#x\n", token);
415                 switch (token & 0xfc) {
416                 case 0:
417                         toggle = token >> 31;
418                         usb_settoggle(dev, usb_pipeendpoint(pipe),
419                                        usb_pipeout(pipe), toggle);
420                         dev->status = 0;
421                         break;
422                 case 0x40:
423                         dev->status = USB_ST_STALLED;
424                         break;
425                 case 0xa0:
426                 case 0x20:
427                         dev->status = USB_ST_BUF_ERR;
428                         break;
429                 case 0x50:
430                 case 0x10:
431                         dev->status = USB_ST_BABBLE_DET;
432                         break;
433                 default:
434                         dev->status = USB_ST_CRC_ERR;
435                         if ((token & 0x40) == 0x40)
436                                 dev->status |= USB_ST_STALLED;
437                         break;
438                 }
439                 dev->act_len = length - ((token >> 16) & 0x7fff);
440         } else {
441                 dev->act_len = 0;
442                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
443                       dev->devnum, ehci_readl(&hcor->or_usbsts),
444                       ehci_readl(&hcor->or_portsc[0]),
445                       ehci_readl(&hcor->or_portsc[1]));
446         }
447
448         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
449
450 fail:
451         return -1;
452 }
453
454 static inline int min3(int a, int b, int c)
455 {
456
457         if (b < a)
458                 a = b;
459         if (c < a)
460                 a = c;
461         return a;
462 }
463
464 int
465 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
466                  int length, struct devrequest *req)
467 {
468         uint8_t tmpbuf[4];
469         u16 typeReq;
470         void *srcptr = NULL;
471         int len, srclen;
472         uint32_t reg;
473         uint32_t *status_reg;
474
475         if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
476                 printf("The request port(%d) is not configured\n",
477                         le16_to_cpu(req->index) - 1);
478                 return -1;
479         }
480         status_reg = (uint32_t *)&hcor->or_portsc[
481                                                 le16_to_cpu(req->index) - 1];
482         srclen = 0;
483
484         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
485               req->request, req->request,
486               req->requesttype, req->requesttype,
487               le16_to_cpu(req->value), le16_to_cpu(req->index));
488
489         typeReq = req->request | req->requesttype << 8;
490
491         switch (typeReq) {
492         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
493                 switch (le16_to_cpu(req->value) >> 8) {
494                 case USB_DT_DEVICE:
495                         debug("USB_DT_DEVICE request\n");
496                         srcptr = &descriptor.device;
497                         srclen = 0x12;
498                         break;
499                 case USB_DT_CONFIG:
500                         debug("USB_DT_CONFIG config\n");
501                         srcptr = &descriptor.config;
502                         srclen = 0x19;
503                         break;
504                 case USB_DT_STRING:
505                         debug("USB_DT_STRING config\n");
506                         switch (le16_to_cpu(req->value) & 0xff) {
507                         case 0: /* Language */
508                                 srcptr = "\4\3\1\0";
509                                 srclen = 4;
510                                 break;
511                         case 1: /* Vendor */
512                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
513                                 srclen = 14;
514                                 break;
515                         case 2: /* Product */
516                                 srcptr = "\52\3E\0H\0C\0I\0 "
517                                          "\0H\0o\0s\0t\0 "
518                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
519                                 srclen = 42;
520                                 break;
521                         default:
522                                 debug("unknown value DT_STRING %x\n",
523                                         le16_to_cpu(req->value));
524                                 goto unknown;
525                         }
526                         break;
527                 default:
528                         debug("unknown value %x\n", le16_to_cpu(req->value));
529                         goto unknown;
530                 }
531                 break;
532         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
533                 switch (le16_to_cpu(req->value) >> 8) {
534                 case USB_DT_HUB:
535                         debug("USB_DT_HUB config\n");
536                         srcptr = &descriptor.hub;
537                         srclen = 0x8;
538                         break;
539                 default:
540                         debug("unknown value %x\n", le16_to_cpu(req->value));
541                         goto unknown;
542                 }
543                 break;
544         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
545                 debug("USB_REQ_SET_ADDRESS\n");
546                 rootdev = le16_to_cpu(req->value);
547                 break;
548         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
549                 debug("USB_REQ_SET_CONFIGURATION\n");
550                 /* Nothing to do */
551                 break;
552         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
553                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
554                 tmpbuf[1] = 0;
555                 srcptr = tmpbuf;
556                 srclen = 2;
557                 break;
558         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
559                 memset(tmpbuf, 0, 4);
560                 reg = ehci_readl(status_reg);
561                 if (reg & EHCI_PS_CS)
562                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
563                 if (reg & EHCI_PS_PE)
564                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
565                 if (reg & EHCI_PS_SUSP)
566                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
567                 if (reg & EHCI_PS_OCA)
568                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
569                 if (reg & EHCI_PS_PR)
570                         tmpbuf[0] |= USB_PORT_STAT_RESET;
571                 if (reg & EHCI_PS_PP)
572                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
573
574                 if (ehci_is_TDI()) {
575                         switch ((reg >> 26) & 3) {
576                         case 0:
577                                 break;
578                         case 1:
579                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
580                                 break;
581                         case 2:
582                         default:
583                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
584                                 break;
585                         }
586                 } else {
587                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
588                 }
589
590                 if (reg & EHCI_PS_CSC)
591                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
592                 if (reg & EHCI_PS_PEC)
593                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
594                 if (reg & EHCI_PS_OCC)
595                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
596                 if (portreset & (1 << le16_to_cpu(req->index)))
597                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
598
599                 srcptr = tmpbuf;
600                 srclen = 4;
601                 break;
602         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
603                 reg = ehci_readl(status_reg);
604                 reg &= ~EHCI_PS_CLEAR;
605                 switch (le16_to_cpu(req->value)) {
606                 case USB_PORT_FEAT_ENABLE:
607                         reg |= EHCI_PS_PE;
608                         ehci_writel(status_reg, reg);
609                         break;
610                 case USB_PORT_FEAT_POWER:
611                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
612                                 reg |= EHCI_PS_PP;
613                                 ehci_writel(status_reg, reg);
614                         }
615                         break;
616                 case USB_PORT_FEAT_RESET:
617                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
618                             !ehci_is_TDI() &&
619                             EHCI_PS_IS_LOWSPEED(reg)) {
620                                 /* Low speed device, give up ownership. */
621                                 debug("port %d low speed --> companion\n",
622                                       req->index - 1);
623                                 reg |= EHCI_PS_PO;
624                                 ehci_writel(status_reg, reg);
625                                 break;
626                         } else {
627                                 int ret;
628
629                                 reg |= EHCI_PS_PR;
630                                 reg &= ~EHCI_PS_PE;
631                                 ehci_writel(status_reg, reg);
632                                 /*
633                                  * caller must wait, then call GetPortStatus
634                                  * usb 2.0 specification say 50 ms resets on
635                                  * root
636                                  */
637                                 ehci_powerup_fixup(status_reg, &reg);
638
639                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
640                                 /*
641                                  * A host controller must terminate the reset
642                                  * and stabilize the state of the port within
643                                  * 2 milliseconds
644                                  */
645                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
646                                                 2 * 1000);
647                                 if (!ret)
648                                         portreset |=
649                                                 1 << le16_to_cpu(req->index);
650                                 else
651                                         printf("port(%d) reset error\n",
652                                         le16_to_cpu(req->index) - 1);
653                         }
654                         break;
655                 default:
656                         debug("unknown feature %x\n", le16_to_cpu(req->value));
657                         goto unknown;
658                 }
659                 /* unblock posted writes */
660                 (void) ehci_readl(&hcor->or_usbcmd);
661                 break;
662         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
663                 reg = ehci_readl(status_reg);
664                 switch (le16_to_cpu(req->value)) {
665                 case USB_PORT_FEAT_ENABLE:
666                         reg &= ~EHCI_PS_PE;
667                         break;
668                 case USB_PORT_FEAT_C_ENABLE:
669                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
670                         break;
671                 case USB_PORT_FEAT_POWER:
672                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
673                                 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
674                 case USB_PORT_FEAT_C_CONNECTION:
675                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
676                         break;
677                 case USB_PORT_FEAT_OVER_CURRENT:
678                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
679                         break;
680                 case USB_PORT_FEAT_C_RESET:
681                         portreset &= ~(1 << le16_to_cpu(req->index));
682                         break;
683                 default:
684                         debug("unknown feature %x\n", le16_to_cpu(req->value));
685                         goto unknown;
686                 }
687                 ehci_writel(status_reg, reg);
688                 /* unblock posted write */
689                 (void) ehci_readl(&hcor->or_usbcmd);
690                 break;
691         default:
692                 debug("Unknown request\n");
693                 goto unknown;
694         }
695
696         mdelay(1);
697         len = min3(srclen, le16_to_cpu(req->length), length);
698         if (srcptr != NULL && len > 0)
699                 memcpy(buffer, srcptr, len);
700         else
701                 debug("Len is 0\n");
702
703         dev->act_len = len;
704         dev->status = 0;
705         return 0;
706
707 unknown:
708         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
709               req->requesttype, req->request, le16_to_cpu(req->value),
710               le16_to_cpu(req->index), le16_to_cpu(req->length));
711
712         dev->act_len = 0;
713         dev->status = USB_ST_STALLED;
714         return -1;
715 }
716
717 int usb_lowlevel_stop(void)
718 {
719         return ehci_hcd_stop();
720 }
721
722 int usb_lowlevel_init(void)
723 {
724         uint32_t reg;
725         uint32_t cmd;
726
727         if (ehci_hcd_init() != 0)
728                 return -1;
729
730         /* EHCI spec section 4.1 */
731         if (ehci_reset() != 0)
732                 return -1;
733
734 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
735         if (ehci_hcd_init() != 0)
736                 return -1;
737 #endif
738
739         /* Set head of reclaim list */
740         memset(qh_list, 0, sizeof(*qh_list));
741         qh_list->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH);
742         qh_list->qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
743         qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
744         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
745         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
746         qh_list->qh_overlay.qt_token = cpu_to_hc32(0x40);
747
748         reg = ehci_readl(&hccr->cr_hcsparams);
749         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
750         printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
751         /* Port Indicators */
752         if (HCS_INDICATOR(reg))
753                 descriptor.hub.wHubCharacteristics |= 0x80;
754         /* Port Power Control */
755         if (HCS_PPC(reg))
756                 descriptor.hub.wHubCharacteristics |= 0x01;
757
758         /* Start the host controller. */
759         cmd = ehci_readl(&hcor->or_usbcmd);
760         /*
761          * Philips, Intel, and maybe others need CMD_RUN before the
762          * root hub will detect new devices (why?); NEC doesn't
763          */
764         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
765         cmd |= CMD_RUN;
766         ehci_writel(&hcor->or_usbcmd, cmd);
767
768         /* take control over the ports */
769         cmd = ehci_readl(&hcor->or_configflag);
770         cmd |= FLAG_CF;
771         ehci_writel(&hcor->or_configflag, cmd);
772         /* unblock posted write */
773         cmd = ehci_readl(&hcor->or_usbcmd);
774         mdelay(5);
775         reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
776         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
777
778         rootdev = 0;
779
780         return 0;
781 }
782
783 int
784 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
785                 int length)
786 {
787
788         if (usb_pipetype(pipe) != PIPE_BULK) {
789                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
790                 return -1;
791         }
792         return ehci_submit_async(dev, pipe, buffer, length, NULL);
793 }
794
795 int
796 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
797                    int length, struct devrequest *setup)
798 {
799
800         if (usb_pipetype(pipe) != PIPE_CONTROL) {
801                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
802                 return -1;
803         }
804
805         if (usb_pipedevice(pipe) == rootdev) {
806                 if (rootdev == 0)
807                         dev->speed = USB_SPEED_HIGH;
808                 return ehci_submit_root(dev, pipe, buffer, length, setup);
809         }
810         return ehci_submit_async(dev, pipe, buffer, length, setup);
811 }
812
813 int
814 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
815                int length, int interval)
816 {
817
818         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
819               dev, pipe, buffer, length, interval);
820         return ehci_submit_async(dev, pipe, buffer, length, NULL);
821 }