2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
34 volatile struct ehci_hcor *hcor;
36 static uint16_t portreset;
37 DEFINE_ALIGN_BUFFER(struct QH, qh_list, 1, USB_DMA_MINALIGN);
39 #define ALIGN_END_ADDR(type, ptr, size) \
40 ((uint32_t)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
42 static struct descriptor {
43 struct usb_hub_descriptor hub;
44 struct usb_device_descriptor device;
45 struct usb_linux_config_descriptor config;
46 struct usb_linux_interface_descriptor interface;
47 struct usb_endpoint_descriptor endpoint;
48 } __attribute__ ((packed)) descriptor = {
50 0x8, /* bDescLength */
51 0x29, /* bDescriptorType: hub descriptor */
52 2, /* bNrPorts -- runtime modified */
53 0, /* wHubCharacteristics */
54 10, /* bPwrOn2PwrGood */
55 0, /* bHubCntrCurrent */
56 {}, /* Device removable */
57 {} /* at most 7 ports! XXX */
61 1, /* bDescriptorType: UDESC_DEVICE */
62 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
63 9, /* bDeviceClass: UDCLASS_HUB */
64 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
65 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
66 64, /* bMaxPacketSize: 64 bytes */
67 0x0000, /* idVendor */
68 0x0000, /* idProduct */
69 cpu_to_le16(0x0100), /* bcdDevice */
70 1, /* iManufacturer */
72 0, /* iSerialNumber */
73 1 /* bNumConfigurations: 1 */
77 2, /* bDescriptorType: UDESC_CONFIG */
79 1, /* bNumInterface */
80 1, /* bConfigurationValue */
81 0, /* iConfiguration */
82 0x40, /* bmAttributes: UC_SELF_POWER */
87 4, /* bDescriptorType: UDESC_INTERFACE */
88 0, /* bInterfaceNumber */
89 0, /* bAlternateSetting */
90 1, /* bNumEndpoints */
91 9, /* bInterfaceClass: UICLASS_HUB */
92 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
93 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
98 5, /* bDescriptorType: UDESC_ENDPOINT */
99 0x81, /* bEndpointAddress:
100 * UE_DIR_IN | EHCI_INTR_ENDPT
102 3, /* bmAttributes: UE_INTERRUPT */
103 8, /* wMaxPacketSize */
108 #if defined(CONFIG_EHCI_IS_TDI)
109 #define ehci_is_TDI() (1)
111 #define ehci_is_TDI() (0)
114 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
119 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
120 __attribute__((weak, alias("__ehci_powerup_fixup")));
122 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
126 result = ehci_readl(ptr);
128 if (result == ~(uint32_t)0)
138 static int ehci_reset(void)
145 cmd = ehci_readl(&hcor->or_usbcmd);
146 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
147 ehci_writel(&hcor->or_usbcmd, cmd);
148 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
150 printf("EHCI fail to reset\n");
155 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
156 tmp = ehci_readl(reg_ptr);
157 tmp |= USBMODE_CM_HC;
158 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
161 ehci_writel(reg_ptr, tmp);
164 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
165 cmd = ehci_readl(&hcor->or_txfilltuning);
166 cmd &= ~TXFIFO_THRESH(0x3f);
167 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
168 ehci_writel(&hcor->or_txfilltuning, cmd);
174 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
176 uint32_t delta, next;
177 uint32_t addr = (uint32_t)buf;
180 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
181 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
183 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
187 td->qt_buffer[idx] = cpu_to_hc32(addr);
188 td->qt_buffer_hi[idx] = 0;
189 next = (addr + 4096) & ~4095;
199 printf("out of buffer pointers (%u bytes left)\n", sz);
207 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
208 int length, struct devrequest *req)
210 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
211 ALLOC_ALIGN_BUFFER(struct qTD, qtd, 3, USB_DMA_MINALIGN);
214 volatile struct qTD *vtd;
217 uint32_t endpt, token, usbsts;
223 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
224 buffer, length, req);
226 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
227 req->request, req->request,
228 req->requesttype, req->requesttype,
229 le16_to_cpu(req->value), le16_to_cpu(req->value),
230 le16_to_cpu(req->index));
232 memset(qh, 0, sizeof(struct QH));
233 memset(qtd, 0, 3 * sizeof(*qtd));
235 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
238 * Setup QH (3.6 in ehci-r10.pdf)
240 * qh_link ................. 03-00 H
241 * qh_endpt1 ............... 07-04 H
242 * qh_endpt2 ............... 0B-08 H
244 * qh_overlay.qt_next ...... 13-10 H
245 * - qh_overlay.qt_altnext
247 qh->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH);
248 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
249 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
252 (usb_maxpacket(dev, pipe) << 16) |
255 (usb_pipespeed(pipe) << 12) |
256 (usb_pipeendpoint(pipe) << 8) |
257 (0 << 7) | (usb_pipedevice(pipe) << 0);
258 qh->qh_endpt1 = cpu_to_hc32(endpt);
260 (dev->portnr << 23) |
261 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
262 qh->qh_endpt2 = cpu_to_hc32(endpt);
263 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
265 tdp = &qh->qh_overlay.qt_next;
269 * Setup request qTD (3.5 in ehci-r10.pdf)
271 * qt_next ................ 03-00 H
272 * qt_altnext ............. 07-04 H
273 * qt_token ............... 0B-08 H
275 * [ buffer, buffer_hi ] loaded with "req".
277 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
278 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
280 (sizeof(*req) << 16) |
281 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
282 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
283 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) {
284 printf("unable construct SETUP td\n");
287 /* Update previous qTD! */
288 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
289 tdp = &qtd[qtd_counter++].qt_next;
293 if (length > 0 || req == NULL) {
295 * Setup request qTD (3.5 in ehci-r10.pdf)
297 * qt_next ................ 03-00 H
298 * qt_altnext ............. 07-04 H
299 * qt_token ............... 0B-08 H
301 * [ buffer, buffer_hi ] loaded with "buffer".
303 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
304 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
305 token = (toggle << 31) |
307 ((req == NULL ? 1 : 0) << 15) |
310 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
311 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
312 if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) {
313 printf("unable construct DATA td\n");
316 /* Update previous qTD! */
317 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
318 tdp = &qtd[qtd_counter++].qt_next;
323 * Setup request qTD (3.5 in ehci-r10.pdf)
325 * qt_next ................ 03-00 H
326 * qt_altnext ............. 07-04 H
327 * qt_token ............... 0B-08 H
329 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
330 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
331 token = (toggle << 31) |
336 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
337 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
338 /* Update previous qTD! */
339 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
340 tdp = &qtd[qtd_counter++].qt_next;
343 qh_list->qh_link = cpu_to_hc32((uint32_t)qh | QH_LINK_TYPE_QH);
346 flush_dcache_range((uint32_t)qh_list,
347 ALIGN_END_ADDR(struct QH, qh_list, 1));
348 flush_dcache_range((uint32_t)qh, ALIGN_END_ADDR(struct QH, qh, 1));
349 flush_dcache_range((uint32_t)qtd, ALIGN_END_ADDR(struct qTD, qtd, 3));
351 /* Set async. queue head pointer. */
352 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)qh_list);
354 usbsts = ehci_readl(&hcor->or_usbsts);
355 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
357 /* Enable async. schedule. */
358 cmd = ehci_readl(&hcor->or_usbcmd);
360 ehci_writel(&hcor->or_usbcmd, cmd);
362 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
365 printf("EHCI fail timeout STD_ASS set\n");
369 /* Wait for TDs to be processed. */
371 vtd = &qtd[qtd_counter - 1];
372 timeout = USB_TIMEOUT_MS(pipe);
374 /* Invalidate dcache */
375 invalidate_dcache_range((uint32_t)qh_list,
376 ALIGN_END_ADDR(struct QH, qh_list, 1));
377 invalidate_dcache_range((uint32_t)qh,
378 ALIGN_END_ADDR(struct QH, qh, 1));
379 invalidate_dcache_range((uint32_t)qtd,
380 ALIGN_END_ADDR(struct qTD, qtd, 3));
382 token = hc32_to_cpu(vtd->qt_token);
386 } while (get_timer(ts) < timeout);
389 * Invalidate the memory area occupied by buffer
390 * Don't try to fix the buffer alignment, if it isn't properly
391 * aligned it's upper layer's fault so let invalidate_dcache_range()
392 * vow about it. But we have to fix the length as it's actual
393 * transfer length and can be unaligned. This is potentially
394 * dangerous operation, it's responsibility of the calling
395 * code to make sure enough space is reserved.
397 invalidate_dcache_range((uint32_t)buffer,
398 ALIGN((uint32_t)buffer + length, ARCH_DMA_MINALIGN));
400 /* Check that the TD processing happened */
402 printf("EHCI timed out on TD - token=%#x\n", token);
405 /* Disable async schedule. */
406 cmd = ehci_readl(&hcor->or_usbcmd);
408 ehci_writel(&hcor->or_usbcmd, cmd);
410 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
413 printf("EHCI fail timeout STD_ASS reset\n");
417 token = hc32_to_cpu(qh->qh_overlay.qt_token);
418 if (!(token & 0x80)) {
419 debug("TOKEN=%#x\n", token);
420 switch (token & 0xfc) {
422 toggle = token >> 31;
423 usb_settoggle(dev, usb_pipeendpoint(pipe),
424 usb_pipeout(pipe), toggle);
428 dev->status = USB_ST_STALLED;
432 dev->status = USB_ST_BUF_ERR;
436 dev->status = USB_ST_BABBLE_DET;
439 dev->status = USB_ST_CRC_ERR;
440 if ((token & 0x40) == 0x40)
441 dev->status |= USB_ST_STALLED;
444 dev->act_len = length - ((token >> 16) & 0x7fff);
447 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
448 dev->devnum, ehci_readl(&hcor->or_usbsts),
449 ehci_readl(&hcor->or_portsc[0]),
450 ehci_readl(&hcor->or_portsc[1]));
453 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
459 static inline int min3(int a, int b, int c)
470 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
471 int length, struct devrequest *req)
478 uint32_t *status_reg;
480 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
481 printf("The request port(%d) is not configured\n",
482 le16_to_cpu(req->index) - 1);
485 status_reg = (uint32_t *)&hcor->or_portsc[
486 le16_to_cpu(req->index) - 1];
489 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
490 req->request, req->request,
491 req->requesttype, req->requesttype,
492 le16_to_cpu(req->value), le16_to_cpu(req->index));
494 typeReq = req->request | req->requesttype << 8;
497 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
498 switch (le16_to_cpu(req->value) >> 8) {
500 debug("USB_DT_DEVICE request\n");
501 srcptr = &descriptor.device;
505 debug("USB_DT_CONFIG config\n");
506 srcptr = &descriptor.config;
510 debug("USB_DT_STRING config\n");
511 switch (le16_to_cpu(req->value) & 0xff) {
512 case 0: /* Language */
517 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
520 case 2: /* Product */
521 srcptr = "\52\3E\0H\0C\0I\0 "
523 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
527 debug("unknown value DT_STRING %x\n",
528 le16_to_cpu(req->value));
533 debug("unknown value %x\n", le16_to_cpu(req->value));
537 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
538 switch (le16_to_cpu(req->value) >> 8) {
540 debug("USB_DT_HUB config\n");
541 srcptr = &descriptor.hub;
545 debug("unknown value %x\n", le16_to_cpu(req->value));
549 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
550 debug("USB_REQ_SET_ADDRESS\n");
551 rootdev = le16_to_cpu(req->value);
553 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
554 debug("USB_REQ_SET_CONFIGURATION\n");
557 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
558 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
563 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
564 memset(tmpbuf, 0, 4);
565 reg = ehci_readl(status_reg);
566 if (reg & EHCI_PS_CS)
567 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
568 if (reg & EHCI_PS_PE)
569 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
570 if (reg & EHCI_PS_SUSP)
571 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
572 if (reg & EHCI_PS_OCA)
573 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
574 if (reg & EHCI_PS_PR)
575 tmpbuf[0] |= USB_PORT_STAT_RESET;
576 if (reg & EHCI_PS_PP)
577 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
580 switch ((reg >> 26) & 3) {
584 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
588 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
592 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
595 if (reg & EHCI_PS_CSC)
596 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
597 if (reg & EHCI_PS_PEC)
598 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
599 if (reg & EHCI_PS_OCC)
600 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
601 if (portreset & (1 << le16_to_cpu(req->index)))
602 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
607 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
608 reg = ehci_readl(status_reg);
609 reg &= ~EHCI_PS_CLEAR;
610 switch (le16_to_cpu(req->value)) {
611 case USB_PORT_FEAT_ENABLE:
613 ehci_writel(status_reg, reg);
615 case USB_PORT_FEAT_POWER:
616 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
618 ehci_writel(status_reg, reg);
621 case USB_PORT_FEAT_RESET:
622 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
624 EHCI_PS_IS_LOWSPEED(reg)) {
625 /* Low speed device, give up ownership. */
626 debug("port %d low speed --> companion\n",
629 ehci_writel(status_reg, reg);
636 ehci_writel(status_reg, reg);
638 * caller must wait, then call GetPortStatus
639 * usb 2.0 specification say 50 ms resets on
642 ehci_powerup_fixup(status_reg, ®);
644 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
646 * A host controller must terminate the reset
647 * and stabilize the state of the port within
650 ret = handshake(status_reg, EHCI_PS_PR, 0,
654 1 << le16_to_cpu(req->index);
656 printf("port(%d) reset error\n",
657 le16_to_cpu(req->index) - 1);
661 debug("unknown feature %x\n", le16_to_cpu(req->value));
664 /* unblock posted writes */
665 (void) ehci_readl(&hcor->or_usbcmd);
667 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
668 reg = ehci_readl(status_reg);
669 switch (le16_to_cpu(req->value)) {
670 case USB_PORT_FEAT_ENABLE:
673 case USB_PORT_FEAT_C_ENABLE:
674 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
676 case USB_PORT_FEAT_POWER:
677 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
678 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
679 case USB_PORT_FEAT_C_CONNECTION:
680 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
682 case USB_PORT_FEAT_OVER_CURRENT:
683 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
685 case USB_PORT_FEAT_C_RESET:
686 portreset &= ~(1 << le16_to_cpu(req->index));
689 debug("unknown feature %x\n", le16_to_cpu(req->value));
692 ehci_writel(status_reg, reg);
693 /* unblock posted write */
694 (void) ehci_readl(&hcor->or_usbcmd);
697 debug("Unknown request\n");
702 len = min3(srclen, le16_to_cpu(req->length), length);
703 if (srcptr != NULL && len > 0)
704 memcpy(buffer, srcptr, len);
713 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
714 req->requesttype, req->request, le16_to_cpu(req->value),
715 le16_to_cpu(req->index), le16_to_cpu(req->length));
718 dev->status = USB_ST_STALLED;
722 int usb_lowlevel_stop(void)
724 return ehci_hcd_stop();
727 int usb_lowlevel_init(void)
732 if (ehci_hcd_init() != 0)
735 /* EHCI spec section 4.1 */
736 if (ehci_reset() != 0)
739 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
740 if (ehci_hcd_init() != 0)
744 /* Set head of reclaim list */
745 memset(qh_list, 0, sizeof(*qh_list));
746 qh_list->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH);
747 qh_list->qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
748 qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
749 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
750 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
751 qh_list->qh_overlay.qt_token = cpu_to_hc32(0x40);
753 reg = ehci_readl(&hccr->cr_hcsparams);
754 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
755 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
756 /* Port Indicators */
757 if (HCS_INDICATOR(reg))
758 descriptor.hub.wHubCharacteristics |= 0x80;
759 /* Port Power Control */
761 descriptor.hub.wHubCharacteristics |= 0x01;
763 /* Start the host controller. */
764 cmd = ehci_readl(&hcor->or_usbcmd);
766 * Philips, Intel, and maybe others need CMD_RUN before the
767 * root hub will detect new devices (why?); NEC doesn't
769 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
771 ehci_writel(&hcor->or_usbcmd, cmd);
773 /* take control over the ports */
774 cmd = ehci_readl(&hcor->or_configflag);
776 ehci_writel(&hcor->or_configflag, cmd);
777 /* unblock posted write */
778 cmd = ehci_readl(&hcor->or_usbcmd);
780 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
781 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
789 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
793 if (usb_pipetype(pipe) != PIPE_BULK) {
794 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
797 return ehci_submit_async(dev, pipe, buffer, length, NULL);
801 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
802 int length, struct devrequest *setup)
805 if (usb_pipetype(pipe) != PIPE_CONTROL) {
806 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
810 if (usb_pipedevice(pipe) == rootdev) {
812 dev->speed = USB_SPEED_HIGH;
813 return ehci_submit_root(dev, pipe, buffer, length, setup);
815 return ehci_submit_async(dev, pipe, buffer, length, setup);
819 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
820 int length, int interval)
823 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
824 dev, pipe, buffer, length, interval);
825 return ehci_submit_async(dev, pipe, buffer, length, NULL);