drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <asm/byteorder.h>
  14 #include <asm/cache.h>
  15 #include <asm/unaligned.h>
  16 #include <usb.h>
  17 #include <asm/io.h>
  18 #include <malloc.h>
  19 #include <memalign.h>
  20 #include <watchdog.h>
  21 #include <dm/device_compat.h>
  22 #include <linux/compiler.h>
  23
  24 #include "ehci.h"
  25
  26 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  27 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  28 #endif
  29
  30 /*
  31  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  32  * Let's time out after 8 to have a little safety margin on top of that.
  33  */
  34 #define HCHALT_TIMEOUT (8 * 1000)
  35
  36 #if !CONFIG_IS_ENABLED(DM_USB)
  37 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  38 #endif
  39
  40 #define ALIGN_END_ADDR(type, ptr, size)                 \
  41         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  42
  43 static struct descriptor {
  44         struct usb_hub_descriptor hub;
  45         struct usb_device_descriptor device;
  46         struct usb_linux_config_descriptor config;
  47         struct usb_linux_interface_descriptor interface;
  48         struct usb_endpoint_descriptor endpoint;
  49 }  __attribute__ ((packed)) descriptor = {
  50         {
  51                 0x8,            /* bDescLength */
  52                 0x29,           /* bDescriptorType: hub descriptor */
  53                 2,              /* bNrPorts -- runtime modified */
  54                 0,              /* wHubCharacteristics */
  55                 10,             /* bPwrOn2PwrGood */
  56                 0,              /* bHubCntrCurrent */
  57                 {               /* Device removable */
  58                 }               /* at most 7 ports! XXX */
  59         },
  60         {
  61                 0x12,           /* bLength */
  62                 1,              /* bDescriptorType: UDESC_DEVICE */
  63                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  64                 9,              /* bDeviceClass: UDCLASS_HUB */
  65                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  66                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  67                 64,             /* bMaxPacketSize: 64 bytes */
  68                 0x0000,         /* idVendor */
  69                 0x0000,         /* idProduct */
  70                 cpu_to_le16(0x0100), /* bcdDevice */
  71                 1,              /* iManufacturer */
  72                 2,              /* iProduct */
  73                 0,              /* iSerialNumber */
  74                 1               /* bNumConfigurations: 1 */
  75         },
  76         {
  77                 0x9,
  78                 2,              /* bDescriptorType: UDESC_CONFIG */
  79                 cpu_to_le16(0x19),
  80                 1,              /* bNumInterface */
  81                 1,              /* bConfigurationValue */
  82                 0,              /* iConfiguration */
  83                 0x40,           /* bmAttributes: UC_SELF_POWER */
  84                 0               /* bMaxPower */
  85         },
  86         {
  87                 0x9,            /* bLength */
  88                 4,              /* bDescriptorType: UDESC_INTERFACE */
  89                 0,              /* bInterfaceNumber */
  90                 0,              /* bAlternateSetting */
  91                 1,              /* bNumEndpoints */
  92                 9,              /* bInterfaceClass: UICLASS_HUB */
  93                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  94                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  95                 0               /* iInterface */
  96         },
  97         {
  98                 0x7,            /* bLength */
  99                 5,              /* bDescriptorType: UDESC_ENDPOINT */
 100                 0x81,           /* bEndpointAddress:
 101                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 102                                  */
 103                 3,              /* bmAttributes: UE_INTERRUPT */
 104                 8,              /* wMaxPacketSize */
 105                 255             /* bInterval */
 106         },
 107 };
 108
 109 #if defined(CONFIG_EHCI_IS_TDI)
 110 #define ehci_is_TDI()   (1)
 111 #else
 112 #define ehci_is_TDI()   (0)
 113 #endif
 114
 115 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 116 {
 117 #if CONFIG_IS_ENABLED(DM_USB)
 118         return dev_get_priv(usb_get_bus(udev->dev));
 119 #else
 120         return udev->controller;
 121 #endif
 122 }
 123
 124 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 125 {
 126         return PORTSC_PSPD(reg);
 127 }
 128
 129 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 130 {
 131         uint32_t tmp;
 132         uint32_t *reg_ptr;
 133
 134         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 135         tmp = ehci_readl(reg_ptr);
 136         tmp |= USBMODE_CM_HC;
 137 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 138         tmp |= USBMODE_BE;
 139 #else
 140         tmp &= ~USBMODE_BE;
 141 #endif
 142         ehci_writel(reg_ptr, tmp);
 143 }
 144
 145 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 146                                uint32_t *reg)
 147 {
 148         mdelay(50);
 149 }
 150
 151 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 152 {
 153         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 154
 155         if (port < 0 || port >= max_ports) {
 156                 /* Printing the message would cause a scan failure! */
 157                 debug("The request port(%u) exceeds maximum port number\n",
 158                       port);
 159                 return NULL;
 160         }
 161
 162         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 163 }
 164
 165 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 166 {
 167         uint32_t result;
 168         do {
 169                 result = ehci_readl(ptr);
 170                 udelay(5);
 171                 if (result == ~(uint32_t)0)
 172                         return -1;
 173                 result &= mask;
 174                 if (result == done)
 175                         return 0;
 176                 usec--;
 177         } while (usec > 0);
 178         return -1;
 179 }
 180
 181 static int ehci_reset(struct ehci_ctrl *ctrl)
 182 {
 183         uint32_t cmd;
 184         int ret = 0;
 185
 186         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 187         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 188         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 189         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 190                         CMD_RESET, 0, 250 * 1000);
 191         if (ret < 0) {
 192                 printf("EHCI fail to reset\n");
 193                 goto out;
 194         }
 195
 196         if (ehci_is_TDI())
 197                 ctrl->ops.set_usb_mode(ctrl);
 198
 199 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 200         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 201         cmd &= ~TXFIFO_THRESH_MASK;
 202         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 203         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 204 #endif
 205 out:
 206         return ret;
 207 }
 208
 209 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 210 {
 211         int i, ret = 0;
 212         uint32_t cmd, reg;
 213         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 214
 215         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 216         /* If not run, directly return */
 217         if (!(cmd & CMD_RUN))
 218                 return 0;
 219         cmd &= ~(CMD_PSE | CMD_ASE);
 220         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 221         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 222                 100 * 1000);
 223
 224         if (!ret) {
 225                 for (i = 0; i < max_ports; i++) {
 226                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 227                         reg |= EHCI_PS_SUSP;
 228                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 229                 }
 230
 231                 cmd &= ~CMD_RUN;
 232                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 233                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 234                         HCHALT_TIMEOUT);
 235         }
 236
 237         if (ret)
 238                 puts("EHCI failed to shut down host controller.\n");
 239
 240         return ret;
 241 }
 242
 243 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 244 {
 245         uint32_t delta, next;
 246         unsigned long addr = (unsigned long)buf;
 247         int idx;
 248
 249         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 250                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 251
 252         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 253
 254         idx = 0;
 255         while (idx < QT_BUFFER_CNT) {
 256                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 257                 td->qt_buffer_hi[idx] = 0;
 258                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 259                 delta = next - addr;
 260                 if (delta >= sz)
 261                         break;
 262                 sz -= delta;
 263                 addr = next;
 264                 idx++;
 265         }
 266
 267         if (idx == QT_BUFFER_CNT) {
 268                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 269                 return -1;
 270         }
 271
 272         return 0;
 273 }
 274
 275 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 276 {
 277         #define QH_HIGH_SPEED   2
 278         #define QH_FULL_SPEED   0
 279         #define QH_LOW_SPEED    1
 280         if (speed == USB_SPEED_HIGH)
 281                 return QH_HIGH_SPEED;
 282         if (speed == USB_SPEED_LOW)
 283                 return QH_LOW_SPEED;
 284         return QH_FULL_SPEED;
 285 }
 286
 287 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 288                                           struct QH *qh)
 289 {
 290         uint8_t portnr = 0;
 291         uint8_t hubaddr = 0;
 292
 293         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 294                 return;
 295
 296         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 297
 298         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 299                                      QH_ENDPT2_HUBADDR(hubaddr));
 300 }
 301
 302 static int ehci_enable_async(struct ehci_ctrl *ctrl)
 303 {
 304         u32 cmd;
 305         int ret;
 306
 307         /* Enable async. schedule. */
 308         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 309         if (cmd & CMD_ASE)
 310                 return 0;
 311
 312         cmd |= CMD_ASE;
 313         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 314
 315         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 316                         100 * 1000);
 317         if (ret < 0)
 318                 printf("EHCI fail timeout STS_ASS set\n");
 319
 320         return ret;
 321 }
 322
 323 static int ehci_disable_async(struct ehci_ctrl *ctrl)
 324 {
 325         u32 cmd;
 326         int ret;
 327
 328         if (ctrl->async_locked)
 329                 return 0;
 330
 331         /* Disable async schedule. */
 332         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 333         if (!(cmd & CMD_ASE))
 334                 return 0;
 335
 336         cmd &= ~CMD_ASE;
 337         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 338
 339         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 340                         100 * 1000);
 341         if (ret < 0)
 342                 printf("EHCI fail timeout STS_ASS reset\n");
 343
 344         return ret;
 345 }
 346
 347 static int
 348 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 349                    int length, struct devrequest *req)
 350 {
 351         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 352         struct qTD *qtd;
 353         int qtd_count = 0;
 354         int qtd_counter = 0;
 355         volatile struct qTD *vtd;
 356         unsigned long ts;
 357         uint32_t *tdp;
 358         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 359         uint32_t c, toggle;
 360         int timeout;
 361         int ret = 0;
 362         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 363
 364         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 365               buffer, length, req);
 366         if (req != NULL)
 367                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 368                       req->request, req->request,
 369                       req->requesttype, req->requesttype,
 370                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 371                       le16_to_cpu(req->index));
 372
 373 #define PKT_ALIGN       512
 374         /*
 375          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 376          * described by a transfer descriptor (the qTD). The qTDs form a linked
 377          * list with a queue head (QH).
 378          *
 379          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 380          * have its beginning in a qTD transfer and its end in the following
 381          * one, so the qTD transfer lengths have to be chosen accordingly.
 382          *
 383          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 384          * single pages. The first data buffer can start at any offset within a
 385          * page (not considering the cache-line alignment issues), while the
 386          * following buffers must be page-aligned. There is no alignment
 387          * constraint on the size of a qTD transfer.
 388          */
 389         if (req != NULL)
 390                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 391                 qtd_count += 1 + 1;
 392         if (length > 0 || req == NULL) {
 393                 /*
 394                  * Determine the qTD transfer size that will be used for the
 395                  * data payload (not considering the first qTD transfer, which
 396                  * may be longer or shorter, and the final one, which may be
 397                  * shorter).
 398                  *
 399                  * In order to keep each packet within a qTD transfer, the qTD
 400                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 401                  * wMaxPacketSize (except in some cases for interrupt transfers,
 402                  * see comment in submit_int_msg()).
 403                  *
 404                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 405                  * QT_BUFFER_CNT full pages will be used.
 406                  */
 407                 int xfr_sz = QT_BUFFER_CNT;
 408                 /*
 409                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 410                  * qTD transfer size will be one page shorter, and the first qTD
 411                  * data buffer of each transfer will be page-unaligned.
 412                  */
 413                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 414                         xfr_sz--;
 415                 /* Convert the qTD transfer size to bytes. */
 416                 xfr_sz *= EHCI_PAGE_SIZE;
 417                 /*
 418                  * Approximate by excess the number of qTDs that will be
 419                  * required for the data payload. The exact formula is way more
 420                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 421                  * bytes.
 422                  */
 423                 qtd_count += 2 + length / xfr_sz;
 424         }
 425 /*
 426  * Threshold value based on the worst-case total size of the allocated qTDs for
 427  * a mass-storage transfer of 65535 blocks of 512 bytes.
 428  */
 429 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 430 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 431 #endif
 432         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 433         if (qtd == NULL) {
 434                 printf("unable to allocate TDs\n");
 435                 return -1;
 436         }
 437
 438         memset(qh, 0, sizeof(struct QH));
 439         memset(qtd, 0, qtd_count * sizeof(*qtd));
 440
 441         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 442
 443         /*
 444          * Setup QH (3.6 in ehci-r10.pdf)
 445          *
 446          *   qh_link ................. 03-00 H
 447          *   qh_endpt1 ............... 07-04 H
 448          *   qh_endpt2 ............... 0B-08 H
 449          * - qh_curtd
 450          *   qh_overlay.qt_next ...... 13-10 H
 451          * - qh_overlay.qt_altnext
 452          */
 453         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 454         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 455         maxpacket = usb_maxpacket(dev, pipe);
 456         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 457                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 458                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 459                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 460                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 461
 462         /* Force FS for fsl HS quirk */
 463         if (!ctrl->has_fsl_erratum_a005275)
 464                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 465         else
 466                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 467
 468         qh->qh_endpt1 = cpu_to_hc32(endpt);
 469         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 470         qh->qh_endpt2 = cpu_to_hc32(endpt);
 471         ehci_update_endpt2_dev_n_port(dev, qh);
 472         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 473         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 474
 475         tdp = &qh->qh_overlay.qt_next;
 476         if (req != NULL) {
 477                 /*
 478                  * Setup request qTD (3.5 in ehci-r10.pdf)
 479                  *
 480                  *   qt_next ................ 03-00 H
 481                  *   qt_altnext ............. 07-04 H
 482                  *   qt_token ............... 0B-08 H
 483                  *
 484                  *   [ buffer, buffer_hi ] loaded with "req".
 485                  */
 486                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 487                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 488                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 489                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 490                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 491                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 492                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 493                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 494                         printf("unable to construct SETUP TD\n");
 495                         goto fail;
 496                 }
 497                 /* Update previous qTD! */
 498                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 499                 tdp = &qtd[qtd_counter++].qt_next;
 500                 toggle = 1;
 501         }
 502
 503         if (length > 0 || req == NULL) {
 504                 uint8_t *buf_ptr = buffer;
 505                 int left_length = length;
 506
 507                 do {
 508                         /*
 509                          * Determine the size of this qTD transfer. By default,
 510                          * QT_BUFFER_CNT full pages can be used.
 511                          */
 512                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 513                         /*
 514                          * However, if the input buffer is not page-aligned, the
 515                          * portion of the first page before the buffer start
 516                          * offset within that page is unusable.
 517                          */
 518                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 519                         /*
 520                          * In order to keep each packet within a qTD transfer,
 521                          * align the qTD transfer size to PKT_ALIGN.
 522                          */
 523                         xfr_bytes &= ~(PKT_ALIGN - 1);
 524                         /*
 525                          * This transfer may be shorter than the available qTD
 526                          * transfer size that has just been computed.
 527                          */
 528                         xfr_bytes = min(xfr_bytes, left_length);
 529
 530                         /*
 531                          * Setup request qTD (3.5 in ehci-r10.pdf)
 532                          *
 533                          *   qt_next ................ 03-00 H
 534                          *   qt_altnext ............. 07-04 H
 535                          *   qt_token ............... 0B-08 H
 536                          *
 537                          *   [ buffer, buffer_hi ] loaded with "buffer".
 538                          */
 539                         qtd[qtd_counter].qt_next =
 540                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 541                         qtd[qtd_counter].qt_altnext =
 542                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 543                         token = QT_TOKEN_DT(toggle) |
 544                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 545                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 546                                 QT_TOKEN_CERR(3) |
 547                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 548                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 549                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 550                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 551                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 552                                                 xfr_bytes)) {
 553                                 printf("unable to construct DATA TD\n");
 554                                 goto fail;
 555                         }
 556                         /* Update previous qTD! */
 557                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 558                         tdp = &qtd[qtd_counter++].qt_next;
 559                         /*
 560                          * Data toggle has to be adjusted since the qTD transfer
 561                          * size is not always an even multiple of
 562                          * wMaxPacketSize.
 563                          */
 564                         if ((xfr_bytes / maxpacket) & 1)
 565                                 toggle ^= 1;
 566                         buf_ptr += xfr_bytes;
 567                         left_length -= xfr_bytes;
 568                 } while (left_length > 0);
 569         }
 570
 571         if (req != NULL) {
 572                 /*
 573                  * Setup request qTD (3.5 in ehci-r10.pdf)
 574                  *
 575                  *   qt_next ................ 03-00 H
 576                  *   qt_altnext ............. 07-04 H
 577                  *   qt_token ............... 0B-08 H
 578                  */
 579                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 580                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 581                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 582                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 583                         QT_TOKEN_PID(usb_pipein(pipe) ?
 584                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 585                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 586                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 587                 /* Update previous qTD! */
 588                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 589                 tdp = &qtd[qtd_counter++].qt_next;
 590         }
 591
 592         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 593
 594         /* Flush dcache */
 595         flush_dcache_range((unsigned long)&ctrl->qh_list,
 596                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 597         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 598         flush_dcache_range((unsigned long)qtd,
 599                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 600
 601         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 602         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 603
 604         ret = ehci_enable_async(ctrl);
 605         if (ret)
 606                 goto fail;
 607
 608         /* Wait for TDs to be processed. */
 609         ts = get_timer(0);
 610         vtd = &qtd[qtd_counter - 1];
 611         timeout = USB_TIMEOUT_MS(pipe);
 612         do {
 613                 /* Invalidate dcache */
 614                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 615                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 616                 invalidate_dcache_range((unsigned long)qh,
 617                         ALIGN_END_ADDR(struct QH, qh, 1));
 618                 invalidate_dcache_range((unsigned long)qtd,
 619                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 620
 621                 token = hc32_to_cpu(vtd->qt_token);
 622                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 623                         break;
 624                 WATCHDOG_RESET();
 625         } while (get_timer(ts) < timeout);
 626         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 627
 628         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 629         flush_dcache_range((unsigned long)&ctrl->qh_list,
 630                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 631
 632         /*
 633          * Invalidate the memory area occupied by buffer
 634          * Don't try to fix the buffer alignment, if it isn't properly
 635          * aligned it's upper layer's fault so let invalidate_dcache_range()
 636          * vow about it. But we have to fix the length as it's actual
 637          * transfer length and can be unaligned. This is potentially
 638          * dangerous operation, it's responsibility of the calling
 639          * code to make sure enough space is reserved.
 640          */
 641         if (buffer != NULL && length > 0)
 642                 invalidate_dcache_range((unsigned long)buffer,
 643                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 644
 645         /* Check that the TD processing happened */
 646         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 647                 printf("EHCI timed out on TD - token=%#x\n", token);
 648
 649         ret = ehci_disable_async(ctrl);
 650         if (ret)
 651                 goto fail;
 652
 653         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 654                 debug("TOKEN=%#x\n", qhtoken);
 655                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 656                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 657                 case 0:
 658                         toggle = QT_TOKEN_GET_DT(qhtoken);
 659                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 660                                        usb_pipeout(pipe), toggle);
 661                         dev->status = 0;
 662                         break;
 663                 case QT_TOKEN_STATUS_HALTED:
 664                         dev->status = USB_ST_STALLED;
 665                         break;
 666                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 667                 case QT_TOKEN_STATUS_DATBUFERR:
 668                         dev->status = USB_ST_BUF_ERR;
 669                         break;
 670                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 671                 case QT_TOKEN_STATUS_BABBLEDET:
 672                         dev->status = USB_ST_BABBLE_DET;
 673                         break;
 674                 default:
 675                         dev->status = USB_ST_CRC_ERR;
 676                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 677                                 dev->status |= USB_ST_STALLED;
 678                         break;
 679                 }
 680                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 681         } else {
 682                 dev->act_len = 0;
 683 #ifndef CONFIG_USB_EHCI_FARADAY
 684                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 685                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 686                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 687                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 688 #endif
 689         }
 690
 691         free(qtd);
 692         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 693
 694 fail:
 695         free(qtd);
 696         return -1;
 697 }
 698
 699 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 700                             void *buffer, int length, struct devrequest *req)
 701 {
 702         uint8_t tmpbuf[4];
 703         u16 typeReq;
 704         void *srcptr = NULL;
 705         int len, srclen;
 706         uint32_t reg;
 707         uint32_t *status_reg;
 708         int port = le16_to_cpu(req->index) & 0xff;
 709         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 710
 711         srclen = 0;
 712
 713         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 714               req->request, req->request,
 715               req->requesttype, req->requesttype,
 716               le16_to_cpu(req->value), le16_to_cpu(req->index));
 717
 718         typeReq = req->request | req->requesttype << 8;
 719
 720         switch (typeReq) {
 721         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 722         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 723         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 724                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 725                 if (!status_reg)
 726                         return -1;
 727                 break;
 728         default:
 729                 status_reg = NULL;
 730                 break;
 731         }
 732
 733         switch (typeReq) {
 734         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 735                 switch (le16_to_cpu(req->value) >> 8) {
 736                 case USB_DT_DEVICE:
 737                         debug("USB_DT_DEVICE request\n");
 738                         srcptr = &descriptor.device;
 739                         srclen = descriptor.device.bLength;
 740                         break;
 741                 case USB_DT_CONFIG:
 742                         debug("USB_DT_CONFIG config\n");
 743                         srcptr = &descriptor.config;
 744                         srclen = descriptor.config.bLength +
 745                                         descriptor.interface.bLength +
 746                                         descriptor.endpoint.bLength;
 747                         break;
 748                 case USB_DT_STRING:
 749                         debug("USB_DT_STRING config\n");
 750                         switch (le16_to_cpu(req->value) & 0xff) {
 751                         case 0: /* Language */
 752                                 srcptr = "\4\3\1\0";
 753                                 srclen = 4;
 754                                 break;
 755                         case 1: /* Vendor */
 756                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 757                                 srclen = 14;
 758                                 break;
 759                         case 2: /* Product */
 760                                 srcptr = "\52\3E\0H\0C\0I\0 "
 761                                          "\0H\0o\0s\0t\0 "
 762                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 763                                 srclen = 42;
 764                                 break;
 765                         default:
 766                                 debug("unknown value DT_STRING %x\n",
 767                                         le16_to_cpu(req->value));
 768                                 goto unknown;
 769                         }
 770                         break;
 771                 default:
 772                         debug("unknown value %x\n", le16_to_cpu(req->value));
 773                         goto unknown;
 774                 }
 775                 break;
 776         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 777                 switch (le16_to_cpu(req->value) >> 8) {
 778                 case USB_DT_HUB:
 779                         debug("USB_DT_HUB config\n");
 780                         srcptr = &descriptor.hub;
 781                         srclen = descriptor.hub.bLength;
 782                         break;
 783                 default:
 784                         debug("unknown value %x\n", le16_to_cpu(req->value));
 785                         goto unknown;
 786                 }
 787                 break;
 788         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 789                 debug("USB_REQ_SET_ADDRESS\n");
 790                 ctrl->rootdev = le16_to_cpu(req->value);
 791                 break;
 792         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 793                 debug("USB_REQ_SET_CONFIGURATION\n");
 794                 /* Nothing to do */
 795                 break;
 796         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 797                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 798                 tmpbuf[1] = 0;
 799                 srcptr = tmpbuf;
 800                 srclen = 2;
 801                 break;
 802         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 803                 memset(tmpbuf, 0, 4);
 804                 reg = ehci_readl(status_reg);
 805                 if (reg & EHCI_PS_CS)
 806                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 807                 if (reg & EHCI_PS_PE)
 808                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 809                 if (reg & EHCI_PS_SUSP)
 810                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 811                 if (reg & EHCI_PS_OCA)
 812                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 813                 if (reg & EHCI_PS_PR)
 814                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 815                 if (reg & EHCI_PS_PP)
 816                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 817
 818                 if (ehci_is_TDI()) {
 819                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 820                         case PORTSC_PSPD_FS:
 821                                 break;
 822                         case PORTSC_PSPD_LS:
 823                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 824                                 break;
 825                         case PORTSC_PSPD_HS:
 826                         default:
 827                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 828                                 break;
 829                         }
 830                 } else {
 831                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 832                 }
 833
 834                 if (reg & EHCI_PS_CSC)
 835                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 836                 if (reg & EHCI_PS_PEC)
 837                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 838                 if (reg & EHCI_PS_OCC)
 839                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 840                 if (ctrl->portreset & (1 << port))
 841                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 842
 843                 srcptr = tmpbuf;
 844                 srclen = 4;
 845                 break;
 846         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 847                 reg = ehci_readl(status_reg);
 848                 reg &= ~EHCI_PS_CLEAR;
 849                 switch (le16_to_cpu(req->value)) {
 850                 case USB_PORT_FEAT_ENABLE:
 851                         reg |= EHCI_PS_PE;
 852                         ehci_writel(status_reg, reg);
 853                         break;
 854                 case USB_PORT_FEAT_POWER:
 855                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 856                                 reg |= EHCI_PS_PP;
 857                                 ehci_writel(status_reg, reg);
 858                         }
 859                         break;
 860                 case USB_PORT_FEAT_RESET:
 861                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 862                             !ehci_is_TDI() &&
 863                             EHCI_PS_IS_LOWSPEED(reg)) {
 864                                 /* Low speed device, give up ownership. */
 865                                 debug("port %d low speed --> companion\n",
 866                                       port - 1);
 867                                 reg |= EHCI_PS_PO;
 868                                 ehci_writel(status_reg, reg);
 869                                 return -ENXIO;
 870                         } else {
 871                                 int ret;
 872
 873                                 /* Disable chirp for HS erratum */
 874                                 if (ctrl->has_fsl_erratum_a005275)
 875                                         reg |= PORTSC_FSL_PFSC;
 876
 877                                 reg |= EHCI_PS_PR;
 878                                 reg &= ~EHCI_PS_PE;
 879                                 ehci_writel(status_reg, reg);
 880                                 /*
 881                                  * caller must wait, then call GetPortStatus
 882                                  * usb 2.0 specification say 50 ms resets on
 883                                  * root
 884                                  */
 885                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 886
 887                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 888                                 /*
 889                                  * A host controller must terminate the reset
 890                                  * and stabilize the state of the port within
 891                                  * 2 milliseconds
 892                                  */
 893                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 894                                                 2 * 1000);
 895                                 if (!ret) {
 896                                         reg = ehci_readl(status_reg);
 897                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 898                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 899                                                 debug("port %d full speed --> companion\n", port - 1);
 900                                                 reg &= ~EHCI_PS_CLEAR;
 901                                                 reg |= EHCI_PS_PO;
 902                                                 ehci_writel(status_reg, reg);
 903                                                 return -ENXIO;
 904                                         } else {
 905                                                 ctrl->portreset |= 1 << port;
 906                                         }
 907                                 } else {
 908                                         printf("port(%d) reset error\n",
 909                                                port - 1);
 910                                 }
 911                         }
 912                         break;
 913                 case USB_PORT_FEAT_TEST:
 914                         ehci_shutdown(ctrl);
 915                         reg &= ~(0xf << 16);
 916                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 917                         ehci_writel(status_reg, reg);
 918                         break;
 919                 default:
 920                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 921                         goto unknown;
 922                 }
 923                 /* unblock posted writes */
 924                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 925                 break;
 926         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 927                 reg = ehci_readl(status_reg);
 928                 reg &= ~EHCI_PS_CLEAR;
 929                 switch (le16_to_cpu(req->value)) {
 930                 case USB_PORT_FEAT_ENABLE:
 931                         reg &= ~EHCI_PS_PE;
 932                         break;
 933                 case USB_PORT_FEAT_C_ENABLE:
 934                         reg |= EHCI_PS_PE;
 935                         break;
 936                 case USB_PORT_FEAT_POWER:
 937                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 938                                 reg &= ~EHCI_PS_PP;
 939                         break;
 940                 case USB_PORT_FEAT_C_CONNECTION:
 941                         reg |= EHCI_PS_CSC;
 942                         break;
 943                 case USB_PORT_FEAT_OVER_CURRENT:
 944                         reg |= EHCI_PS_OCC;
 945                         break;
 946                 case USB_PORT_FEAT_C_RESET:
 947                         ctrl->portreset &= ~(1 << port);
 948                         break;
 949                 default:
 950                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 951                         goto unknown;
 952                 }
 953                 ehci_writel(status_reg, reg);
 954                 /* unblock posted write */
 955                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 956                 break;
 957         default:
 958                 debug("Unknown request\n");
 959                 goto unknown;
 960         }
 961
 962         mdelay(1);
 963         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 964         if (srcptr != NULL && len > 0)
 965                 memcpy(buffer, srcptr, len);
 966         else
 967                 debug("Len is 0\n");
 968
 969         dev->act_len = len;
 970         dev->status = 0;
 971         return 0;
 972
 973 unknown:
 974         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 975               req->requesttype, req->request, le16_to_cpu(req->value),
 976               le16_to_cpu(req->index), le16_to_cpu(req->length));
 977
 978         dev->act_len = 0;
 979         dev->status = USB_ST_STALLED;
 980         return -1;
 981 }
 982
 983 static const struct ehci_ops default_ehci_ops = {
 984         .set_usb_mode           = ehci_set_usbmode,
 985         .get_port_speed         = ehci_get_port_speed,
 986         .powerup_fixup          = ehci_powerup_fixup,
 987         .get_portsc_register    = ehci_get_portsc_register,
 988 };
 989
 990 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 991 {
 992         if (!ops) {
 993                 ctrl->ops = default_ehci_ops;
 994         } else {
 995                 ctrl->ops = *ops;
 996                 if (!ctrl->ops.set_usb_mode)
 997                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 998                 if (!ctrl->ops.get_port_speed)
 999                         ctrl->ops.get_port_speed = ehci_get_port_speed;
1000                 if (!ctrl->ops.powerup_fixup)
1001                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1002                 if (!ctrl->ops.get_portsc_register)
1003                         ctrl->ops.get_portsc_register =
1004                                         ehci_get_portsc_register;
1005         }
1006 }
1007
1008 #if !CONFIG_IS_ENABLED(DM_USB)
1009 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1010 {
1011         struct ehci_ctrl *ctrl = &ehcic[index];
1012
1013         ctrl->priv = priv;
1014         ehci_setup_ops(ctrl, ops);
1015 }
1016
1017 void *ehci_get_controller_priv(int index)
1018 {
1019         return ehcic[index].priv;
1020 }
1021 #endif
1022
1023 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
1024 {
1025         struct QH *qh_list;
1026         struct QH *periodic;
1027         uint32_t reg;
1028         uint32_t cmd;
1029         int i;
1030
1031         /* Set the high address word (aka segment) for 64-bit controller */
1032         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1033                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1034
1035         qh_list = &ctrl->qh_list;
1036
1037         /* Set head of reclaim list */
1038         memset(qh_list, 0, sizeof(*qh_list));
1039         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1040         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1041                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1042         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1043         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1044         qh_list->qh_overlay.qt_token =
1045                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1046
1047         flush_dcache_range((unsigned long)qh_list,
1048                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1049
1050         /* Set async. queue head pointer. */
1051         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1052
1053         /*
1054          * Set up periodic list
1055          * Step 1: Parent QH for all periodic transfers.
1056          */
1057         ctrl->periodic_schedules = 0;
1058         periodic = &ctrl->periodic_queue;
1059         memset(periodic, 0, sizeof(*periodic));
1060         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1061         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1062         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1063
1064         flush_dcache_range((unsigned long)periodic,
1065                            ALIGN_END_ADDR(struct QH, periodic, 1));
1066
1067         /*
1068          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1069          *         In particular, device specifications on polling frequency
1070          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1071          *         when polled with an empty buffer.
1072          *
1073          *         Split Transactions will be spread across microframes using
1074          *         S-mask and C-mask.
1075          */
1076         if (ctrl->periodic_list == NULL)
1077                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1078
1079         if (!ctrl->periodic_list)
1080                 return -ENOMEM;
1081         for (i = 0; i < 1024; i++) {
1082                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1083                                                 | QH_LINK_TYPE_QH);
1084         }
1085
1086         flush_dcache_range((unsigned long)ctrl->periodic_list,
1087                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1088                                           1024));
1089
1090         /* Set periodic list base address */
1091         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1092                 (unsigned long)ctrl->periodic_list);
1093
1094         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1095         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1096         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1097         /* Port Indicators */
1098         if (HCS_INDICATOR(reg))
1099                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1100                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1101         /* Port Power Control */
1102         if (HCS_PPC(reg))
1103                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1104                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1105
1106         /* Start the host controller. */
1107         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1108         /*
1109          * Philips, Intel, and maybe others need CMD_RUN before the
1110          * root hub will detect new devices (why?); NEC doesn't
1111          */
1112         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1113         cmd |= CMD_RUN;
1114         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1115
1116         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1117                 /* take control over the ports */
1118                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1119                 cmd |= FLAG_CF;
1120                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1121         }
1122
1123         /* unblock posted write */
1124         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1125         mdelay(5);
1126         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1127         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1128
1129         return 0;
1130 }
1131
1132 #if !CONFIG_IS_ENABLED(DM_USB)
1133 int usb_lowlevel_stop(int index)
1134 {
1135         ehci_shutdown(&ehcic[index]);
1136         return ehci_hcd_stop(index);
1137 }
1138
1139 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1140 {
1141         struct ehci_ctrl *ctrl = &ehcic[index];
1142         uint tweaks = 0;
1143         int rc;
1144
1145         /**
1146          * Set ops to default_ehci_ops, ehci_hcd_init should call
1147          * ehci_set_controller_priv to change any of these function pointers.
1148          */
1149         ctrl->ops = default_ehci_ops;
1150
1151         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1152         if (rc)
1153                 return rc;
1154         if (!ctrl->hccr || !ctrl->hcor)
1155                 return -1;
1156         if (init == USB_INIT_DEVICE)
1157                 goto done;
1158
1159         /* EHCI spec section 4.1 */
1160         if (ehci_reset(ctrl))
1161                 return -1;
1162
1163 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1164         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1165         if (rc)
1166                 return rc;
1167 #endif
1168 #ifdef CONFIG_USB_EHCI_FARADAY
1169         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1170 #endif
1171         rc = ehci_common_init(ctrl, tweaks);
1172         if (rc)
1173                 return rc;
1174
1175         ctrl->rootdev = 0;
1176 done:
1177         *controller = &ehcic[index];
1178         return 0;
1179 }
1180 #endif
1181
1182 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1183                                  void *buffer, int length)
1184 {
1185
1186         if (usb_pipetype(pipe) != PIPE_BULK) {
1187                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1188                 return -1;
1189         }
1190         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1191 }
1192
1193 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1194                                     void *buffer, int length,
1195                                     struct devrequest *setup)
1196 {
1197         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1198
1199         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1200                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1201                 return -1;
1202         }
1203
1204         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1205                 if (!ctrl->rootdev)
1206                         dev->speed = USB_SPEED_HIGH;
1207                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1208         }
1209         return ehci_submit_async(dev, pipe, buffer, length, setup);
1210 }
1211
1212 struct int_queue {
1213         int elementsize;
1214         unsigned long pipe;
1215         struct QH *first;
1216         struct QH *current;
1217         struct QH *last;
1218         struct qTD *tds;
1219 };
1220
1221 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1222
1223 static int
1224 enable_periodic(struct ehci_ctrl *ctrl)
1225 {
1226         uint32_t cmd;
1227         struct ehci_hcor *hcor = ctrl->hcor;
1228         int ret;
1229
1230         cmd = ehci_readl(&hcor->or_usbcmd);
1231         cmd |= CMD_PSE;
1232         ehci_writel(&hcor->or_usbcmd, cmd);
1233
1234         ret = handshake((uint32_t *)&hcor->or_usbsts,
1235                         STS_PSS, STS_PSS, 100 * 1000);
1236         if (ret < 0) {
1237                 printf("EHCI failed: timeout when enabling periodic list\n");
1238                 return -ETIMEDOUT;
1239         }
1240         udelay(1000);
1241         return 0;
1242 }
1243
1244 static int
1245 disable_periodic(struct ehci_ctrl *ctrl)
1246 {
1247         uint32_t cmd;
1248         struct ehci_hcor *hcor = ctrl->hcor;
1249         int ret;
1250
1251         cmd = ehci_readl(&hcor->or_usbcmd);
1252         cmd &= ~CMD_PSE;
1253         ehci_writel(&hcor->or_usbcmd, cmd);
1254
1255         ret = handshake((uint32_t *)&hcor->or_usbsts,
1256                         STS_PSS, 0, 100 * 1000);
1257         if (ret < 0) {
1258                 printf("EHCI failed: timeout when disabling periodic list\n");
1259                 return -ETIMEDOUT;
1260         }
1261         return 0;
1262 }
1263
1264 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1265                         unsigned long pipe, int queuesize, int elementsize,
1266                         void *buffer, int interval)
1267 {
1268         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1269         struct int_queue *result = NULL;
1270         uint32_t i, toggle;
1271
1272         /*
1273          * Interrupt transfers requiring several transactions are not supported
1274          * because bInterval is ignored.
1275          *
1276          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1277          * <= PKT_ALIGN if several qTDs are required, while the USB
1278          * specification does not constrain this for interrupt transfers. That
1279          * means that ehci_submit_async() would support interrupt transfers
1280          * requiring several transactions only as long as the transfer size does
1281          * not require more than a single qTD.
1282          */
1283         if (elementsize > usb_maxpacket(dev, pipe)) {
1284                 printf("%s: xfers requiring several transactions are not supported.\n",
1285                        __func__);
1286                 return NULL;
1287         }
1288
1289         debug("Enter create_int_queue\n");
1290         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1291                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1292                 return NULL;
1293         }
1294
1295         /* limit to 4 full pages worth of data -
1296          * we can safely fit them in a single TD,
1297          * no matter the alignment
1298          */
1299         if (elementsize >= 16384) {
1300                 debug("too large elements for interrupt transfers\n");
1301                 return NULL;
1302         }
1303
1304         result = malloc(sizeof(*result));
1305         if (!result) {
1306                 debug("ehci intr queue: out of memory\n");
1307                 goto fail1;
1308         }
1309         result->elementsize = elementsize;
1310         result->pipe = pipe;
1311         result->first = memalign(USB_DMA_MINALIGN,
1312                                  sizeof(struct QH) * queuesize);
1313         if (!result->first) {
1314                 debug("ehci intr queue: out of memory\n");
1315                 goto fail2;
1316         }
1317         result->current = result->first;
1318         result->last = result->first + queuesize - 1;
1319         result->tds = memalign(USB_DMA_MINALIGN,
1320                                sizeof(struct qTD) * queuesize);
1321         if (!result->tds) {
1322                 debug("ehci intr queue: out of memory\n");
1323                 goto fail3;
1324         }
1325         memset(result->first, 0, sizeof(struct QH) * queuesize);
1326         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1327
1328         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1329
1330         for (i = 0; i < queuesize; i++) {
1331                 struct QH *qh = result->first + i;
1332                 struct qTD *td = result->tds + i;
1333                 void **buf = &qh->buffer;
1334
1335                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1336                 if (i == queuesize - 1)
1337                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1338
1339                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1340                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1341                 qh->qh_endpt1 =
1342                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1343                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1344                         (1 << 14) |
1345                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1346                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1347                         (usb_pipedevice(pipe) << 0));
1348                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1349                         (1 << 0)); /* S-mask: microframe 0 */
1350                 if (dev->speed == USB_SPEED_LOW ||
1351                                 dev->speed == USB_SPEED_FULL) {
1352                         /* C-mask: microframes 2-4 */
1353                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1354                 }
1355                 ehci_update_endpt2_dev_n_port(dev, qh);
1356
1357                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1358                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1359                 debug("communication direction is '%s'\n",
1360                       usb_pipein(pipe) ? "in" : "out");
1361                 td->qt_token = cpu_to_hc32(
1362                         QT_TOKEN_DT(toggle) |
1363                         (elementsize << 16) |
1364                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1365                         0x80); /* active */
1366                 td->qt_buffer[0] =
1367                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1368                 td->qt_buffer[1] =
1369                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1370                 td->qt_buffer[2] =
1371                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1372                 td->qt_buffer[3] =
1373                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1374                 td->qt_buffer[4] =
1375                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1376
1377                 *buf = buffer + i * elementsize;
1378                 toggle ^= 1;
1379         }
1380
1381         flush_dcache_range((unsigned long)buffer,
1382                            ALIGN_END_ADDR(char, buffer,
1383                                           queuesize * elementsize));
1384         flush_dcache_range((unsigned long)result->first,
1385                            ALIGN_END_ADDR(struct QH, result->first,
1386                                           queuesize));
1387         flush_dcache_range((unsigned long)result->tds,
1388                            ALIGN_END_ADDR(struct qTD, result->tds,
1389                                           queuesize));
1390
1391         if (ctrl->periodic_schedules > 0) {
1392                 if (disable_periodic(ctrl) < 0) {
1393                         debug("FATAL: periodic should never fail, but did");
1394                         goto fail3;
1395                 }
1396         }
1397
1398         /* hook up to periodic list */
1399         struct QH *list = &ctrl->periodic_queue;
1400         result->last->qh_link = list->qh_link;
1401         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1402
1403         flush_dcache_range((unsigned long)result->last,
1404                            ALIGN_END_ADDR(struct QH, result->last, 1));
1405         flush_dcache_range((unsigned long)list,
1406                            ALIGN_END_ADDR(struct QH, list, 1));
1407
1408         if (enable_periodic(ctrl) < 0) {
1409                 debug("FATAL: periodic should never fail, but did");
1410                 goto fail3;
1411         }
1412         ctrl->periodic_schedules++;
1413
1414         debug("Exit create_int_queue\n");
1415         return result;
1416 fail3:
1417         free(result->tds);
1418 fail2:
1419         free(result->first);
1420         free(result);
1421 fail1:
1422         return NULL;
1423 }
1424
1425 static void *_ehci_poll_int_queue(struct usb_device *dev,
1426                                   struct int_queue *queue)
1427 {
1428         struct QH *cur = queue->current;
1429         struct qTD *cur_td;
1430         uint32_t token, toggle;
1431         unsigned long pipe = queue->pipe;
1432
1433         /* depleted queue */
1434         if (cur == NULL) {
1435                 debug("Exit poll_int_queue with completed queue\n");
1436                 return NULL;
1437         }
1438         /* still active */
1439         cur_td = &queue->tds[queue->current - queue->first];
1440         invalidate_dcache_range((unsigned long)cur_td,
1441                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1442         token = hc32_to_cpu(cur_td->qt_token);
1443         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1444                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1445                 return NULL;
1446         }
1447
1448         toggle = QT_TOKEN_GET_DT(token);
1449         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1450
1451         if (!(cur->qh_link & QH_LINK_TERMINATE))
1452                 queue->current++;
1453         else
1454                 queue->current = NULL;
1455
1456         invalidate_dcache_range((unsigned long)cur->buffer,
1457                                 ALIGN_END_ADDR(char, cur->buffer,
1458                                                queue->elementsize));
1459
1460         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1461               token, cur, queue->first);
1462         return cur->buffer;
1463 }
1464
1465 /* Do not free buffers associated with QHs, they're owned by someone else */
1466 static int _ehci_destroy_int_queue(struct usb_device *dev,
1467                                    struct int_queue *queue)
1468 {
1469         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1470         int result = -1;
1471         unsigned long timeout;
1472
1473         if (disable_periodic(ctrl) < 0) {
1474                 debug("FATAL: periodic should never fail, but did");
1475                 goto out;
1476         }
1477         ctrl->periodic_schedules--;
1478
1479         struct QH *cur = &ctrl->periodic_queue;
1480         timeout = get_timer(0) + 500; /* abort after 500ms */
1481         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1482                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1483                 if (NEXT_QH(cur) == queue->first) {
1484                         debug("found candidate. removing from chain\n");
1485                         cur->qh_link = queue->last->qh_link;
1486                         flush_dcache_range((unsigned long)cur,
1487                                            ALIGN_END_ADDR(struct QH, cur, 1));
1488                         result = 0;
1489                         break;
1490                 }
1491                 cur = NEXT_QH(cur);
1492                 if (get_timer(0) > timeout) {
1493                         printf("Timeout destroying interrupt endpoint queue\n");
1494                         result = -1;
1495                         goto out;
1496                 }
1497         }
1498
1499         if (ctrl->periodic_schedules > 0) {
1500                 result = enable_periodic(ctrl);
1501                 if (result < 0)
1502                         debug("FATAL: periodic should never fail, but did");
1503         }
1504
1505 out:
1506         free(queue->tds);
1507         free(queue->first);
1508         free(queue);
1509
1510         return result;
1511 }
1512
1513 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1514                                 void *buffer, int length, int interval,
1515                                 bool nonblock)
1516 {
1517         void *backbuffer;
1518         struct int_queue *queue;
1519         unsigned long timeout;
1520         int result = 0, ret;
1521
1522         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1523               dev, pipe, buffer, length, interval);
1524
1525         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1526         if (!queue)
1527                 return -1;
1528
1529         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1530         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1531                 if (get_timer(0) > timeout) {
1532                         printf("Timeout poll on interrupt endpoint\n");
1533                         result = -ETIMEDOUT;
1534                         break;
1535                 }
1536
1537         if (backbuffer != buffer) {
1538                 debug("got wrong buffer back (%p instead of %p)\n",
1539                       backbuffer, buffer);
1540                 return -EINVAL;
1541         }
1542
1543         ret = _ehci_destroy_int_queue(dev, queue);
1544         if (ret < 0)
1545                 return ret;
1546
1547         /* everything worked out fine */
1548         return result;
1549 }
1550
1551 static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1552 {
1553         ctrl->async_locked = lock;
1554
1555         if (lock)
1556                 return 0;
1557
1558         return ehci_disable_async(ctrl);
1559 }
1560
1561 #if !CONFIG_IS_ENABLED(DM_USB)
1562 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1563                             void *buffer, int length)
1564 {
1565         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1566 }
1567
1568 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1569                    int length, struct devrequest *setup)
1570 {
1571         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1572 }
1573
1574 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1575                    void *buffer, int length, int interval, bool nonblock)
1576 {
1577         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1578                                     nonblock);
1579 }
1580
1581 struct int_queue *create_int_queue(struct usb_device *dev,
1582                 unsigned long pipe, int queuesize, int elementsize,
1583                 void *buffer, int interval)
1584 {
1585         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1586                                       buffer, interval);
1587 }
1588
1589 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1590 {
1591         return _ehci_poll_int_queue(dev, queue);
1592 }
1593
1594 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1595 {
1596         return _ehci_destroy_int_queue(dev, queue);
1597 }
1598
1599 int usb_lock_async(struct usb_device *dev, int lock)
1600 {
1601         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1602
1603         return _ehci_lock_async(ctrl, lock);
1604 }
1605 #endif
1606
1607 #if CONFIG_IS_ENABLED(DM_USB)
1608 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1609                                    unsigned long pipe, void *buffer, int length,
1610                                    struct devrequest *setup)
1611 {
1612         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1613               dev->name, udev, udev->dev->name, udev->portnr);
1614
1615         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1616 }
1617
1618 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1619                                 unsigned long pipe, void *buffer, int length)
1620 {
1621         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1622         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1623 }
1624
1625 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1626                                unsigned long pipe, void *buffer, int length,
1627                                int interval, bool nonblock)
1628 {
1629         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1630         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1631                                     nonblock);
1632 }
1633
1634 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1635                 struct usb_device *udev, unsigned long pipe, int queuesize,
1636                 int elementsize, void *buffer, int interval)
1637 {
1638         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1639         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1640                                       buffer, interval);
1641 }
1642
1643 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1644                                  struct int_queue *queue)
1645 {
1646         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1647         return _ehci_poll_int_queue(udev, queue);
1648 }
1649
1650 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1651                                   struct int_queue *queue)
1652 {
1653         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1654         return _ehci_destroy_int_queue(udev, queue);
1655 }
1656
1657 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1658 {
1659         /*
1660          * EHCD can handle any transfer length as long as there is enough
1661          * free heap space left, hence set the theoretical max number here.
1662          */
1663         *size = SIZE_MAX;
1664
1665         return 0;
1666 }
1667
1668 static int ehci_lock_async(struct udevice *dev, int lock)
1669 {
1670         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1671
1672         return _ehci_lock_async(ctrl, lock);
1673 }
1674
1675 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1676                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1677                   uint tweaks, enum usb_init_type init)
1678 {
1679         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1680         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1681         int ret = -1;
1682
1683         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1684               dev->name, ctrl, hccr, hcor, init);
1685
1686         if (!ctrl || !hccr || !hcor)
1687                 goto err;
1688
1689         priv->desc_before_addr = true;
1690
1691         ehci_setup_ops(ctrl, ops);
1692         ctrl->hccr = hccr;
1693         ctrl->hcor = hcor;
1694         ctrl->priv = ctrl;
1695
1696         ctrl->init = init;
1697         if (ctrl->init == USB_INIT_DEVICE)
1698                 goto done;
1699
1700         ret = ehci_reset(ctrl);
1701         if (ret)
1702                 goto err;
1703
1704         if (ctrl->ops.init_after_reset) {
1705                 ret = ctrl->ops.init_after_reset(ctrl);
1706                 if (ret)
1707                         goto err;
1708         }
1709
1710         ret = ehci_common_init(ctrl, tweaks);
1711         if (ret)
1712                 goto err;
1713 done:
1714         return 0;
1715 err:
1716         free(ctrl);
1717         debug("%s: failed, ret=%d\n", __func__, ret);
1718         return ret;
1719 }
1720
1721 int ehci_deregister(struct udevice *dev)
1722 {
1723         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1724
1725         if (ctrl->init == USB_INIT_DEVICE)
1726                 return 0;
1727
1728         ehci_shutdown(ctrl);
1729
1730         return 0;
1731 }
1732
1733 struct dm_usb_ops ehci_usb_ops = {
1734         .control = ehci_submit_control_msg,
1735         .bulk = ehci_submit_bulk_msg,
1736         .interrupt = ehci_submit_int_msg,
1737         .create_int_queue = ehci_create_int_queue,
1738         .poll_int_queue = ehci_poll_int_queue,
1739         .destroy_int_queue = ehci_destroy_int_queue,
1740         .get_max_xfer_size  = ehci_get_max_xfer_size,
1741         .lock_async = ehci_lock_async,
1742 };
1743
1744 #endif
1745
1746 #ifdef CONFIG_PHY
1747 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1748 {
1749         int ret;
1750
1751         if (!phy)
1752                 return 0;
1753
1754         ret = generic_phy_get_by_index(dev, index, phy);
1755         if (ret) {
1756                 if (ret != -ENOENT) {
1757                         dev_err(dev, "failed to get usb phy\n");
1758                         return ret;
1759                 }
1760         } else {
1761                 ret = generic_phy_init(phy);
1762                 if (ret) {
1763                         dev_err(dev, "failed to init usb phy\n");
1764                         return ret;
1765                 }
1766
1767                 ret = generic_phy_power_on(phy);
1768                 if (ret) {
1769                         dev_err(dev, "failed to power on usb phy\n");
1770                         return generic_phy_exit(phy);
1771                 }
1772         }
1773
1774         return 0;
1775 }
1776
1777 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1778 {
1779         int ret = 0;
1780
1781         if (!phy)
1782                 return 0;
1783
1784         if (generic_phy_valid(phy)) {
1785                 ret = generic_phy_power_off(phy);
1786                 if (ret) {
1787                         dev_err(dev, "failed to power off usb phy\n");
1788                         return ret;
1789                 }
1790
1791                 ret = generic_phy_exit(phy);
1792                 if (ret) {
1793                         dev_err(dev, "failed to power off usb phy\n");
1794                         return ret;
1795                 }
1796         }
1797
1798         return 0;
1799 }
1800 #else
1801 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1802 {
1803         return 0;
1804 }
1805
1806 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1807 {
1808         return 0;
1809 }
1810 #endif