drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <asm/byteorder.h>
  14 #include <asm/unaligned.h>
  15 #include <usb.h>
  16 #include <asm/io.h>
  17 #include <malloc.h>
  18 #include <memalign.h>
  19 #include <watchdog.h>
  20 #include <dm/device_compat.h>
  21 #include <linux/compiler.h>
  22
  23 #include "ehci.h"
  24
  25 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  26 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  27 #endif
  28
  29 /*
  30  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  31  * Let's time out after 8 to have a little safety margin on top of that.
  32  */
  33 #define HCHALT_TIMEOUT (8 * 1000)
  34
  35 #if !CONFIG_IS_ENABLED(DM_USB)
  36 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  37 #endif
  38
  39 #define ALIGN_END_ADDR(type, ptr, size)                 \
  40         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  41
  42 static struct descriptor {
  43         struct usb_hub_descriptor hub;
  44         struct usb_device_descriptor device;
  45         struct usb_linux_config_descriptor config;
  46         struct usb_linux_interface_descriptor interface;
  47         struct usb_endpoint_descriptor endpoint;
  48 }  __attribute__ ((packed)) descriptor = {
  49         {
  50                 0x8,            /* bDescLength */
  51                 0x29,           /* bDescriptorType: hub descriptor */
  52                 2,              /* bNrPorts -- runtime modified */
  53                 0,              /* wHubCharacteristics */
  54                 10,             /* bPwrOn2PwrGood */
  55                 0,              /* bHubCntrCurrent */
  56                 {               /* Device removable */
  57                 }               /* at most 7 ports! XXX */
  58         },
  59         {
  60                 0x12,           /* bLength */
  61                 1,              /* bDescriptorType: UDESC_DEVICE */
  62                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  63                 9,              /* bDeviceClass: UDCLASS_HUB */
  64                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  65                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  66                 64,             /* bMaxPacketSize: 64 bytes */
  67                 0x0000,         /* idVendor */
  68                 0x0000,         /* idProduct */
  69                 cpu_to_le16(0x0100), /* bcdDevice */
  70                 1,              /* iManufacturer */
  71                 2,              /* iProduct */
  72                 0,              /* iSerialNumber */
  73                 1               /* bNumConfigurations: 1 */
  74         },
  75         {
  76                 0x9,
  77                 2,              /* bDescriptorType: UDESC_CONFIG */
  78                 cpu_to_le16(0x19),
  79                 1,              /* bNumInterface */
  80                 1,              /* bConfigurationValue */
  81                 0,              /* iConfiguration */
  82                 0x40,           /* bmAttributes: UC_SELF_POWER */
  83                 0               /* bMaxPower */
  84         },
  85         {
  86                 0x9,            /* bLength */
  87                 4,              /* bDescriptorType: UDESC_INTERFACE */
  88                 0,              /* bInterfaceNumber */
  89                 0,              /* bAlternateSetting */
  90                 1,              /* bNumEndpoints */
  91                 9,              /* bInterfaceClass: UICLASS_HUB */
  92                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  93                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  94                 0               /* iInterface */
  95         },
  96         {
  97                 0x7,            /* bLength */
  98                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  99                 0x81,           /* bEndpointAddress:
 100                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 101                                  */
 102                 3,              /* bmAttributes: UE_INTERRUPT */
 103                 8,              /* wMaxPacketSize */
 104                 255             /* bInterval */
 105         },
 106 };
 107
 108 #if defined(CONFIG_EHCI_IS_TDI)
 109 #define ehci_is_TDI()   (1)
 110 #else
 111 #define ehci_is_TDI()   (0)
 112 #endif
 113
 114 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 115 {
 116 #if CONFIG_IS_ENABLED(DM_USB)
 117         return dev_get_priv(usb_get_bus(udev->dev));
 118 #else
 119         return udev->controller;
 120 #endif
 121 }
 122
 123 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 124 {
 125         return PORTSC_PSPD(reg);
 126 }
 127
 128 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 129 {
 130         uint32_t tmp;
 131         uint32_t *reg_ptr;
 132
 133         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 134         tmp = ehci_readl(reg_ptr);
 135         tmp |= USBMODE_CM_HC;
 136 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 137         tmp |= USBMODE_BE;
 138 #else
 139         tmp &= ~USBMODE_BE;
 140 #endif
 141         ehci_writel(reg_ptr, tmp);
 142 }
 143
 144 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 145                                uint32_t *reg)
 146 {
 147         mdelay(50);
 148 }
 149
 150 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 151 {
 152         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 153
 154         if (port < 0 || port >= max_ports) {
 155                 /* Printing the message would cause a scan failure! */
 156                 debug("The request port(%u) exceeds maximum port number\n",
 157                       port);
 158                 return NULL;
 159         }
 160
 161         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 162 }
 163
 164 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 165 {
 166         uint32_t result;
 167         do {
 168                 result = ehci_readl(ptr);
 169                 udelay(5);
 170                 if (result == ~(uint32_t)0)
 171                         return -1;
 172                 result &= mask;
 173                 if (result == done)
 174                         return 0;
 175                 usec--;
 176         } while (usec > 0);
 177         return -1;
 178 }
 179
 180 static int ehci_reset(struct ehci_ctrl *ctrl)
 181 {
 182         uint32_t cmd;
 183         int ret = 0;
 184
 185         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 186         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 187         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 188         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 189                         CMD_RESET, 0, 250 * 1000);
 190         if (ret < 0) {
 191                 printf("EHCI fail to reset\n");
 192                 goto out;
 193         }
 194
 195         if (ehci_is_TDI())
 196                 ctrl->ops.set_usb_mode(ctrl);
 197
 198 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 199         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 200         cmd &= ~TXFIFO_THRESH_MASK;
 201         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 202         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 203 #endif
 204 out:
 205         return ret;
 206 }
 207
 208 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 209 {
 210         int i, ret = 0;
 211         uint32_t cmd, reg;
 212         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 213
 214         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 215         /* If not run, directly return */
 216         if (!(cmd & CMD_RUN))
 217                 return 0;
 218         cmd &= ~(CMD_PSE | CMD_ASE);
 219         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 220         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 221                 100 * 1000);
 222
 223         if (!ret) {
 224                 for (i = 0; i < max_ports; i++) {
 225                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 226                         reg |= EHCI_PS_SUSP;
 227                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 228                 }
 229
 230                 cmd &= ~CMD_RUN;
 231                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 232                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 233                         HCHALT_TIMEOUT);
 234         }
 235
 236         if (ret)
 237                 puts("EHCI failed to shut down host controller.\n");
 238
 239         return ret;
 240 }
 241
 242 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 243 {
 244         uint32_t delta, next;
 245         unsigned long addr = (unsigned long)buf;
 246         int idx;
 247
 248         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 249                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 250
 251         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 252
 253         idx = 0;
 254         while (idx < QT_BUFFER_CNT) {
 255                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 256                 td->qt_buffer_hi[idx] = 0;
 257                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 258                 delta = next - addr;
 259                 if (delta >= sz)
 260                         break;
 261                 sz -= delta;
 262                 addr = next;
 263                 idx++;
 264         }
 265
 266         if (idx == QT_BUFFER_CNT) {
 267                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 268                 return -1;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 275 {
 276         #define QH_HIGH_SPEED   2
 277         #define QH_FULL_SPEED   0
 278         #define QH_LOW_SPEED    1
 279         if (speed == USB_SPEED_HIGH)
 280                 return QH_HIGH_SPEED;
 281         if (speed == USB_SPEED_LOW)
 282                 return QH_LOW_SPEED;
 283         return QH_FULL_SPEED;
 284 }
 285
 286 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 287                                           struct QH *qh)
 288 {
 289         uint8_t portnr = 0;
 290         uint8_t hubaddr = 0;
 291
 292         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 293                 return;
 294
 295         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 296
 297         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 298                                      QH_ENDPT2_HUBADDR(hubaddr));
 299 }
 300
 301 static int
 302 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 303                    int length, struct devrequest *req)
 304 {
 305         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 306         struct qTD *qtd;
 307         int qtd_count = 0;
 308         int qtd_counter = 0;
 309         volatile struct qTD *vtd;
 310         unsigned long ts;
 311         uint32_t *tdp;
 312         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 313         uint32_t c, toggle;
 314         uint32_t cmd;
 315         int timeout;
 316         int ret = 0;
 317         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 318
 319         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 320               buffer, length, req);
 321         if (req != NULL)
 322                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 323                       req->request, req->request,
 324                       req->requesttype, req->requesttype,
 325                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 326                       le16_to_cpu(req->index));
 327
 328 #define PKT_ALIGN       512
 329         /*
 330          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 331          * described by a transfer descriptor (the qTD). The qTDs form a linked
 332          * list with a queue head (QH).
 333          *
 334          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 335          * have its beginning in a qTD transfer and its end in the following
 336          * one, so the qTD transfer lengths have to be chosen accordingly.
 337          *
 338          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 339          * single pages. The first data buffer can start at any offset within a
 340          * page (not considering the cache-line alignment issues), while the
 341          * following buffers must be page-aligned. There is no alignment
 342          * constraint on the size of a qTD transfer.
 343          */
 344         if (req != NULL)
 345                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 346                 qtd_count += 1 + 1;
 347         if (length > 0 || req == NULL) {
 348                 /*
 349                  * Determine the qTD transfer size that will be used for the
 350                  * data payload (not considering the first qTD transfer, which
 351                  * may be longer or shorter, and the final one, which may be
 352                  * shorter).
 353                  *
 354                  * In order to keep each packet within a qTD transfer, the qTD
 355                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 356                  * wMaxPacketSize (except in some cases for interrupt transfers,
 357                  * see comment in submit_int_msg()).
 358                  *
 359                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 360                  * QT_BUFFER_CNT full pages will be used.
 361                  */
 362                 int xfr_sz = QT_BUFFER_CNT;
 363                 /*
 364                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 365                  * qTD transfer size will be one page shorter, and the first qTD
 366                  * data buffer of each transfer will be page-unaligned.
 367                  */
 368                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 369                         xfr_sz--;
 370                 /* Convert the qTD transfer size to bytes. */
 371                 xfr_sz *= EHCI_PAGE_SIZE;
 372                 /*
 373                  * Approximate by excess the number of qTDs that will be
 374                  * required for the data payload. The exact formula is way more
 375                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 376                  * bytes.
 377                  */
 378                 qtd_count += 2 + length / xfr_sz;
 379         }
 380 /*
 381  * Threshold value based on the worst-case total size of the allocated qTDs for
 382  * a mass-storage transfer of 65535 blocks of 512 bytes.
 383  */
 384 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 385 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 386 #endif
 387         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 388         if (qtd == NULL) {
 389                 printf("unable to allocate TDs\n");
 390                 return -1;
 391         }
 392
 393         memset(qh, 0, sizeof(struct QH));
 394         memset(qtd, 0, qtd_count * sizeof(*qtd));
 395
 396         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 397
 398         /*
 399          * Setup QH (3.6 in ehci-r10.pdf)
 400          *
 401          *   qh_link ................. 03-00 H
 402          *   qh_endpt1 ............... 07-04 H
 403          *   qh_endpt2 ............... 0B-08 H
 404          * - qh_curtd
 405          *   qh_overlay.qt_next ...... 13-10 H
 406          * - qh_overlay.qt_altnext
 407          */
 408         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 409         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 410         maxpacket = usb_maxpacket(dev, pipe);
 411         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 412                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 413                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 414                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 415                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 416
 417         /* Force FS for fsl HS quirk */
 418         if (!ctrl->has_fsl_erratum_a005275)
 419                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 420         else
 421                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 422
 423         qh->qh_endpt1 = cpu_to_hc32(endpt);
 424         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 425         qh->qh_endpt2 = cpu_to_hc32(endpt);
 426         ehci_update_endpt2_dev_n_port(dev, qh);
 427         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 428         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 429
 430         tdp = &qh->qh_overlay.qt_next;
 431         if (req != NULL) {
 432                 /*
 433                  * Setup request qTD (3.5 in ehci-r10.pdf)
 434                  *
 435                  *   qt_next ................ 03-00 H
 436                  *   qt_altnext ............. 07-04 H
 437                  *   qt_token ............... 0B-08 H
 438                  *
 439                  *   [ buffer, buffer_hi ] loaded with "req".
 440                  */
 441                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 442                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 443                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 444                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 445                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 446                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 447                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 448                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 449                         printf("unable to construct SETUP TD\n");
 450                         goto fail;
 451                 }
 452                 /* Update previous qTD! */
 453                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 454                 tdp = &qtd[qtd_counter++].qt_next;
 455                 toggle = 1;
 456         }
 457
 458         if (length > 0 || req == NULL) {
 459                 uint8_t *buf_ptr = buffer;
 460                 int left_length = length;
 461
 462                 do {
 463                         /*
 464                          * Determine the size of this qTD transfer. By default,
 465                          * QT_BUFFER_CNT full pages can be used.
 466                          */
 467                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 468                         /*
 469                          * However, if the input buffer is not page-aligned, the
 470                          * portion of the first page before the buffer start
 471                          * offset within that page is unusable.
 472                          */
 473                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 474                         /*
 475                          * In order to keep each packet within a qTD transfer,
 476                          * align the qTD transfer size to PKT_ALIGN.
 477                          */
 478                         xfr_bytes &= ~(PKT_ALIGN - 1);
 479                         /*
 480                          * This transfer may be shorter than the available qTD
 481                          * transfer size that has just been computed.
 482                          */
 483                         xfr_bytes = min(xfr_bytes, left_length);
 484
 485                         /*
 486                          * Setup request qTD (3.5 in ehci-r10.pdf)
 487                          *
 488                          *   qt_next ................ 03-00 H
 489                          *   qt_altnext ............. 07-04 H
 490                          *   qt_token ............... 0B-08 H
 491                          *
 492                          *   [ buffer, buffer_hi ] loaded with "buffer".
 493                          */
 494                         qtd[qtd_counter].qt_next =
 495                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 496                         qtd[qtd_counter].qt_altnext =
 497                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 498                         token = QT_TOKEN_DT(toggle) |
 499                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 500                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 501                                 QT_TOKEN_CERR(3) |
 502                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 503                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 504                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 505                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 506                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 507                                                 xfr_bytes)) {
 508                                 printf("unable to construct DATA TD\n");
 509                                 goto fail;
 510                         }
 511                         /* Update previous qTD! */
 512                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 513                         tdp = &qtd[qtd_counter++].qt_next;
 514                         /*
 515                          * Data toggle has to be adjusted since the qTD transfer
 516                          * size is not always an even multiple of
 517                          * wMaxPacketSize.
 518                          */
 519                         if ((xfr_bytes / maxpacket) & 1)
 520                                 toggle ^= 1;
 521                         buf_ptr += xfr_bytes;
 522                         left_length -= xfr_bytes;
 523                 } while (left_length > 0);
 524         }
 525
 526         if (req != NULL) {
 527                 /*
 528                  * Setup request qTD (3.5 in ehci-r10.pdf)
 529                  *
 530                  *   qt_next ................ 03-00 H
 531                  *   qt_altnext ............. 07-04 H
 532                  *   qt_token ............... 0B-08 H
 533                  */
 534                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 535                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 536                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 537                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 538                         QT_TOKEN_PID(usb_pipein(pipe) ?
 539                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 540                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 541                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 542                 /* Update previous qTD! */
 543                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 544                 tdp = &qtd[qtd_counter++].qt_next;
 545         }
 546
 547         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 548
 549         /* Flush dcache */
 550         flush_dcache_range((unsigned long)&ctrl->qh_list,
 551                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 552         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 553         flush_dcache_range((unsigned long)qtd,
 554                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 555
 556         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 557         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 558
 559         /* Enable async. schedule. */
 560         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 561         if (!(cmd & CMD_ASE)) {
 562                 cmd |= CMD_ASE;
 563                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 564
 565                 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 566                                 100 * 1000);
 567                 if (ret < 0) {
 568                         printf("EHCI fail timeout STS_ASS set\n");
 569                         goto fail;
 570                 }
 571         }
 572
 573         /* Wait for TDs to be processed. */
 574         ts = get_timer(0);
 575         vtd = &qtd[qtd_counter - 1];
 576         timeout = USB_TIMEOUT_MS(pipe);
 577         do {
 578                 /* Invalidate dcache */
 579                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 580                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 581                 invalidate_dcache_range((unsigned long)qh,
 582                         ALIGN_END_ADDR(struct QH, qh, 1));
 583                 invalidate_dcache_range((unsigned long)qtd,
 584                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 585
 586                 token = hc32_to_cpu(vtd->qt_token);
 587                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 588                         break;
 589                 WATCHDOG_RESET();
 590         } while (get_timer(ts) < timeout);
 591         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 592
 593         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 594         flush_dcache_range((unsigned long)&ctrl->qh_list,
 595                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 596
 597         /*
 598          * Invalidate the memory area occupied by buffer
 599          * Don't try to fix the buffer alignment, if it isn't properly
 600          * aligned it's upper layer's fault so let invalidate_dcache_range()
 601          * vow about it. But we have to fix the length as it's actual
 602          * transfer length and can be unaligned. This is potentially
 603          * dangerous operation, it's responsibility of the calling
 604          * code to make sure enough space is reserved.
 605          */
 606         if (buffer != NULL && length > 0)
 607                 invalidate_dcache_range((unsigned long)buffer,
 608                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 609
 610         /* Check that the TD processing happened */
 611         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 612                 printf("EHCI timed out on TD - token=%#x\n", token);
 613
 614         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 615                 debug("TOKEN=%#x\n", qhtoken);
 616                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 617                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 618                 case 0:
 619                         toggle = QT_TOKEN_GET_DT(qhtoken);
 620                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 621                                        usb_pipeout(pipe), toggle);
 622                         dev->status = 0;
 623                         break;
 624                 case QT_TOKEN_STATUS_HALTED:
 625                         dev->status = USB_ST_STALLED;
 626                         break;
 627                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 628                 case QT_TOKEN_STATUS_DATBUFERR:
 629                         dev->status = USB_ST_BUF_ERR;
 630                         break;
 631                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 632                 case QT_TOKEN_STATUS_BABBLEDET:
 633                         dev->status = USB_ST_BABBLE_DET;
 634                         break;
 635                 default:
 636                         dev->status = USB_ST_CRC_ERR;
 637                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 638                                 dev->status |= USB_ST_STALLED;
 639                         break;
 640                 }
 641                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 642         } else {
 643                 dev->act_len = 0;
 644 #ifndef CONFIG_USB_EHCI_FARADAY
 645                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 646                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 647                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 648                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 649 #endif
 650         }
 651
 652         free(qtd);
 653         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 654
 655 fail:
 656         free(qtd);
 657         return -1;
 658 }
 659
 660 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 661                             void *buffer, int length, struct devrequest *req)
 662 {
 663         uint8_t tmpbuf[4];
 664         u16 typeReq;
 665         void *srcptr = NULL;
 666         int len, srclen;
 667         uint32_t reg;
 668         uint32_t *status_reg;
 669         int port = le16_to_cpu(req->index) & 0xff;
 670         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 671
 672         srclen = 0;
 673
 674         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 675               req->request, req->request,
 676               req->requesttype, req->requesttype,
 677               le16_to_cpu(req->value), le16_to_cpu(req->index));
 678
 679         typeReq = req->request | req->requesttype << 8;
 680
 681         switch (typeReq) {
 682         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 683         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 684         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 685                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 686                 if (!status_reg)
 687                         return -1;
 688                 break;
 689         default:
 690                 status_reg = NULL;
 691                 break;
 692         }
 693
 694         switch (typeReq) {
 695         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 696                 switch (le16_to_cpu(req->value) >> 8) {
 697                 case USB_DT_DEVICE:
 698                         debug("USB_DT_DEVICE request\n");
 699                         srcptr = &descriptor.device;
 700                         srclen = descriptor.device.bLength;
 701                         break;
 702                 case USB_DT_CONFIG:
 703                         debug("USB_DT_CONFIG config\n");
 704                         srcptr = &descriptor.config;
 705                         srclen = descriptor.config.bLength +
 706                                         descriptor.interface.bLength +
 707                                         descriptor.endpoint.bLength;
 708                         break;
 709                 case USB_DT_STRING:
 710                         debug("USB_DT_STRING config\n");
 711                         switch (le16_to_cpu(req->value) & 0xff) {
 712                         case 0: /* Language */
 713                                 srcptr = "\4\3\1\0";
 714                                 srclen = 4;
 715                                 break;
 716                         case 1: /* Vendor */
 717                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 718                                 srclen = 14;
 719                                 break;
 720                         case 2: /* Product */
 721                                 srcptr = "\52\3E\0H\0C\0I\0 "
 722                                          "\0H\0o\0s\0t\0 "
 723                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 724                                 srclen = 42;
 725                                 break;
 726                         default:
 727                                 debug("unknown value DT_STRING %x\n",
 728                                         le16_to_cpu(req->value));
 729                                 goto unknown;
 730                         }
 731                         break;
 732                 default:
 733                         debug("unknown value %x\n", le16_to_cpu(req->value));
 734                         goto unknown;
 735                 }
 736                 break;
 737         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 738                 switch (le16_to_cpu(req->value) >> 8) {
 739                 case USB_DT_HUB:
 740                         debug("USB_DT_HUB config\n");
 741                         srcptr = &descriptor.hub;
 742                         srclen = descriptor.hub.bLength;
 743                         break;
 744                 default:
 745                         debug("unknown value %x\n", le16_to_cpu(req->value));
 746                         goto unknown;
 747                 }
 748                 break;
 749         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 750                 debug("USB_REQ_SET_ADDRESS\n");
 751                 ctrl->rootdev = le16_to_cpu(req->value);
 752                 break;
 753         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 754                 debug("USB_REQ_SET_CONFIGURATION\n");
 755                 /* Nothing to do */
 756                 break;
 757         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 758                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 759                 tmpbuf[1] = 0;
 760                 srcptr = tmpbuf;
 761                 srclen = 2;
 762                 break;
 763         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 764                 memset(tmpbuf, 0, 4);
 765                 reg = ehci_readl(status_reg);
 766                 if (reg & EHCI_PS_CS)
 767                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 768                 if (reg & EHCI_PS_PE)
 769                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 770                 if (reg & EHCI_PS_SUSP)
 771                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 772                 if (reg & EHCI_PS_OCA)
 773                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 774                 if (reg & EHCI_PS_PR)
 775                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 776                 if (reg & EHCI_PS_PP)
 777                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 778
 779                 if (ehci_is_TDI()) {
 780                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 781                         case PORTSC_PSPD_FS:
 782                                 break;
 783                         case PORTSC_PSPD_LS:
 784                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 785                                 break;
 786                         case PORTSC_PSPD_HS:
 787                         default:
 788                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 789                                 break;
 790                         }
 791                 } else {
 792                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 793                 }
 794
 795                 if (reg & EHCI_PS_CSC)
 796                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 797                 if (reg & EHCI_PS_PEC)
 798                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 799                 if (reg & EHCI_PS_OCC)
 800                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 801                 if (ctrl->portreset & (1 << port))
 802                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 803
 804                 srcptr = tmpbuf;
 805                 srclen = 4;
 806                 break;
 807         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 808                 reg = ehci_readl(status_reg);
 809                 reg &= ~EHCI_PS_CLEAR;
 810                 switch (le16_to_cpu(req->value)) {
 811                 case USB_PORT_FEAT_ENABLE:
 812                         reg |= EHCI_PS_PE;
 813                         ehci_writel(status_reg, reg);
 814                         break;
 815                 case USB_PORT_FEAT_POWER:
 816                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 817                                 reg |= EHCI_PS_PP;
 818                                 ehci_writel(status_reg, reg);
 819                         }
 820                         break;
 821                 case USB_PORT_FEAT_RESET:
 822                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 823                             !ehci_is_TDI() &&
 824                             EHCI_PS_IS_LOWSPEED(reg)) {
 825                                 /* Low speed device, give up ownership. */
 826                                 debug("port %d low speed --> companion\n",
 827                                       port - 1);
 828                                 reg |= EHCI_PS_PO;
 829                                 ehci_writel(status_reg, reg);
 830                                 return -ENXIO;
 831                         } else {
 832                                 int ret;
 833
 834                                 /* Disable chirp for HS erratum */
 835                                 if (ctrl->has_fsl_erratum_a005275)
 836                                         reg |= PORTSC_FSL_PFSC;
 837
 838                                 reg |= EHCI_PS_PR;
 839                                 reg &= ~EHCI_PS_PE;
 840                                 ehci_writel(status_reg, reg);
 841                                 /*
 842                                  * caller must wait, then call GetPortStatus
 843                                  * usb 2.0 specification say 50 ms resets on
 844                                  * root
 845                                  */
 846                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 847
 848                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 849                                 /*
 850                                  * A host controller must terminate the reset
 851                                  * and stabilize the state of the port within
 852                                  * 2 milliseconds
 853                                  */
 854                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 855                                                 2 * 1000);
 856                                 if (!ret) {
 857                                         reg = ehci_readl(status_reg);
 858                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 859                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 860                                                 debug("port %d full speed --> companion\n", port - 1);
 861                                                 reg &= ~EHCI_PS_CLEAR;
 862                                                 reg |= EHCI_PS_PO;
 863                                                 ehci_writel(status_reg, reg);
 864                                                 return -ENXIO;
 865                                         } else {
 866                                                 ctrl->portreset |= 1 << port;
 867                                         }
 868                                 } else {
 869                                         printf("port(%d) reset error\n",
 870                                                port - 1);
 871                                 }
 872                         }
 873                         break;
 874                 case USB_PORT_FEAT_TEST:
 875                         ehci_shutdown(ctrl);
 876                         reg &= ~(0xf << 16);
 877                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 878                         ehci_writel(status_reg, reg);
 879                         break;
 880                 default:
 881                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 882                         goto unknown;
 883                 }
 884                 /* unblock posted writes */
 885                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 886                 break;
 887         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 888                 reg = ehci_readl(status_reg);
 889                 reg &= ~EHCI_PS_CLEAR;
 890                 switch (le16_to_cpu(req->value)) {
 891                 case USB_PORT_FEAT_ENABLE:
 892                         reg &= ~EHCI_PS_PE;
 893                         break;
 894                 case USB_PORT_FEAT_C_ENABLE:
 895                         reg |= EHCI_PS_PE;
 896                         break;
 897                 case USB_PORT_FEAT_POWER:
 898                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 899                                 reg &= ~EHCI_PS_PP;
 900                         break;
 901                 case USB_PORT_FEAT_C_CONNECTION:
 902                         reg |= EHCI_PS_CSC;
 903                         break;
 904                 case USB_PORT_FEAT_OVER_CURRENT:
 905                         reg |= EHCI_PS_OCC;
 906                         break;
 907                 case USB_PORT_FEAT_C_RESET:
 908                         ctrl->portreset &= ~(1 << port);
 909                         break;
 910                 default:
 911                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 912                         goto unknown;
 913                 }
 914                 ehci_writel(status_reg, reg);
 915                 /* unblock posted write */
 916                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 917                 break;
 918         default:
 919                 debug("Unknown request\n");
 920                 goto unknown;
 921         }
 922
 923         mdelay(1);
 924         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 925         if (srcptr != NULL && len > 0)
 926                 memcpy(buffer, srcptr, len);
 927         else
 928                 debug("Len is 0\n");
 929
 930         dev->act_len = len;
 931         dev->status = 0;
 932         return 0;
 933
 934 unknown:
 935         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 936               req->requesttype, req->request, le16_to_cpu(req->value),
 937               le16_to_cpu(req->index), le16_to_cpu(req->length));
 938
 939         dev->act_len = 0;
 940         dev->status = USB_ST_STALLED;
 941         return -1;
 942 }
 943
 944 static const struct ehci_ops default_ehci_ops = {
 945         .set_usb_mode           = ehci_set_usbmode,
 946         .get_port_speed         = ehci_get_port_speed,
 947         .powerup_fixup          = ehci_powerup_fixup,
 948         .get_portsc_register    = ehci_get_portsc_register,
 949 };
 950
 951 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 952 {
 953         if (!ops) {
 954                 ctrl->ops = default_ehci_ops;
 955         } else {
 956                 ctrl->ops = *ops;
 957                 if (!ctrl->ops.set_usb_mode)
 958                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 959                 if (!ctrl->ops.get_port_speed)
 960                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 961                 if (!ctrl->ops.powerup_fixup)
 962                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
 963                 if (!ctrl->ops.get_portsc_register)
 964                         ctrl->ops.get_portsc_register =
 965                                         ehci_get_portsc_register;
 966         }
 967 }
 968
 969 #if !CONFIG_IS_ENABLED(DM_USB)
 970 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
 971 {
 972         struct ehci_ctrl *ctrl = &ehcic[index];
 973
 974         ctrl->priv = priv;
 975         ehci_setup_ops(ctrl, ops);
 976 }
 977
 978 void *ehci_get_controller_priv(int index)
 979 {
 980         return ehcic[index].priv;
 981 }
 982 #endif
 983
 984 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 985 {
 986         struct QH *qh_list;
 987         struct QH *periodic;
 988         uint32_t reg;
 989         uint32_t cmd;
 990         int i;
 991
 992         /* Set the high address word (aka segment) for 64-bit controller */
 993         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
 994                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
 995
 996         qh_list = &ctrl->qh_list;
 997
 998         /* Set head of reclaim list */
 999         memset(qh_list, 0, sizeof(*qh_list));
1000         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1001         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1002                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1003         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1004         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1005         qh_list->qh_overlay.qt_token =
1006                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1007
1008         flush_dcache_range((unsigned long)qh_list,
1009                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1010
1011         /* Set async. queue head pointer. */
1012         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1013
1014         /*
1015          * Set up periodic list
1016          * Step 1: Parent QH for all periodic transfers.
1017          */
1018         ctrl->periodic_schedules = 0;
1019         periodic = &ctrl->periodic_queue;
1020         memset(periodic, 0, sizeof(*periodic));
1021         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1022         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1023         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1024
1025         flush_dcache_range((unsigned long)periodic,
1026                            ALIGN_END_ADDR(struct QH, periodic, 1));
1027
1028         /*
1029          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1030          *         In particular, device specifications on polling frequency
1031          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1032          *         when polled with an empty buffer.
1033          *
1034          *         Split Transactions will be spread across microframes using
1035          *         S-mask and C-mask.
1036          */
1037         if (ctrl->periodic_list == NULL)
1038                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1039
1040         if (!ctrl->periodic_list)
1041                 return -ENOMEM;
1042         for (i = 0; i < 1024; i++) {
1043                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1044                                                 | QH_LINK_TYPE_QH);
1045         }
1046
1047         flush_dcache_range((unsigned long)ctrl->periodic_list,
1048                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1049                                           1024));
1050
1051         /* Set periodic list base address */
1052         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1053                 (unsigned long)ctrl->periodic_list);
1054
1055         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1056         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1057         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1058         /* Port Indicators */
1059         if (HCS_INDICATOR(reg))
1060                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1061                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1062         /* Port Power Control */
1063         if (HCS_PPC(reg))
1064                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1065                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1066
1067         /* Start the host controller. */
1068         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1069         /*
1070          * Philips, Intel, and maybe others need CMD_RUN before the
1071          * root hub will detect new devices (why?); NEC doesn't
1072          */
1073         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1074         cmd |= CMD_RUN;
1075         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1076
1077         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1078                 /* take control over the ports */
1079                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1080                 cmd |= FLAG_CF;
1081                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1082         }
1083
1084         /* unblock posted write */
1085         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1086         mdelay(5);
1087         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1088         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1089
1090         return 0;
1091 }
1092
1093 #if !CONFIG_IS_ENABLED(DM_USB)
1094 int usb_lowlevel_stop(int index)
1095 {
1096         ehci_shutdown(&ehcic[index]);
1097         return ehci_hcd_stop(index);
1098 }
1099
1100 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1101 {
1102         struct ehci_ctrl *ctrl = &ehcic[index];
1103         uint tweaks = 0;
1104         int rc;
1105
1106         /**
1107          * Set ops to default_ehci_ops, ehci_hcd_init should call
1108          * ehci_set_controller_priv to change any of these function pointers.
1109          */
1110         ctrl->ops = default_ehci_ops;
1111
1112         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1113         if (rc)
1114                 return rc;
1115         if (!ctrl->hccr || !ctrl->hcor)
1116                 return -1;
1117         if (init == USB_INIT_DEVICE)
1118                 goto done;
1119
1120         /* EHCI spec section 4.1 */
1121         if (ehci_reset(ctrl))
1122                 return -1;
1123
1124 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1125         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1126         if (rc)
1127                 return rc;
1128 #endif
1129 #ifdef CONFIG_USB_EHCI_FARADAY
1130         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1131 #endif
1132         rc = ehci_common_init(ctrl, tweaks);
1133         if (rc)
1134                 return rc;
1135
1136         ctrl->rootdev = 0;
1137 done:
1138         *controller = &ehcic[index];
1139         return 0;
1140 }
1141 #endif
1142
1143 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1144                                  void *buffer, int length)
1145 {
1146
1147         if (usb_pipetype(pipe) != PIPE_BULK) {
1148                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1149                 return -1;
1150         }
1151         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1152 }
1153
1154 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1155                                     void *buffer, int length,
1156                                     struct devrequest *setup)
1157 {
1158         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1159
1160         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1161                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1162                 return -1;
1163         }
1164
1165         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1166                 if (!ctrl->rootdev)
1167                         dev->speed = USB_SPEED_HIGH;
1168                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1169         }
1170         return ehci_submit_async(dev, pipe, buffer, length, setup);
1171 }
1172
1173 struct int_queue {
1174         int elementsize;
1175         unsigned long pipe;
1176         struct QH *first;
1177         struct QH *current;
1178         struct QH *last;
1179         struct qTD *tds;
1180 };
1181
1182 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1183
1184 static int
1185 enable_periodic(struct ehci_ctrl *ctrl)
1186 {
1187         uint32_t cmd;
1188         struct ehci_hcor *hcor = ctrl->hcor;
1189         int ret;
1190
1191         cmd = ehci_readl(&hcor->or_usbcmd);
1192         cmd |= CMD_PSE;
1193         ehci_writel(&hcor->or_usbcmd, cmd);
1194
1195         ret = handshake((uint32_t *)&hcor->or_usbsts,
1196                         STS_PSS, STS_PSS, 100 * 1000);
1197         if (ret < 0) {
1198                 printf("EHCI failed: timeout when enabling periodic list\n");
1199                 return -ETIMEDOUT;
1200         }
1201         udelay(1000);
1202         return 0;
1203 }
1204
1205 static int
1206 disable_periodic(struct ehci_ctrl *ctrl)
1207 {
1208         uint32_t cmd;
1209         struct ehci_hcor *hcor = ctrl->hcor;
1210         int ret;
1211
1212         cmd = ehci_readl(&hcor->or_usbcmd);
1213         cmd &= ~CMD_PSE;
1214         ehci_writel(&hcor->or_usbcmd, cmd);
1215
1216         ret = handshake((uint32_t *)&hcor->or_usbsts,
1217                         STS_PSS, 0, 100 * 1000);
1218         if (ret < 0) {
1219                 printf("EHCI failed: timeout when disabling periodic list\n");
1220                 return -ETIMEDOUT;
1221         }
1222         return 0;
1223 }
1224
1225 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1226                         unsigned long pipe, int queuesize, int elementsize,
1227                         void *buffer, int interval)
1228 {
1229         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1230         struct int_queue *result = NULL;
1231         uint32_t i, toggle;
1232
1233         /*
1234          * Interrupt transfers requiring several transactions are not supported
1235          * because bInterval is ignored.
1236          *
1237          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1238          * <= PKT_ALIGN if several qTDs are required, while the USB
1239          * specification does not constrain this for interrupt transfers. That
1240          * means that ehci_submit_async() would support interrupt transfers
1241          * requiring several transactions only as long as the transfer size does
1242          * not require more than a single qTD.
1243          */
1244         if (elementsize > usb_maxpacket(dev, pipe)) {
1245                 printf("%s: xfers requiring several transactions are not supported.\n",
1246                        __func__);
1247                 return NULL;
1248         }
1249
1250         debug("Enter create_int_queue\n");
1251         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1252                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1253                 return NULL;
1254         }
1255
1256         /* limit to 4 full pages worth of data -
1257          * we can safely fit them in a single TD,
1258          * no matter the alignment
1259          */
1260         if (elementsize >= 16384) {
1261                 debug("too large elements for interrupt transfers\n");
1262                 return NULL;
1263         }
1264
1265         result = malloc(sizeof(*result));
1266         if (!result) {
1267                 debug("ehci intr queue: out of memory\n");
1268                 goto fail1;
1269         }
1270         result->elementsize = elementsize;
1271         result->pipe = pipe;
1272         result->first = memalign(USB_DMA_MINALIGN,
1273                                  sizeof(struct QH) * queuesize);
1274         if (!result->first) {
1275                 debug("ehci intr queue: out of memory\n");
1276                 goto fail2;
1277         }
1278         result->current = result->first;
1279         result->last = result->first + queuesize - 1;
1280         result->tds = memalign(USB_DMA_MINALIGN,
1281                                sizeof(struct qTD) * queuesize);
1282         if (!result->tds) {
1283                 debug("ehci intr queue: out of memory\n");
1284                 goto fail3;
1285         }
1286         memset(result->first, 0, sizeof(struct QH) * queuesize);
1287         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1288
1289         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1290
1291         for (i = 0; i < queuesize; i++) {
1292                 struct QH *qh = result->first + i;
1293                 struct qTD *td = result->tds + i;
1294                 void **buf = &qh->buffer;
1295
1296                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1297                 if (i == queuesize - 1)
1298                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1299
1300                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1301                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1302                 qh->qh_endpt1 =
1303                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1304                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1305                         (1 << 14) |
1306                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1307                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1308                         (usb_pipedevice(pipe) << 0));
1309                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1310                         (1 << 0)); /* S-mask: microframe 0 */
1311                 if (dev->speed == USB_SPEED_LOW ||
1312                                 dev->speed == USB_SPEED_FULL) {
1313                         /* C-mask: microframes 2-4 */
1314                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1315                 }
1316                 ehci_update_endpt2_dev_n_port(dev, qh);
1317
1318                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1319                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1320                 debug("communication direction is '%s'\n",
1321                       usb_pipein(pipe) ? "in" : "out");
1322                 td->qt_token = cpu_to_hc32(
1323                         QT_TOKEN_DT(toggle) |
1324                         (elementsize << 16) |
1325                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1326                         0x80); /* active */
1327                 td->qt_buffer[0] =
1328                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1329                 td->qt_buffer[1] =
1330                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1331                 td->qt_buffer[2] =
1332                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1333                 td->qt_buffer[3] =
1334                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1335                 td->qt_buffer[4] =
1336                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1337
1338                 *buf = buffer + i * elementsize;
1339                 toggle ^= 1;
1340         }
1341
1342         flush_dcache_range((unsigned long)buffer,
1343                            ALIGN_END_ADDR(char, buffer,
1344                                           queuesize * elementsize));
1345         flush_dcache_range((unsigned long)result->first,
1346                            ALIGN_END_ADDR(struct QH, result->first,
1347                                           queuesize));
1348         flush_dcache_range((unsigned long)result->tds,
1349                            ALIGN_END_ADDR(struct qTD, result->tds,
1350                                           queuesize));
1351
1352         if (ctrl->periodic_schedules > 0) {
1353                 if (disable_periodic(ctrl) < 0) {
1354                         debug("FATAL: periodic should never fail, but did");
1355                         goto fail3;
1356                 }
1357         }
1358
1359         /* hook up to periodic list */
1360         struct QH *list = &ctrl->periodic_queue;
1361         result->last->qh_link = list->qh_link;
1362         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1363
1364         flush_dcache_range((unsigned long)result->last,
1365                            ALIGN_END_ADDR(struct QH, result->last, 1));
1366         flush_dcache_range((unsigned long)list,
1367                            ALIGN_END_ADDR(struct QH, list, 1));
1368
1369         if (enable_periodic(ctrl) < 0) {
1370                 debug("FATAL: periodic should never fail, but did");
1371                 goto fail3;
1372         }
1373         ctrl->periodic_schedules++;
1374
1375         debug("Exit create_int_queue\n");
1376         return result;
1377 fail3:
1378         if (result->tds)
1379                 free(result->tds);
1380 fail2:
1381         if (result->first)
1382                 free(result->first);
1383         if (result)
1384                 free(result);
1385 fail1:
1386         return NULL;
1387 }
1388
1389 static void *_ehci_poll_int_queue(struct usb_device *dev,
1390                                   struct int_queue *queue)
1391 {
1392         struct QH *cur = queue->current;
1393         struct qTD *cur_td;
1394         uint32_t token, toggle;
1395         unsigned long pipe = queue->pipe;
1396
1397         /* depleted queue */
1398         if (cur == NULL) {
1399                 debug("Exit poll_int_queue with completed queue\n");
1400                 return NULL;
1401         }
1402         /* still active */
1403         cur_td = &queue->tds[queue->current - queue->first];
1404         invalidate_dcache_range((unsigned long)cur_td,
1405                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1406         token = hc32_to_cpu(cur_td->qt_token);
1407         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1408                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1409                 return NULL;
1410         }
1411
1412         toggle = QT_TOKEN_GET_DT(token);
1413         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1414
1415         if (!(cur->qh_link & QH_LINK_TERMINATE))
1416                 queue->current++;
1417         else
1418                 queue->current = NULL;
1419
1420         invalidate_dcache_range((unsigned long)cur->buffer,
1421                                 ALIGN_END_ADDR(char, cur->buffer,
1422                                                queue->elementsize));
1423
1424         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1425               token, cur, queue->first);
1426         return cur->buffer;
1427 }
1428
1429 /* Do not free buffers associated with QHs, they're owned by someone else */
1430 static int _ehci_destroy_int_queue(struct usb_device *dev,
1431                                    struct int_queue *queue)
1432 {
1433         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1434         int result = -1;
1435         unsigned long timeout;
1436
1437         if (disable_periodic(ctrl) < 0) {
1438                 debug("FATAL: periodic should never fail, but did");
1439                 goto out;
1440         }
1441         ctrl->periodic_schedules--;
1442
1443         struct QH *cur = &ctrl->periodic_queue;
1444         timeout = get_timer(0) + 500; /* abort after 500ms */
1445         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1446                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1447                 if (NEXT_QH(cur) == queue->first) {
1448                         debug("found candidate. removing from chain\n");
1449                         cur->qh_link = queue->last->qh_link;
1450                         flush_dcache_range((unsigned long)cur,
1451                                            ALIGN_END_ADDR(struct QH, cur, 1));
1452                         result = 0;
1453                         break;
1454                 }
1455                 cur = NEXT_QH(cur);
1456                 if (get_timer(0) > timeout) {
1457                         printf("Timeout destroying interrupt endpoint queue\n");
1458                         result = -1;
1459                         goto out;
1460                 }
1461         }
1462
1463         if (ctrl->periodic_schedules > 0) {
1464                 result = enable_periodic(ctrl);
1465                 if (result < 0)
1466                         debug("FATAL: periodic should never fail, but did");
1467         }
1468
1469 out:
1470         free(queue->tds);
1471         free(queue->first);
1472         free(queue);
1473
1474         return result;
1475 }
1476
1477 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1478                                 void *buffer, int length, int interval,
1479                                 bool nonblock)
1480 {
1481         void *backbuffer;
1482         struct int_queue *queue;
1483         unsigned long timeout;
1484         int result = 0, ret;
1485
1486         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1487               dev, pipe, buffer, length, interval);
1488
1489         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1490         if (!queue)
1491                 return -1;
1492
1493         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1494         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1495                 if (get_timer(0) > timeout) {
1496                         printf("Timeout poll on interrupt endpoint\n");
1497                         result = -ETIMEDOUT;
1498                         break;
1499                 }
1500
1501         if (backbuffer != buffer) {
1502                 debug("got wrong buffer back (%p instead of %p)\n",
1503                       backbuffer, buffer);
1504                 return -EINVAL;
1505         }
1506
1507         ret = _ehci_destroy_int_queue(dev, queue);
1508         if (ret < 0)
1509                 return ret;
1510
1511         /* everything worked out fine */
1512         return result;
1513 }
1514
1515 #if !CONFIG_IS_ENABLED(DM_USB)
1516 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1517                             void *buffer, int length)
1518 {
1519         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1520 }
1521
1522 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1523                    int length, struct devrequest *setup)
1524 {
1525         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1526 }
1527
1528 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1529                    void *buffer, int length, int interval, bool nonblock)
1530 {
1531         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1532                                     nonblock);
1533 }
1534
1535 struct int_queue *create_int_queue(struct usb_device *dev,
1536                 unsigned long pipe, int queuesize, int elementsize,
1537                 void *buffer, int interval)
1538 {
1539         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1540                                       buffer, interval);
1541 }
1542
1543 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1544 {
1545         return _ehci_poll_int_queue(dev, queue);
1546 }
1547
1548 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1549 {
1550         return _ehci_destroy_int_queue(dev, queue);
1551 }
1552 #endif
1553
1554 #if CONFIG_IS_ENABLED(DM_USB)
1555 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1556                                    unsigned long pipe, void *buffer, int length,
1557                                    struct devrequest *setup)
1558 {
1559         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1560               dev->name, udev, udev->dev->name, udev->portnr);
1561
1562         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1563 }
1564
1565 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1566                                 unsigned long pipe, void *buffer, int length)
1567 {
1568         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1569         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1570 }
1571
1572 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1573                                unsigned long pipe, void *buffer, int length,
1574                                int interval, bool nonblock)
1575 {
1576         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1577         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1578                                     nonblock);
1579 }
1580
1581 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1582                 struct usb_device *udev, unsigned long pipe, int queuesize,
1583                 int elementsize, void *buffer, int interval)
1584 {
1585         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1586         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1587                                       buffer, interval);
1588 }
1589
1590 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1591                                  struct int_queue *queue)
1592 {
1593         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1594         return _ehci_poll_int_queue(udev, queue);
1595 }
1596
1597 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1598                                   struct int_queue *queue)
1599 {
1600         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1601         return _ehci_destroy_int_queue(udev, queue);
1602 }
1603
1604 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1605 {
1606         /*
1607          * EHCD can handle any transfer length as long as there is enough
1608          * free heap space left, hence set the theoretical max number here.
1609          */
1610         *size = SIZE_MAX;
1611
1612         return 0;
1613 }
1614
1615 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1616                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1617                   uint tweaks, enum usb_init_type init)
1618 {
1619         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1620         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1621         int ret = -1;
1622
1623         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1624               dev->name, ctrl, hccr, hcor, init);
1625
1626         if (!ctrl || !hccr || !hcor)
1627                 goto err;
1628
1629         priv->desc_before_addr = true;
1630
1631         ehci_setup_ops(ctrl, ops);
1632         ctrl->hccr = hccr;
1633         ctrl->hcor = hcor;
1634         ctrl->priv = ctrl;
1635
1636         ctrl->init = init;
1637         if (ctrl->init == USB_INIT_DEVICE)
1638                 goto done;
1639
1640         ret = ehci_reset(ctrl);
1641         if (ret)
1642                 goto err;
1643
1644         if (ctrl->ops.init_after_reset) {
1645                 ret = ctrl->ops.init_after_reset(ctrl);
1646                 if (ret)
1647                         goto err;
1648         }
1649
1650         ret = ehci_common_init(ctrl, tweaks);
1651         if (ret)
1652                 goto err;
1653 done:
1654         return 0;
1655 err:
1656         free(ctrl);
1657         debug("%s: failed, ret=%d\n", __func__, ret);
1658         return ret;
1659 }
1660
1661 int ehci_deregister(struct udevice *dev)
1662 {
1663         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1664
1665         if (ctrl->init == USB_INIT_DEVICE)
1666                 return 0;
1667
1668         ehci_shutdown(ctrl);
1669
1670         return 0;
1671 }
1672
1673 struct dm_usb_ops ehci_usb_ops = {
1674         .control = ehci_submit_control_msg,
1675         .bulk = ehci_submit_bulk_msg,
1676         .interrupt = ehci_submit_int_msg,
1677         .create_int_queue = ehci_create_int_queue,
1678         .poll_int_queue = ehci_poll_int_queue,
1679         .destroy_int_queue = ehci_destroy_int_queue,
1680         .get_max_xfer_size  = ehci_get_max_xfer_size,
1681 };
1682
1683 #endif
1684
1685 #ifdef CONFIG_PHY
1686 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1687 {
1688         int ret;
1689
1690         if (!phy)
1691                 return 0;
1692
1693         ret = generic_phy_get_by_index(dev, index, phy);
1694         if (ret) {
1695                 if (ret != -ENOENT) {
1696                         dev_err(dev, "failed to get usb phy\n");
1697                         return ret;
1698                 }
1699         } else {
1700                 ret = generic_phy_init(phy);
1701                 if (ret) {
1702                         dev_err(dev, "failed to init usb phy\n");
1703                         return ret;
1704                 }
1705
1706                 ret = generic_phy_power_on(phy);
1707                 if (ret) {
1708                         dev_err(dev, "failed to power on usb phy\n");
1709                         return generic_phy_exit(phy);
1710                 }
1711         }
1712
1713         return 0;
1714 }
1715
1716 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1717 {
1718         int ret = 0;
1719
1720         if (!phy)
1721                 return 0;
1722
1723         if (generic_phy_valid(phy)) {
1724                 ret = generic_phy_power_off(phy);
1725                 if (ret) {
1726                         dev_err(dev, "failed to power off usb phy\n");
1727                         return ret;
1728                 }
1729
1730                 ret = generic_phy_exit(phy);
1731                 if (ret) {
1732                         dev_err(dev, "failed to power off usb phy\n");
1733                         return ret;
1734                 }
1735         }
1736
1737         return 0;
1738 }
1739 #else
1740 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1741 {
1742         return 0;
1743 }
1744
1745 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1746 {
1747         return 0;
1748 }
1749 #endif