2 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
4 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
6 * Author: Tor Krill tor@excito.com
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <usb/ehci-fsl.h>
34 * Create the appropriate control structures to manage
35 * a new EHCI host controller.
37 * Excerpts from linux ehci fsl driver.
39 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
41 struct usb_ehci *ehci;
42 const char *phy_type = NULL;
44 #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
50 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
51 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
52 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
53 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
55 /* Set to Host mode */
56 setbits_le32(&ehci->usbmode, CM_HOST);
58 out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
59 out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
62 if (hwconfig_sub("usb1", "phy_type"))
63 phy_type = hwconfig_subarg("usb1", "phy_type", &len);
65 phy_type = getenv("usb_phy_type");
68 #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
69 /* if none specified assume internal UTMI */
70 strcpy(usb_phy, "utmi");
73 printf("WARNING: USB phy type not defined !!\n");
78 if (!strcmp(phy_type, "utmi")) {
79 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
80 setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
81 setbits_be32(&ehci->control, UTMI_PHY_EN);
82 udelay(1000); /* delay required for PHY Clk to appear */
84 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
86 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
87 clrbits_be32(&ehci->control, UTMI_PHY_EN);
88 setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
89 udelay(1000); /* delay required for PHY Clk to appear */
91 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
94 /* Enable interface. */
95 setbits_be32(&ehci->control, USB_EN);
97 out_be32(&ehci->prictrl, 0x0000000c);
98 out_be32(&ehci->age_cnt_limit, 0x00000040);
99 out_be32(&ehci->sictrl, 0x00000001);
101 in_le32(&ehci->usbmode);
107 * Destroy the appropriate control structures corresponding
108 * the the EHCI host controller.
110 int ehci_hcd_stop(int index)