1 // SPDX-License-Identifier: GPL-2.0
3 * Cr50 / H1 TPM support
5 * Copyright 2018 Google LLC
8 #define LOG_CATEGORY UCLASS_TPM
18 #include <asm/arch/iomap.h>
19 #include <asm/arch/pm.h>
22 TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
23 TIMEOUT_LONG_US = 2 * 1000 * 1000,
24 TIMEOUT_SHORT_US = 2 * 1000,
25 TIMEOUT_NO_IRQ_US = 20 * 1000,
26 TIMEOUT_IRQ_US = 100 * 1000,
30 CR50_DID_VID = 0x00281ae0L
34 CR50_MAX_BUF_SIZE = 63,
38 struct gpio_desc ready_gpio;
45 /* Wait for interrupt to indicate TPM is ready */
46 static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
48 struct cr50_priv *priv = dev_get_priv(dev);
52 if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
53 /* Fixed delay if interrupt not supported */
54 udelay(TIMEOUT_NO_IRQ_US);
58 base = timer_get_us();
59 timeout = base + TIMEOUT_IRQ_US;
62 while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
63 !dm_gpio_get_value(&priv->ready_gpio)) {
65 if ((int)(timer_get_us() - timeout) >= 0) {
66 log_warning("Timeout\n");
67 /* Use this instead of the -ETIMEDOUT used by i2c */
71 log_debug("i=%d\n", i);
76 /* Clear pending interrupts */
77 static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
79 struct cr50_priv *priv = dev_get_priv(dev);
82 irq_read_and_clear(&priv->irq);
86 * cr50_i2c_read() - read from TPM register
88 * @dev: TPM chip information
89 * @addr: register address to read from
90 * @buffer: provided by caller
91 * @len: number of bytes to read
93 * 1) send register address byte 'addr' to the TPM
94 * 2) wait for TPM to indicate it is ready
95 * 3) read 'len' bytes of TPM response into the provided 'buffer'
97 * Return 0 on success. -ve on error
99 static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
104 /* Clear interrupt before starting transaction */
105 cr50_i2c_clear_tpm_irq(dev);
107 /* Send the register address byte to the TPM */
108 ret = dm_i2c_write(dev, 0, &addr, 1);
110 log_err("Address write failed (err=%d)\n", ret);
114 /* Wait for TPM to be ready with response data */
115 ret = cr50_i2c_wait_tpm_ready(dev);
119 /* Read response data frrom the TPM */
120 ret = dm_i2c_read(dev, 0, buffer, len);
122 log_err("Read response failed (err=%d)\n", ret);
130 * cr50_i2c_write() - write to TPM register
132 * @dev: TPM chip information
133 * @addr: register address to write to
134 * @buffer: data to write
135 * @len: number of bytes to write
137 * 1) prepend the provided address to the provided data
138 * 2) send the address+data to the TPM
139 * 3) wait for TPM to indicate it is done writing
141 * Returns -1 on error, 0 on success.
143 static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
149 if (len > CR50_MAX_BUF_SIZE) {
150 log_err("Length %zd is too large\n", len);
154 /* Prepend the 'register address' to the buffer */
156 memcpy(buf + 1, buffer, len);
158 /* Clear interrupt before starting transaction */
159 cr50_i2c_clear_tpm_irq(dev);
161 /* Send write request buffer with address */
162 ret = dm_i2c_write(dev, 0, buf, len + 1);
164 log_err("Error writing to TPM (err=%d)\n", ret);
168 /* Wait for TPM to be ready */
169 return cr50_i2c_wait_tpm_ready(dev);
172 static inline u8 tpm_access(u8 locality)
174 return 0x0 | (locality << 4);
177 static inline u8 tpm_sts(u8 locality)
179 return 0x1 | (locality << 4);
182 static inline u8 tpm_data_fifo(u8 locality)
184 return 0x5 | (locality << 4);
187 static inline u8 tpm_did_vid(u8 locality)
189 return 0x6 | (locality << 4);
192 static int release_locality(struct udevice *dev, int force)
194 struct cr50_priv *priv = dev_get_priv(dev);
195 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
196 u8 addr = tpm_access(priv->locality);
200 ret = cr50_i2c_read(dev, addr, &buf, 1);
204 if (force || (buf & mask) == mask) {
205 buf = TPM_ACCESS_ACTIVE_LOCALITY;
206 cr50_i2c_write(dev, addr, &buf, 1);
214 /* cr50 requires all 4 bytes of status register to be read */
215 static int cr50_i2c_status(struct udevice *dev)
217 struct cr50_priv *priv = dev_get_priv(dev);
221 ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
223 log_warning("%s: Failed to read status\n", __func__);
230 /* cr50 requires all 4 bytes of status register to be written */
231 static int cr50_i2c_ready(struct udevice *dev)
233 struct cr50_priv *priv = dev_get_priv(dev);
234 u8 buf[4] = { TPM_STS_COMMAND_READY };
237 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
241 udelay(TIMEOUT_SHORT_US);
246 static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
247 size_t *burst, int *status)
249 struct cr50_priv *priv = dev_get_priv(dev);
254 * cr50 uses bytes 3:2 of status register for burst count and all 4
257 timeout = timer_get_us() + TIMEOUT_LONG_US;
258 while (timer_get_us() < timeout) {
259 if (cr50_i2c_read(dev, tpm_sts(priv->locality),
260 (u8 *)&buf, sizeof(buf)) < 0) {
261 udelay(TIMEOUT_SHORT_US);
265 *status = buf & 0xff;
266 *burst = le16_to_cpu((buf >> 8) & 0xffff);
268 if ((*status & mask) == mask &&
269 *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
272 udelay(TIMEOUT_SHORT_US);
275 log_warning("Timeout reading burst and status\n");
280 static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
282 struct cr50_priv *priv = dev_get_priv(dev);
283 size_t burstcnt, expected, current, len;
284 u8 addr = tpm_data_fifo(priv->locality);
285 u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
290 log_debug("%s: len=%x\n", __func__, buf_len);
291 if (buf_len < TPM_HEADER_SIZE)
294 ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
296 log_warning("First chunk not available\n");
300 /* Read first chunk of burstcnt bytes */
301 if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
302 log_warning("Read failed\n");
306 /* Determine expected data in the return buffer */
307 memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
308 expected = be32_to_cpu(expected_buf);
309 if (expected > buf_len) {
310 log_warning("Too much data: %zu > %zu\n", expected, buf_len);
314 /* Now read the rest of the data */
316 while (current < expected) {
317 /* Read updated burst count and check status */
318 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
319 log_warning("- burst failure1\n");
323 len = min(burstcnt, expected - current);
324 if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
325 log_warning("Read failed\n");
332 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
334 log_warning("- burst failure2\n");
337 if (status & TPM_STS_DATA_AVAIL) {
338 log_warning("Data still available\n");
345 /* Abort current transaction if still pending */
346 ret = cr50_i2c_status(dev);
349 if (ret & TPM_STS_COMMAND_READY) {
350 ret = cr50_i2c_ready(dev);
358 static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
360 struct cr50_priv *priv = dev_get_priv(dev);
363 size_t burstcnt, limit, sent = 0;
364 u8 tpm_go[4] = { TPM_STS_GO };
368 log_debug("%s: len=%x\n", __func__, len);
369 timeout = timer_get_us() + TIMEOUT_LONG_US;
371 ret = cr50_i2c_status(dev);
374 if (ret & TPM_STS_COMMAND_READY)
377 if (timer_get_us() > timeout)
380 ret = cr50_i2c_ready(dev);
386 u8 mask = TPM_STS_VALID;
388 /* Wait for data if this is not the first chunk */
390 mask |= TPM_STS_DATA_EXPECT;
392 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
396 * Use burstcnt - 1 to account for the address byte
397 * that is inserted by cr50_i2c_write()
399 limit = min(burstcnt - 1, len);
400 if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
401 &buf[sent], limit) != 0) {
402 log_warning("Write failed\n");
410 /* Ensure TPM is not expecting more data */
411 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
413 if (status & TPM_STS_DATA_EXPECT) {
414 log_warning("Data still expected\n");
418 /* Start the TPM command */
419 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
422 log_warning("Start command failed\n");
429 /* Abort current transaction if still pending */
430 ret = cr50_i2c_status(dev);
432 if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
433 ret = cr50_i2c_ready(dev);
442 * process_reset() - Wait for the Cr50 to reset
444 * Cr50 processes reset requests asynchronously and conceivably could be busy
445 * executing a long command and not reacting to the reset pulse for a while.
447 * This function will make sure that the AP does not proceed with boot until
448 * TPM finished reset processing.
451 * @return 0 if OK, -EPERM if locality could not be taken
453 static int process_reset(struct udevice *dev)
460 * Locality is released by TPM reset.
462 * If locality is taken at this point, this could be due to the fact
463 * that the TPM is performing a long operation and has not processed
464 * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
465 * it releases locality when reset is processed.
467 start = get_timer(0);
469 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
472 ret = cr50_i2c_read(dev, tpm_access(loc),
473 &access, sizeof(access));
474 if (ret || ((access & mask) == mask)) {
476 * Don't bombard the chip with traffic; let it keep
477 * processing the command.
483 log_warning("TPM ready after %ld ms\n", get_timer(start));
486 } while (get_timer(start) < TIMEOUT_INIT_MS);
488 log_warning("TPM failed to reset after %ld ms, status: %#x\n",
489 get_timer(start), access);
495 * Locality could be already claimed (if this is a later U-Boot phase and the
496 * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
497 * the older read-only U-Boot did release it.
499 static int claim_locality(struct udevice *dev, int loc)
501 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
505 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
507 return log_msg_ret("read1", ret);
509 if ((access & mask) == mask) {
510 log_warning("Locality already claimed\n");
514 access = TPM_ACCESS_REQUEST_USE;
515 ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
517 return log_msg_ret("write", ret);
519 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
521 return log_msg_ret("read2", ret);
523 if ((access & mask) != mask) {
524 log_err("Failed to claim locality\n");
527 log_info("Claimed locality %d\n", loc);
532 static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
534 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
535 struct cr50_priv *priv = dev_get_priv(dev);
537 return snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x) irq=%d",
538 chip->chip_addr, priv->vendor >> 16, priv->use_irq);
541 static int cr50_i2c_open(struct udevice *dev)
546 ret = process_reset(dev);
548 return log_msg_ret("reset", ret);
550 ret = claim_locality(dev, 0);
552 return log_msg_ret("claim", ret);
554 cr50_i2c_get_desc(dev, buf, sizeof(buf));
555 log_debug("%s\n", buf);
560 static int cr50_i2c_cleanup(struct udevice *dev)
562 release_locality(dev, 1);
569 SHORT_TIMEOUT_MS = 750,
570 LONG_TIMEOUT_MS = 2000,
573 static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
575 struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
576 struct cr50_priv *priv = dev_get_priv(dev);
580 upriv->version = TPM_V2;
581 upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
582 upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
583 upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
584 upriv->retry_time_ms = TPM_TIMEOUT_MS;
586 upriv->pcr_count = 32;
587 upriv->pcr_select_min = 2;
589 /* Optional GPIO to track when cr50 is ready */
590 ret = irq_get_by_index(dev, 0, &irq);
593 priv->use_irq = true;
595 ret = gpio_request_by_name(dev, "ready-gpio", 0,
596 &priv->ready_gpio, GPIOD_IS_IN);
598 log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
606 static int cr50_i2c_probe(struct udevice *dev)
608 struct cr50_priv *priv = dev_get_priv(dev);
613 * 150ms should be enough to synchronise with the TPM even under the
614 * worst nested-reset-request conditions. In the vast majority of cases
615 * there will be no wait at all.
617 start = get_timer(0);
618 while (get_timer(start) < 150) {
621 /* Exit once DID and VID verified */
622 ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
623 if (!ret && vendor == CR50_DID_VID)
626 /* TPM might be resetting; let's retry in a bit */
629 if (vendor != CR50_DID_VID) {
630 log_debug("DID_VID %08x not recognised\n", vendor);
631 return log_msg_ret("vendor-id", -EXDEV);
633 priv->vendor = vendor;
638 static const struct tpm_ops cr50_i2c_ops = {
639 .open = cr50_i2c_open,
640 .get_desc = cr50_i2c_get_desc,
641 .send = cr50_i2c_send,
642 .recv = cr50_i2c_recv,
643 .cleanup = cr50_i2c_cleanup,
646 static const struct udevice_id cr50_i2c_ids[] = {
647 { .compatible = "google,cr50" },
651 U_BOOT_DRIVER(cr50_i2c) = {
654 .of_match = cr50_i2c_ids,
655 .ops = &cr50_i2c_ops,
656 .ofdata_to_platdata = cr50_i2c_ofdata_to_platdata,
657 .probe = cr50_i2c_probe,
658 .priv_auto_alloc_size = sizeof(struct cr50_priv),