1 // SPDX-License-Identifier: GPL-2.0+
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
11 #include <status_led.h>
16 DECLARE_GLOBAL_DATA_PTR;
19 * struct mpc83xx_timer_priv - Private data structure for MPC83xx timer driver
20 * @decrementer_count: Value to which the decrementer register should be re-set
21 * to when a timer interrupt occurs, thus determines the
22 * interrupt frequency (value for 1e6/HZ microseconds)
23 * @timestamp: Counter for the number of timer interrupts that have
24 * occurred (i.e. can be used to trigger events
25 * periodically in the timer interrupt)
27 struct mpc83xx_timer_priv {
28 uint decrementer_count;
33 * Bitmask for enabling the time base in the SPCR (System Priority
34 * Configuration Register)
36 static const u32 SPCR_TBEN_MASK = BIT(31 - 9);
39 * get_dec() - Get the value of the decrementer register
41 * Return: The value of the decrementer register
43 static inline unsigned long get_dec(void)
47 asm volatile ("mfdec %0" : "=r" (val) : );
53 * set_dec() - Set the value of the decrementer register
54 * @val: The value of the decrementer register to be set
56 static inline void set_dec(unsigned long val)
59 asm volatile ("mtdec %0"::"r" (val));
63 * mftbu() - Get value of TBU (upper time base) register
65 * Return: Value of the TBU register
67 static inline u32 mftbu(void)
71 asm volatile("mftbu %0" : "=r" (rval));
76 * mftb() - Get value of TBL (lower time base) register
78 * Return: Value of the TBL register
80 static inline u32 mftb(void)
84 asm volatile("mftb %0" : "=r" (rval));
89 * TODO(mario.six@gdsys.cc): This should really be done by timer_init, and the
90 * interrupt init should go into a interrupt driver.
92 int interrupt_init(void)
94 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
96 struct udevice *board;
97 struct udevice *timer;
98 struct mpc83xx_timer_priv *timer_priv;
102 ret = uclass_first_device_err(UCLASS_TIMER, &timer);
104 debug("%s: Could not find timer device (error: %d)",
109 timer_priv = dev_get_priv(timer);
111 if (board_get(&board)) {
112 debug("%s: board device could not be fetched.\n", __func__);
116 ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, board,
119 debug("%s: Could not retrieve CSB device (error: %d)",
124 ret = clk_get_by_index(csb, 0, &clock);
126 debug("%s: Could not retrieve clock (error: %d)",
131 timer_priv->decrementer_count = (clk_get_rate(&clock) / 4)
133 /* Enable e300 time base */
134 setbits_be32(&immr->sysconf.spcr, SPCR_TBEN_MASK);
136 set_dec(timer_priv->decrementer_count);
138 /* Switch on interrupts */
139 set_msr(get_msr() | MSR_EE);
145 * timer_interrupt() - Handler for the timer interrupt
146 * @regs: Array of register values
148 void timer_interrupt(struct pt_regs *regs)
150 struct udevice *timer = gd->timer;
151 struct mpc83xx_timer_priv *priv;
154 * During initialization, gd->timer might not be set yet, but the timer
155 * interrupt may already be enabled. In this case, wait for the
156 * initialization to complete
161 priv = dev_get_priv(timer);
163 /* Restore Decrementer Count */
164 set_dec(priv->decrementer_count);
168 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
169 if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
171 #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
173 #ifdef CONFIG_LED_STATUS
174 status_led_tick(priv->timestamp);
175 #endif /* CONFIG_LED_STATUS */
178 void wait_ticks(ulong ticks)
180 ulong end = get_ticks() + ticks;
182 while (end > get_ticks())
186 static int mpc83xx_timer_get_count(struct udevice *dev, u64 *count)
191 * To make sure that no tbl overflow occurred between reading tbl and
192 * tbu, read tbu again, and compare it with the previously read tbu
193 * value: If they're different, a tbl overflow has occurred.
198 } while (tbu != mftbu());
200 *count = (tbu * 0x10000ULL) + tbl;
205 static int mpc83xx_timer_probe(struct udevice *dev)
207 struct timer_dev_priv *uc_priv = dev->uclass_priv;
211 ret = interrupt_init();
213 debug("%s: interrupt_init failed (err = %d)\n",
218 ret = clk_get_by_index(dev, 0, &clock);
220 debug("%s: Could not retrieve clock (err = %d)\n",
225 uc_priv->clock_rate = (clk_get_rate(&clock) + 3L) / 4L;
230 static const struct timer_ops mpc83xx_timer_ops = {
231 .get_count = mpc83xx_timer_get_count,
234 static const struct udevice_id mpc83xx_timer_ids[] = {
235 { .compatible = "fsl,mpc83xx-timer" },
239 U_BOOT_DRIVER(mpc83xx_timer) = {
240 .name = "mpc83xx_timer",
242 .of_match = mpc83xx_timer_ids,
243 .probe = mpc83xx_timer_probe,
244 .ops = &mpc83xx_timer_ops,
245 .priv_auto_alloc_size = sizeof(struct mpc83xx_timer_priv),