Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[oweals/u-boot.git] / drivers / timer / dw-apb-timer.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Designware APB Timer driver
4  *
5  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
6  */
7
8 #include <common.h>
9 #include <dm.h>
10 #include <clk.h>
11 #include <timer.h>
12
13 #include <asm/io.h>
14 #include <asm/arch/timer.h>
15
16 #define DW_APB_LOAD_VAL         0x0
17 #define DW_APB_CURR_VAL         0x4
18 #define DW_APB_CTRL             0x8
19
20 struct dw_apb_timer_priv {
21         fdt_addr_t      regs;
22 };
23
24 static int dw_apb_timer_get_count(struct udevice *dev, u64 *count)
25 {
26         struct dw_apb_timer_priv *priv = dev_get_priv(dev);
27
28         /*
29          * The DW APB counter counts down, but this function
30          * requires the count to be incrementing. Invert the
31          * result.
32          */
33         *count = timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
34
35         return 0;
36 }
37
38 static int dw_apb_timer_probe(struct udevice *dev)
39 {
40         struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
41         struct dw_apb_timer_priv *priv = dev_get_priv(dev);
42         struct clk clk;
43         int ret;
44
45         ret = clk_get_by_index(dev, 0, &clk);
46         if (ret)
47                 return ret;
48
49         uc_priv->clock_rate = clk_get_rate(&clk);
50
51         clk_free(&clk);
52
53         /* init timer */
54         writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
55         writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
56         setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
57
58         return 0;
59 }
60
61 static int dw_apb_timer_ofdata_to_platdata(struct udevice *dev)
62 {
63         struct dw_apb_timer_priv *priv = dev_get_priv(dev);
64
65         priv->regs = dev_read_addr(dev);
66
67         return 0;
68 }
69
70 static const struct timer_ops dw_apb_timer_ops = {
71         .get_count      = dw_apb_timer_get_count,
72 };
73
74 static const struct udevice_id dw_apb_timer_ids[] = {
75         { .compatible = "snps,dw-apb-timer" },
76         {}
77 };
78
79 U_BOOT_DRIVER(dw_apb_timer) = {
80         .name           = "dw_apb_timer",
81         .id             = UCLASS_TIMER,
82         .ops            = &dw_apb_timer_ops,
83         .probe          = dw_apb_timer_probe,
84         .of_match       = dw_apb_timer_ids,
85         .ofdata_to_platdata = dw_apb_timer_ofdata_to_platdata,
86         .priv_auto_alloc_size = sizeof(struct dw_apb_timer_priv),
87 };