1 // SPDX-License-Identifier: GPL-2.0+
3 * Designware APB Timer driver
5 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
14 #include <dm/device_compat.h>
17 #include <asm/arch/timer.h>
19 #define DW_APB_LOAD_VAL 0x0
20 #define DW_APB_CURR_VAL 0x4
21 #define DW_APB_CTRL 0x8
23 struct dw_apb_timer_priv {
25 struct reset_ctl_bulk resets;
28 static int dw_apb_timer_get_count(struct udevice *dev, u64 *count)
30 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
33 * The DW APB counter counts down, but this function
34 * requires the count to be incrementing. Invert the
37 *count = timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
42 static int dw_apb_timer_probe(struct udevice *dev)
44 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
45 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
49 ret = reset_get_bulk(dev, &priv->resets);
51 dev_warn(dev, "Can't get reset: %d\n", ret);
53 reset_deassert_bulk(&priv->resets);
55 ret = clk_get_by_index(dev, 0, &clk);
59 uc_priv->clock_rate = clk_get_rate(&clk);
64 writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
65 writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
66 setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
71 static int dw_apb_timer_ofdata_to_platdata(struct udevice *dev)
73 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
75 priv->regs = dev_read_addr(dev);
80 static int dw_apb_timer_remove(struct udevice *dev)
82 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
84 return reset_release_bulk(&priv->resets);
87 static const struct timer_ops dw_apb_timer_ops = {
88 .get_count = dw_apb_timer_get_count,
91 static const struct udevice_id dw_apb_timer_ids[] = {
92 { .compatible = "snps,dw-apb-timer" },
96 U_BOOT_DRIVER(dw_apb_timer) = {
97 .name = "dw_apb_timer",
99 .ops = &dw_apb_timer_ops,
100 .probe = dw_apb_timer_probe,
101 .of_match = dw_apb_timer_ids,
102 .ofdata_to_platdata = dw_apb_timer_ofdata_to_platdata,
103 .remove = dw_apb_timer_remove,
104 .priv_auto_alloc_size = sizeof(struct dw_apb_timer_priv),