4 bool "Enable driver model for timer drivers"
7 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
9 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
31 bool "Allow timer to be used early in U-Boot"
33 # initr_bootstage() requires a timer and is called before initr_dm()
34 # so only the early timer is available
35 default y if X86 && BOOTSTAGE
37 In some cases the timer must be accessible before driver model is
38 active. Examples include when using CONFIG_TRACE to trace U-Boot's
39 execution before driver model is set up. Enable this option to
40 use an early timer. These functions must be supported by your timer
41 driver: timer_early_get_count() and timer_early_get_rate().
44 bool "Altera timer support"
47 Select this to enable a timer for Altera devices. Please find
48 details on the "Embedded Peripherals IP User Guide" of Altera.
50 config ATMEL_PIT_TIMER
51 bool "Atmel periodic interval timer support"
54 Select this to enable a periodic interval timer for Atmel devices,
55 it is designed to offer maximum accuracy and efficient management,
56 even for systems with long response time.
58 config CADENCE_TTC_TIMER
59 bool "Cadence TTC (Triple Timer Counter)"
62 Enables support for the cadence ttc driver. This driver is present
63 on Xilinx Zynq and ZynqMP SoCs.
65 config DESIGNWARE_APB_TIMER
66 bool "Designware APB Timer"
69 Enables support for the Designware APB Timer driver. This timer is
70 present on Altera SoCFPGA SoCs.
73 bool "Sandbox timer support"
74 depends on SANDBOX && TIMER
76 Select this to enable an emulated timer for sandbox. It gets
80 bool "x86 Time-Stamp Counter (TSC) timer support"
81 depends on TIMER && X86
83 Select this to enable Time-Stamp Counter (TSC) timer for x86.
86 bool "Omap timer support"
89 Select this to enable an timer for Omap devices.
92 bool "Aspeed ast2400/ast2500 timer support"
94 default y if ARCH_ASPEED
96 Select this to enable timer for Aspeed ast2400/ast2500 devices.
97 This is a simple sys timer driver, it is compatible with lib/time.c,
98 but does not support any interrupts. Even though SoC has 8 hardware
99 counters, they are all treated as a single device by this driver.
100 This is mostly because they all share several registers which
101 makes it difficult to completely separate them.
104 bool "STi timer support"
106 default y if ARCH_STI
108 Select this to enable a timer for STi devices.
111 bool "ARC timer support"
112 depends on TIMER && ARC && CLK
114 Select this to enable built-in ARC timers.
115 ARC cores may have up to 2 built-in timers: timer0 and timer1,
116 usually at least one of them exists. Either of them is supported
120 bool "AG101P timer support"
121 depends on TIMER && NDS32
123 Select this to enable a timer for AG01P devices.
125 config ATCPIT100_TIMER
126 bool "ATCPIT100 timer support"
129 Select this to enable a ATCPIT100 timer which will be embeded
130 in AE3XX, AE250 boards.
132 config ROCKCHIP_TIMER
133 bool "Rockchip timer support"
136 Select this to enable support for the timer found on
140 bool "STM32 timer support"
143 Select this to enable support for the timer found on
147 bool "MPC83xx timer support"
150 Select this to enable support for the timer found on
151 devices based on the MPC83xx family of SoCs.