drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7
   8 #include "Mp_Precomp.h"
   9
  10 /* defines */
  11 #define HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(val)                             \
  12 do {                                                                          \
  13         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, val);           \
  14         pCoexDm->psTdmaDuAdjType = val;                                       \
  15 } while (0)
  16
  17 /*  Global variables, these are static variables */
  18 static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant;
  19 static PCOEX_DM_8723B_2ANT pCoexDm = &GLCoexDm8723b2Ant;
  20 static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant;
  21 static PCOEX_STA_8723B_2ANT pCoexSta = &GLCoexSta8723b2Ant;
  22
  23 static const char *const GLBtInfoSrc8723b2Ant[] = {
  24         "BT Info[wifi fw]",
  25         "BT Info[bt rsp]",
  26         "BT Info[bt auto report]",
  27 };
  28
  29 static u32 GLCoexVerDate8723b2Ant = 20131211;
  30 static u32 GLCoexVer8723b2Ant = 0x40;
  31
  32 /*  local function start with halbtc8723b2ant_ */
  33 static u8 halbtc8723b2ant_BtRssiState(
  34         u8 levelNum, u8 rssiThresh, u8 rssiThresh1
  35 )
  36 {
  37         s32 btRssi = 0;
  38         u8 btRssiState = pCoexSta->preBtRssiState;
  39
  40         btRssi = pCoexSta->btRssi;
  41
  42         if (levelNum == 2) {
  43                 if (
  44                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
  45                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
  46                 ) {
  47                         if (btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  48                                 btRssiState = BTC_RSSI_STATE_HIGH;
  49                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
  50                         } else {
  51                                 btRssiState = BTC_RSSI_STATE_STAY_LOW;
  52                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
  53                         }
  54                 } else {
  55                         if (btRssi < rssiThresh) {
  56                                 btRssiState = BTC_RSSI_STATE_LOW;
  57                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
  58                         } else {
  59                                 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
  60                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
  61                         }
  62                 }
  63         } else if (levelNum == 3) {
  64                 if (rssiThresh > rssiThresh1) {
  65                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n"));
  66                         return pCoexSta->preBtRssiState;
  67                 }
  68
  69                 if (
  70                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
  71                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
  72                 ) {
  73                         if (btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  74                                 btRssiState = BTC_RSSI_STATE_MEDIUM;
  75                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
  76                         } else {
  77                                 btRssiState = BTC_RSSI_STATE_STAY_LOW;
  78                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
  79                         }
  80                 } else if (
  81                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
  82                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)
  83                 ) {
  84                         if (btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  85                                 btRssiState = BTC_RSSI_STATE_HIGH;
  86                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
  87                         } else if (btRssi < rssiThresh) {
  88                                 btRssiState = BTC_RSSI_STATE_LOW;
  89                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
  90                         } else {
  91                                 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
  92                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n"));
  93                         }
  94                 } else {
  95                         if (btRssi < rssiThresh1) {
  96                                 btRssiState = BTC_RSSI_STATE_MEDIUM;
  97                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
  98                         } else {
  99                                 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
 100                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
 101                         }
 102                 }
 103         }
 104
 105         pCoexSta->preBtRssiState = btRssiState;
 106
 107         return btRssiState;
 108 }
 109
 110 static u8 halbtc8723b2ant_WifiRssiState(
 111         PBTC_COEXIST pBtCoexist,
 112         u8 index,
 113         u8 levelNum,
 114         u8 rssiThresh,
 115         u8 rssiThresh1
 116 )
 117 {
 118         s32 wifiRssi = 0;
 119         u8 wifiRssiState = pCoexSta->preWifiRssiState[index];
 120
 121         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
 122
 123         if (levelNum == 2) {
 124                 if (
 125                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
 126                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
 127                 ) {
 128                         if (wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 129                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
 130                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
 131                         } else {
 132                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
 133                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
 134                         }
 135                 } else {
 136                         if (wifiRssi < rssiThresh) {
 137                                 wifiRssiState = BTC_RSSI_STATE_LOW;
 138                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
 139                         } else {
 140                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
 141                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
 142                         }
 143                 }
 144         } else if (levelNum == 3) {
 145                 if (rssiThresh > rssiThresh1) {
 146                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n"));
 147                         return pCoexSta->preWifiRssiState[index];
 148                 }
 149
 150                 if (
 151                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
 152                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
 153                 ) {
 154                         if (wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 155                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
 156                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
 157                         } else {
 158                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
 159                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
 160                         }
 161                 } else if (
 162                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
 163                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)
 164                 ) {
 165                         if (wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 166                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
 167                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
 168                         } else if (wifiRssi < rssiThresh) {
 169                                 wifiRssiState = BTC_RSSI_STATE_LOW;
 170                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
 171                         } else {
 172                                 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
 173                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n"));
 174                         }
 175                 } else {
 176                         if (wifiRssi < rssiThresh1) {
 177                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
 178                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
 179                         } else {
 180                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
 181                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
 182                         }
 183                 }
 184         }
 185
 186         pCoexSta->preWifiRssiState[index] = wifiRssiState;
 187
 188         return wifiRssiState;
 189 }
 190
 191 static void halbtc8723b2ant_LimitedRx(
 192         PBTC_COEXIST pBtCoexist,
 193         bool bForceExec,
 194         bool bRejApAggPkt,
 195         bool bBtCtrlAggBufSize,
 196         u8 aggBufSize
 197 )
 198 {
 199         bool bRejectRxAgg = bRejApAggPkt;
 200         bool bBtCtrlRxAggSize = bBtCtrlAggBufSize;
 201         u8 rxAggSize = aggBufSize;
 202
 203         /*  */
 204         /*      Rx Aggregation related setting */
 205         /*  */
 206         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
 207         /*  decide BT control aggregation buf size or not */
 208         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
 209         /*  aggregation buf size, only work when BT control Rx aggregation size. */
 210         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
 211         /*  real update aggregation setting */
 212         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 213 }
 214
 215 static void halbtc8723b2ant_MonitorBtCtr(PBTC_COEXIST pBtCoexist)
 216 {
 217         u32 regHPTxRx, regLPTxRx, u4Tmp;
 218         u32 regHPTx = 0, regHPRx = 0, regLPTx = 0, regLPRx = 0;
 219
 220         regHPTxRx = 0x770;
 221         regLPTxRx = 0x774;
 222
 223         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
 224         regHPTx = u4Tmp & bMaskLWord;
 225         regHPRx = (u4Tmp & bMaskHWord)>>16;
 226
 227         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
 228         regLPTx = u4Tmp & bMaskLWord;
 229         regLPRx = (u4Tmp & bMaskHWord)>>16;
 230
 231         pCoexSta->highPriorityTx = regHPTx;
 232         pCoexSta->highPriorityRx = regHPRx;
 233         pCoexSta->lowPriorityTx = regLPTx;
 234         pCoexSta->lowPriorityRx = regLPRx;
 235
 236         BTC_PRINT(
 237                 BTC_MSG_ALGORITHM,
 238                 ALGO_BT_MONITOR,
 239                 (
 240                         "[BTCoex], High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 241                         regHPTxRx,
 242                         regHPTx,
 243                         regHPTx,
 244                         regHPRx,
 245                         regHPRx
 246                 )
 247         );
 248         BTC_PRINT(
 249                 BTC_MSG_ALGORITHM,
 250                 ALGO_BT_MONITOR,
 251                 (
 252                         "[BTCoex], Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 253                         regLPTxRx,
 254                         regLPTx,
 255                         regLPTx,
 256                         regLPRx,
 257                         regLPRx
 258                 )
 259         );
 260
 261         /*  reset counter */
 262         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
 263 }
 264
 265 static void halbtc8723b2ant_QueryBtInfo(PBTC_COEXIST pBtCoexist)
 266 {
 267         u8      H2C_Parameter[1] = {0};
 268
 269         pCoexSta->bC2hBtInfoReqSent = true;
 270
 271         H2C_Parameter[0] |= BIT0;       /*  trigger */
 272
 273         BTC_PRINT(
 274                 BTC_MSG_ALGORITHM,
 275                 ALGO_TRACE_FW_EXEC,
 276                 ("[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", H2C_Parameter[0])
 277         );
 278
 279         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
 280 }
 281
 282 static bool halbtc8723b2ant_IsWifiStatusChanged(PBTC_COEXIST pBtCoexist)
 283 {
 284         static bool     bPreWifiBusy, bPreUnder4way, bPreBtHsOn;
 285         bool bWifiBusy = false, bUnder4way = false, bBtHsOn = false;
 286         bool bWifiConnected = false;
 287
 288         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
 289         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
 290         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 291         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
 292
 293         if (bWifiConnected) {
 294                 if (bWifiBusy != bPreWifiBusy) {
 295                         bPreWifiBusy = bWifiBusy;
 296                         return true;
 297                 }
 298
 299                 if (bUnder4way != bPreUnder4way) {
 300                         bPreUnder4way = bUnder4way;
 301                         return true;
 302                 }
 303
 304                 if (bBtHsOn != bPreBtHsOn) {
 305                         bPreBtHsOn = bBtHsOn;
 306                         return true;
 307                 }
 308         }
 309
 310         return false;
 311 }
 312
 313 static void halbtc8723b2ant_UpdateBtLinkInfo(PBTC_COEXIST pBtCoexist)
 314 {
 315         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
 316         bool bBtHsOn = false;
 317
 318         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 319
 320         pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
 321         pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
 322         pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
 323         pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
 324         pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
 325
 326         /*  work around for HS mode. */
 327         if (bBtHsOn) {
 328                 pBtLinkInfo->bPanExist = true;
 329                 pBtLinkInfo->bBtLinkExist = true;
 330         }
 331
 332         /*  check if Sco only */
 333         if (
 334                 pBtLinkInfo->bScoExist &&
 335                 !pBtLinkInfo->bA2dpExist &&
 336                 !pBtLinkInfo->bPanExist &&
 337                 !pBtLinkInfo->bHidExist
 338         )
 339                 pBtLinkInfo->bScoOnly = true;
 340         else
 341                 pBtLinkInfo->bScoOnly = false;
 342
 343         /*  check if A2dp only */
 344         if (
 345                 !pBtLinkInfo->bScoExist &&
 346                 pBtLinkInfo->bA2dpExist &&
 347                 !pBtLinkInfo->bPanExist &&
 348                 !pBtLinkInfo->bHidExist
 349         )
 350                 pBtLinkInfo->bA2dpOnly = true;
 351         else
 352                 pBtLinkInfo->bA2dpOnly = false;
 353
 354         /*  check if Pan only */
 355         if (
 356                 !pBtLinkInfo->bScoExist &&
 357                 !pBtLinkInfo->bA2dpExist &&
 358                 pBtLinkInfo->bPanExist &&
 359                 !pBtLinkInfo->bHidExist
 360         )
 361                 pBtLinkInfo->bPanOnly = true;
 362         else
 363                 pBtLinkInfo->bPanOnly = false;
 364
 365         /*  check if Hid only */
 366         if (
 367                 !pBtLinkInfo->bScoExist &&
 368                 !pBtLinkInfo->bA2dpExist &&
 369                 !pBtLinkInfo->bPanExist &&
 370                 pBtLinkInfo->bHidExist
 371         )
 372                 pBtLinkInfo->bHidOnly = true;
 373         else
 374                 pBtLinkInfo->bHidOnly = false;
 375 }
 376
 377 static u8 halbtc8723b2ant_ActionAlgorithm(PBTC_COEXIST pBtCoexist)
 378 {
 379         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
 380         bool bBtHsOn = false;
 381         u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
 382         u8 numOfDiffProfile = 0;
 383
 384         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 385
 386         if (!pBtLinkInfo->bBtLinkExist) {
 387                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No BT link exists!!!\n"));
 388                 return algorithm;
 389         }
 390
 391         if (pBtLinkInfo->bScoExist)
 392                 numOfDiffProfile++;
 393
 394         if (pBtLinkInfo->bHidExist)
 395                 numOfDiffProfile++;
 396
 397         if (pBtLinkInfo->bPanExist)
 398                 numOfDiffProfile++;
 399
 400         if (pBtLinkInfo->bA2dpExist)
 401                 numOfDiffProfile++;
 402
 403         if (numOfDiffProfile == 1) {
 404                 if (pBtLinkInfo->bScoExist) {
 405                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n"));
 406                         algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
 407                 } else {
 408                         if (pBtLinkInfo->bHidExist) {
 409                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n"));
 410                                 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
 411                         } else if (pBtLinkInfo->bA2dpExist) {
 412                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n"));
 413                                 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
 414                         } else if (pBtLinkInfo->bPanExist) {
 415                                 if (bBtHsOn) {
 416                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n"));
 417                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS;
 418                                 } else {
 419                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n"));
 420                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR;
 421                                 }
 422                         }
 423                 }
 424         } else if (numOfDiffProfile == 2) {
 425                 if (pBtLinkInfo->bScoExist) {
 426                         if (pBtLinkInfo->bHidExist) {
 427                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n"));
 428                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 429                         } else if (pBtLinkInfo->bA2dpExist) {
 430                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n"));
 431                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 432                         } else if (pBtLinkInfo->bPanExist) {
 433                                 if (bBtHsOn) {
 434                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n"));
 435                                         algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
 436                                 } else {
 437                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n"));
 438                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 439                                 }
 440                         }
 441                 } else {
 442                         if (
 443                                 pBtLinkInfo->bHidExist &&
 444                                 pBtLinkInfo->bA2dpExist
 445                         ) {
 446                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n"));
 447                                 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
 448                         } else if (
 449                                 pBtLinkInfo->bHidExist &&
 450                                 pBtLinkInfo->bPanExist
 451                         ) {
 452                                 if (bBtHsOn) {
 453                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n"));
 454                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
 455                                 } else {
 456                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n"));
 457                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 458                                 }
 459                         } else if (
 460                                 pBtLinkInfo->bPanExist &&
 461                                 pBtLinkInfo->bA2dpExist
 462                         ) {
 463                                 if (bBtHsOn) {
 464                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n"));
 465                                         algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
 466                                 } else {
 467                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n"));
 468                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
 469                                 }
 470                         }
 471                 }
 472         } else if (numOfDiffProfile == 3) {
 473                 if (pBtLinkInfo->bScoExist) {
 474                         if (
 475                                 pBtLinkInfo->bHidExist &&
 476                                 pBtLinkInfo->bA2dpExist
 477                         ) {
 478                                 BTC_PRINT(
 479                                         BTC_MSG_ALGORITHM,
 480                                         ALGO_TRACE,
 481                                         ("[BTCoex], SCO + HID + A2DP ==> HID\n")
 482                                 );
 483                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 484                         } else if (
 485                                 pBtLinkInfo->bHidExist &&
 486                                 pBtLinkInfo->bPanExist
 487                         ) {
 488                                 if (bBtHsOn) {
 489                                         BTC_PRINT(
 490                                                 BTC_MSG_ALGORITHM,
 491                                                 ALGO_TRACE,
 492                                                 ("[BTCoex], SCO + HID + PAN(HS)\n")
 493                                         );
 494                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 495                                 } else {
 496                                         BTC_PRINT(
 497                                                 BTC_MSG_ALGORITHM,
 498                                                 ALGO_TRACE,
 499                                                 ("[BTCoex], SCO + HID + PAN(EDR)\n")
 500                                         );
 501                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 502                                 }
 503                         } else if (
 504                                 pBtLinkInfo->bPanExist &&
 505                                 pBtLinkInfo->bA2dpExist
 506                         ) {
 507                                 if (bBtHsOn) {
 508                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
 509                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 510                                 } else {
 511                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
 512                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 513                                 }
 514                         }
 515                 } else {
 516                         if (
 517                                 pBtLinkInfo->bHidExist &&
 518                                 pBtLinkInfo->bPanExist &&
 519                                 pBtLinkInfo->bA2dpExist
 520                         ) {
 521                                 if (bBtHsOn) {
 522                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
 523                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
 524                                 } else {
 525                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
 526                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 527                                 }
 528                         }
 529                 }
 530         } else if (numOfDiffProfile >= 3) {
 531                 if (pBtLinkInfo->bScoExist) {
 532                         if (
 533                                 pBtLinkInfo->bHidExist &&
 534                                 pBtLinkInfo->bPanExist &&
 535                                 pBtLinkInfo->bA2dpExist
 536                         ) {
 537                                 if (bBtHsOn) {
 538                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
 539
 540                                 } else {
 541                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR) ==>PAN(EDR)+HID\n"));
 542                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548         return algorithm;
 549 }
 550
 551 static void halbtc8723b2ant_SetFwDacSwingLevel(
 552         PBTC_COEXIST pBtCoexist, u8 dacSwingLvl
 553 )
 554 {
 555         u8      H2C_Parameter[1] = {0};
 556
 557         /*  There are several type of dacswing */
 558         /*  0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 559         H2C_Parameter[0] = dacSwingLvl;
 560
 561         BTC_PRINT(
 562                 BTC_MSG_ALGORITHM,
 563                 ALGO_TRACE_FW_EXEC,
 564                 ("[BTCoex], Set Dac Swing Level = 0x%x\n", dacSwingLvl)
 565         );
 566         BTC_PRINT(
 567                 BTC_MSG_ALGORITHM,
 568                 ALGO_TRACE_FW_EXEC,
 569                 ("[BTCoex], FW write 0x64 = 0x%x\n", H2C_Parameter[0])
 570         );
 571
 572         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
 573 }
 574
 575 static void halbtc8723b2ant_SetFwDecBtPwr(
 576         PBTC_COEXIST pBtCoexist, u8 decBtPwrLvl
 577 )
 578 {
 579         u8      H2C_Parameter[1] = {0};
 580
 581         H2C_Parameter[0] = decBtPwrLvl;
 582
 583         BTC_PRINT(
 584                 BTC_MSG_ALGORITHM,
 585                 ALGO_TRACE_FW_EXEC,
 586                 (
 587                         "[BTCoex], decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
 588                         decBtPwrLvl,
 589                         H2C_Parameter[0]
 590                 )
 591         );
 592
 593         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
 594 }
 595
 596 static void halbtc8723b2ant_DecBtPwr(
 597         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 decBtPwrLvl
 598 )
 599 {
 600         BTC_PRINT(
 601                 BTC_MSG_ALGORITHM,
 602                 ALGO_TRACE_FW,
 603                 (
 604                         "[BTCoex], %s Dec BT power level = %d\n",
 605                         (bForceExec ? "force to" : ""),
 606                         decBtPwrLvl
 607                 )
 608         );
 609         pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
 610
 611         if (!bForceExec) {
 612                 BTC_PRINT(
 613                         BTC_MSG_ALGORITHM,
 614                         ALGO_TRACE_FW_DETAIL,
 615                         (
 616                                 "[BTCoex], preBtDecPwrLvl =%d, curBtDecPwrLvl =%d\n",
 617                                 pCoexDm->preBtDecPwrLvl,
 618                                 pCoexDm->curBtDecPwrLvl
 619                         )
 620                 );
 621
 622                 if (pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
 623                         return;
 624         }
 625         halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
 626
 627         pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
 628 }
 629
 630 static void halbtc8723b2ant_FwDacSwingLvl(
 631         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 fwDacSwingLvl
 632 )
 633 {
 634         BTC_PRINT(
 635                 BTC_MSG_ALGORITHM,
 636                 ALGO_TRACE_FW,
 637                 (
 638                         "[BTCoex], %s set FW Dac Swing level = %d\n",
 639                         (bForceExec ? "force to" : ""),
 640                         fwDacSwingLvl
 641                 )
 642         );
 643         pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
 644
 645         if (!bForceExec) {
 646                 BTC_PRINT(
 647                         BTC_MSG_ALGORITHM,
 648                         ALGO_TRACE_FW_DETAIL,
 649                         (
 650                                 "[BTCoex], preFwDacSwingLvl =%d, curFwDacSwingLvl =%d\n",
 651                                 pCoexDm->preFwDacSwingLvl,
 652                                 pCoexDm->curFwDacSwingLvl
 653                         )
 654                 );
 655
 656                 if (pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
 657                         return;
 658         }
 659
 660         halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
 661
 662         pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
 663 }
 664
 665 static void halbtc8723b2ant_SetSwRfRxLpfCorner(
 666         PBTC_COEXIST pBtCoexist,
 667         bool bRxRfShrinkOn
 668 )
 669 {
 670         if (bRxRfShrinkOn) {
 671                 /* Shrink RF Rx LPF corner */
 672                 BTC_PRINT(
 673                         BTC_MSG_ALGORITHM,
 674                         ALGO_TRACE_SW_EXEC,
 675                         ("[BTCoex], Shrink RF Rx LPF corner!!\n")
 676                 );
 677                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
 678         } else {
 679                 /* Resume RF Rx LPF corner */
 680                 /*  After initialized, we can use pCoexDm->btRf0x1eBackup */
 681                 if (pBtCoexist->bInitilized) {
 682                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
 683                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
 684                 }
 685         }
 686 }
 687
 688 static void halbtc8723b2ant_RfShrink(
 689         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bRxRfShrinkOn
 690 )
 691 {
 692         BTC_PRINT(
 693                 BTC_MSG_ALGORITHM,
 694                 ALGO_TRACE_SW,
 695                 (
 696                         "[BTCoex], %s turn Rx RF Shrink = %s\n",
 697                         (bForceExec ? "force to" : ""),
 698                         (bRxRfShrinkOn ? "ON" : "OFF")
 699                 )
 700         );
 701         pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
 702
 703         if (!bForceExec) {
 704                 BTC_PRINT(
 705                         BTC_MSG_ALGORITHM,
 706                         ALGO_TRACE_SW_DETAIL,
 707                         (
 708                                 "[BTCoex], bPreRfRxLpfShrink =%d, bCurRfRxLpfShrink =%d\n",
 709                                 pCoexDm->bPreRfRxLpfShrink,
 710                                 pCoexDm->bCurRfRxLpfShrink
 711                         )
 712                 );
 713
 714                 if (pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
 715                         return;
 716         }
 717         halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
 718
 719         pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
 720 }
 721
 722 static void halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
 723         PBTC_COEXIST pBtCoexist, bool bLowPenaltyRa
 724 )
 725 {
 726         u8      H2C_Parameter[6] = {0};
 727
 728         H2C_Parameter[0] = 0x6; /*  opCode, 0x6 = Retry_Penalty */
 729
 730         if (bLowPenaltyRa) {
 731                 H2C_Parameter[1] |= BIT0;
 732                 H2C_Parameter[2] = 0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
 733                 H2C_Parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 734                 H2C_Parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 735                 H2C_Parameter[5] = 0xf9;        /* MCS5 or OFDM36 */
 736         }
 737
 738         BTC_PRINT(
 739                 BTC_MSG_ALGORITHM,
 740                 ALGO_TRACE_FW_EXEC,
 741                 (
 742                         "[BTCoex], set WiFi Low-Penalty Retry: %s",
 743                         (bLowPenaltyRa ? "ON!!" : "OFF!!")
 744                 )
 745         );
 746
 747         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
 748 }
 749
 750 static void halbtc8723b2ant_LowPenaltyRa(
 751         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bLowPenaltyRa
 752 )
 753 {
 754         /* return; */
 755         BTC_PRINT(
 756                 BTC_MSG_ALGORITHM,
 757                 ALGO_TRACE_SW,
 758                 (
 759                         "[BTCoex], %s turn LowPenaltyRA = %s\n",
 760                         (bForceExec ? "force to" : ""),
 761                         (bLowPenaltyRa ? "ON" : "OFF")
 762                 )
 763         );
 764         pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
 765
 766         if (!bForceExec) {
 767                 BTC_PRINT(
 768                         BTC_MSG_ALGORITHM,
 769                         ALGO_TRACE_SW_DETAIL,
 770                         (
 771                                 "[BTCoex], bPreLowPenaltyRa =%d, bCurLowPenaltyRa =%d\n",
 772                                 pCoexDm->bPreLowPenaltyRa,
 773                                 pCoexDm->bCurLowPenaltyRa
 774                         )
 775                 );
 776
 777                 if (pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
 778                         return;
 779         }
 780         halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
 781
 782         pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
 783 }
 784
 785 static void halbtc8723b2ant_SetDacSwingReg(PBTC_COEXIST pBtCoexist, u32 level)
 786 {
 787         u8 val = (u8)level;
 788
 789         BTC_PRINT(
 790                 BTC_MSG_ALGORITHM,
 791                 ALGO_TRACE_SW_EXEC,
 792                 ("[BTCoex], Write SwDacSwing = 0x%x\n", level)
 793         );
 794         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
 795 }
 796
 797 static void halbtc8723b2ant_SetSwFullTimeDacSwing(
 798         PBTC_COEXIST pBtCoexist, bool bSwDacSwingOn, u32 swDacSwingLvl
 799 )
 800 {
 801         if (bSwDacSwingOn)
 802                 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
 803         else
 804                 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
 805 }
 806
 807
 808 static void halbtc8723b2ant_DacSwing(
 809         PBTC_COEXIST pBtCoexist,
 810         bool bForceExec,
 811         bool bDacSwingOn,
 812         u32 dacSwingLvl
 813 )
 814 {
 815         BTC_PRINT(
 816                 BTC_MSG_ALGORITHM,
 817                 ALGO_TRACE_SW,
 818                 (
 819                         "[BTCoex], %s turn DacSwing =%s, dacSwingLvl = 0x%x\n",
 820                         (bForceExec ? "force to" : ""),
 821                         (bDacSwingOn ? "ON" : "OFF"),
 822                         dacSwingLvl
 823                 )
 824         );
 825         pCoexDm->bCurDacSwingOn = bDacSwingOn;
 826         pCoexDm->curDacSwingLvl = dacSwingLvl;
 827
 828         if (!bForceExec) {
 829                 BTC_PRINT(
 830                         BTC_MSG_ALGORITHM,
 831                         ALGO_TRACE_SW_DETAIL,
 832                         (
 833                                 "[BTCoex], bPreDacSwingOn =%d, preDacSwingLvl = 0x%x, bCurDacSwingOn =%d, curDacSwingLvl = 0x%x\n",
 834                                 pCoexDm->bPreDacSwingOn,
 835                                 pCoexDm->preDacSwingLvl,
 836                                 pCoexDm->bCurDacSwingOn,
 837                                 pCoexDm->curDacSwingLvl
 838                         )
 839                 );
 840
 841                 if ((pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
 842                         (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl))
 843                         return;
 844         }
 845         mdelay(30);
 846         halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
 847
 848         pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
 849         pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
 850 }
 851
 852 static void halbtc8723b2ant_SetAgcTable(
 853         PBTC_COEXIST pBtCoexist, bool bAgcTableEn
 854 )
 855 {
 856         u8 rssiAdjustVal = 0;
 857
 858         /* BB AGC Gain Table */
 859         if (bAgcTableEn) {
 860                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table On!\n"));
 861                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
 862                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
 863                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
 864                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
 865                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
 866                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
 867                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
 868         } else {
 869                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table Off!\n"));
 870                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
 871                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
 872                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
 873                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
 874                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
 875                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
 876                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
 877         }
 878
 879
 880         /* RF Gain */
 881         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
 882         if (bAgcTableEn) {
 883                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
 884                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
 885                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
 886         } else {
 887                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
 888                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
 889                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
 890         }
 891         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
 892
 893         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
 894         if (bAgcTableEn) {
 895                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
 896                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
 897                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
 898         } else {
 899                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
 900                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
 901                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
 902         }
 903         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
 904
 905         /*  set rssiAdjustVal for wifi module. */
 906         if (bAgcTableEn)
 907                 rssiAdjustVal = 8;
 908
 909         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
 910 }
 911
 912 static void halbtc8723b2ant_AgcTable(
 913         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bAgcTableEn
 914 )
 915 {
 916         BTC_PRINT(
 917                 BTC_MSG_ALGORITHM,
 918                 ALGO_TRACE_SW,
 919                 (
 920                         "[BTCoex], %s %s Agc Table\n",
 921                         (bForceExec ? "force to" : ""),
 922                         (bAgcTableEn ? "Enable" : "Disable")
 923                 )
 924         );
 925         pCoexDm->bCurAgcTableEn = bAgcTableEn;
 926
 927         if (!bForceExec) {
 928                 BTC_PRINT(
 929                         BTC_MSG_ALGORITHM,
 930                         ALGO_TRACE_SW_DETAIL,
 931                         (
 932                                 "[BTCoex], bPreAgcTableEn =%d, bCurAgcTableEn =%d\n",
 933                                 pCoexDm->bPreAgcTableEn,
 934                                 pCoexDm->bCurAgcTableEn
 935                         )
 936                 );
 937
 938                 if (pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
 939                         return;
 940         }
 941         halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
 942
 943         pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
 944 }
 945
 946 static void halbtc8723b2ant_SetCoexTable(
 947         PBTC_COEXIST pBtCoexist,
 948         u32 val0x6c0,
 949         u32 val0x6c4,
 950         u32 val0x6c8,
 951         u8 val0x6cc
 952 )
 953 {
 954         BTC_PRINT(
 955                 BTC_MSG_ALGORITHM,
 956                 ALGO_TRACE_SW_EXEC,
 957                 ("[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0)
 958         );
 959         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
 960
 961         BTC_PRINT(
 962                 BTC_MSG_ALGORITHM,
 963                 ALGO_TRACE_SW_EXEC,
 964                 ("[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4)
 965         );
 966         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
 967
 968         BTC_PRINT(
 969                 BTC_MSG_ALGORITHM,
 970                 ALGO_TRACE_SW_EXEC,
 971                 ("[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8)
 972         );
 973         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
 974
 975         BTC_PRINT(
 976                 BTC_MSG_ALGORITHM,
 977                 ALGO_TRACE_SW_EXEC,
 978                 ("[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc)
 979         );
 980         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
 981 }
 982
 983 static void halbtc8723b2ant_CoexTable(
 984         PBTC_COEXIST pBtCoexist,
 985         bool bForceExec,
 986         u32 val0x6c0,
 987         u32 val0x6c4,
 988         u32 val0x6c8,
 989         u8 val0x6cc
 990 )
 991 {
 992         BTC_PRINT(
 993                 BTC_MSG_ALGORITHM,
 994                 ALGO_TRACE_SW,
 995                 (
 996                         "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, 0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
 997                         (bForceExec ? "force to" : ""),
 998                         val0x6c0,
 999                         val0x6c4,
1000                         val0x6c8,
1001                         val0x6cc
1002                 )
1003         );
1004         pCoexDm->curVal0x6c0 = val0x6c0;
1005         pCoexDm->curVal0x6c4 = val0x6c4;
1006         pCoexDm->curVal0x6c8 = val0x6c8;
1007         pCoexDm->curVal0x6cc = val0x6cc;
1008
1009         if (!bForceExec) {
1010                 BTC_PRINT(
1011                         BTC_MSG_ALGORITHM,
1012                         ALGO_TRACE_SW_DETAIL,
1013                         (
1014                                 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
1015                                 pCoexDm->preVal0x6c0,
1016                                 pCoexDm->preVal0x6c4,
1017                                 pCoexDm->preVal0x6c8,
1018                                 pCoexDm->preVal0x6cc
1019                         )
1020                 );
1021                 BTC_PRINT(
1022                         BTC_MSG_ALGORITHM,
1023                         ALGO_TRACE_SW_DETAIL,
1024                         (
1025                                 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x, curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1026                                 pCoexDm->curVal0x6c0,
1027                                 pCoexDm->curVal0x6c4,
1028                                 pCoexDm->curVal0x6c8,
1029                                 pCoexDm->curVal0x6cc
1030                         )
1031                 );
1032
1033                 if (
1034                         (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
1035                         (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
1036                         (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
1037                         (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc)
1038                 )
1039                         return;
1040         }
1041         halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
1042
1043         pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
1044         pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
1045         pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
1046         pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
1047 }
1048
1049 static void halbtc8723b2ant_CoexTableWithType(
1050         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 type
1051 )
1052 {
1053         switch (type) {
1054         case 0:
1055                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffff, 0x3);
1056                 break;
1057         case 1:
1058                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffff, 0x3);
1059                 break;
1060         case 2:
1061                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
1062                 break;
1063         case 3:
1064                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffff, 0x3);
1065                 break;
1066         case 4:
1067                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffff, 0x3);
1068                 break;
1069         case 5:
1070                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffff, 0x3);
1071                 break;
1072         case 6:
1073                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
1074                 break;
1075         case 7:
1076                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0xfafafafa, 0xffff, 0x3);
1077                 break;
1078         case 8:
1079                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
1080                 break;
1081         case 9:
1082                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3);
1083                 break;
1084         case 10:
1085                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
1086                 break;
1087         case 11:
1088                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
1089                 break;
1090         case 12:
1091                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5f5f5f5f, 0xffff, 0x3);
1092                 break;
1093         default:
1094                 break;
1095         }
1096 }
1097
1098 static void halbtc8723b2ant_SetFwIgnoreWlanAct(
1099         PBTC_COEXIST pBtCoexist, bool bEnable
1100 )
1101 {
1102         u8      H2C_Parameter[1] = {0};
1103
1104         if (bEnable)
1105                 H2C_Parameter[0] |= BIT0;               /*  function enable */
1106
1107         BTC_PRINT(
1108                 BTC_MSG_ALGORITHM,
1109                 ALGO_TRACE_FW_EXEC,
1110                 (
1111                         "[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1112                         H2C_Parameter[0]
1113                 )
1114         );
1115
1116         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
1117 }
1118
1119 static void halbtc8723b2ant_IgnoreWlanAct(
1120         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bEnable
1121 )
1122 {
1123         BTC_PRINT(
1124                 BTC_MSG_ALGORITHM,
1125                 ALGO_TRACE_FW,
1126                 (
1127                         "[BTCoex], %s turn Ignore WlanAct %s\n",
1128                         (bForceExec ? "force to" : ""),
1129                         (bEnable ? "ON" : "OFF")
1130                 )
1131         );
1132
1133         pCoexDm->bCurIgnoreWlanAct = bEnable;
1134
1135         if (!bForceExec) {
1136                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n",
1137                         pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct));
1138
1139                 if (pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
1140                         return;
1141         }
1142         halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
1143
1144         pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
1145 }
1146
1147 static void halbtc8723b2ant_SetFwPstdma(
1148         PBTC_COEXIST pBtCoexist,
1149         u8 byte1,
1150         u8 byte2,
1151         u8 byte3,
1152         u8 byte4,
1153         u8 byte5
1154 )
1155 {
1156         u8      H2C_Parameter[5] = {0};
1157
1158         H2C_Parameter[0] = byte1;
1159         H2C_Parameter[1] = byte2;
1160         H2C_Parameter[2] = byte3;
1161         H2C_Parameter[3] = byte4;
1162         H2C_Parameter[4] = byte5;
1163
1164         pCoexDm->psTdmaPara[0] = byte1;
1165         pCoexDm->psTdmaPara[1] = byte2;
1166         pCoexDm->psTdmaPara[2] = byte3;
1167         pCoexDm->psTdmaPara[3] = byte4;
1168         pCoexDm->psTdmaPara[4] = byte5;
1169
1170         BTC_PRINT(
1171                 BTC_MSG_ALGORITHM,
1172                 ALGO_TRACE_FW_EXEC,
1173                 (
1174                         "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1175                         H2C_Parameter[0],
1176                         H2C_Parameter[1]<<24|
1177                         H2C_Parameter[2]<<16|
1178                         H2C_Parameter[3]<<8|
1179                         H2C_Parameter[4]
1180                 )
1181         );
1182
1183         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
1184 }
1185
1186 static void halbtc8723b2ant_SwMechanism1(
1187         PBTC_COEXIST pBtCoexist,
1188         bool bShrinkRxLPF,
1189         bool bLowPenaltyRA,
1190         bool bLimitedDIG,
1191         bool bBTLNAConstrain
1192 )
1193 {
1194         halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
1195         halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
1196 }
1197
1198 static void halbtc8723b2ant_SwMechanism2(
1199         PBTC_COEXIST pBtCoexist,
1200         bool bAGCTableShift,
1201         bool bADCBackOff,
1202         bool bSWDACSwing,
1203         u32 dacSwingLvl
1204 )
1205 {
1206         halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
1207         halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
1208 }
1209
1210 static void halbtc8723b2ant_SetAntPath(
1211         PBTC_COEXIST pBtCoexist, u8 antPosType, bool bInitHwCfg, bool bWifiOff
1212 )
1213 {
1214         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
1215         u32 fwVer = 0, u4Tmp = 0;
1216         bool bPgExtSwitch = false;
1217         bool bUseExtSwitch = false;
1218         u8      H2C_Parameter[2] = {0};
1219
1220         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
1221         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);        /*  [31:16]=fw ver, [15:0]=fw sub ver */
1222
1223         if ((fwVer > 0 && fwVer < 0xc0000) || bPgExtSwitch)
1224                 bUseExtSwitch = true;
1225
1226         if (bInitHwCfg) {
1227                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
1228                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
1229                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
1230                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
1231                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
1232
1233                 if (fwVer >= 0x180000) {
1234                         /* Use H2C to set GNT_BT to LOW */
1235                         H2C_Parameter[0] = 0;
1236                         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1237                 } else {
1238                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
1239                 }
1240
1241                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
1242
1243                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); /* WiFi TRx Mask off */
1244                 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); /* BT TRx Mask off */
1245
1246                 if (pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) {
1247                         /* tell firmware "no antenna inverse" */
1248                         H2C_Parameter[0] = 0;
1249                 } else {
1250                         /* tell firmware "antenna inverse" */
1251                         H2C_Parameter[0] = 1;
1252                 }
1253
1254                 if (bUseExtSwitch) {
1255                         /* ext switch type */
1256                         H2C_Parameter[1] = 1;
1257                 } else {
1258                         /* int switch type */
1259                         H2C_Parameter[1] = 0;
1260                 }
1261                 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1262         }
1263
1264         /*  ext switch setting */
1265         if (bUseExtSwitch) {
1266                 if (bInitHwCfg) {
1267                         /*  0x4c[23]= 0, 0x4c[24]= 1  Antenna control by WL/BT */
1268                         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1269                         u4Tmp &= ~BIT23;
1270                         u4Tmp |= BIT24;
1271                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1272                 }
1273
1274                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); /*  fixed internal switch S1->WiFi, S0->BT */
1275                 switch (antPosType) {
1276                 case BTC_ANT_WIFI_AT_MAIN:
1277                         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); /*  ext switch main at wifi */
1278                         break;
1279                 case BTC_ANT_WIFI_AT_AUX:
1280                         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); /*  ext switch aux at wifi */
1281                         break;
1282                 }
1283         } else { /*  internal switch */
1284                 if (bInitHwCfg) {
1285                         /*  0x4c[23]= 0, 0x4c[24]= 1  Antenna control by WL/BT */
1286                         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1287                         u4Tmp |= BIT23;
1288                         u4Tmp &= ~BIT24;
1289                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1290                 }
1291
1292                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); /* fixed external switch S1->Main, S0->Aux */
1293                 switch (antPosType) {
1294                 case BTC_ANT_WIFI_AT_MAIN:
1295                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); /*  fixed internal switch S1->WiFi, S0->BT */
1296                         break;
1297                 case BTC_ANT_WIFI_AT_AUX:
1298                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); /*  fixed internal switch S0->WiFi, S1->BT */
1299                         break;
1300                 }
1301         }
1302 }
1303
1304 static void halbtc8723b2ant_PsTdma(
1305         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bTurnOn, u8 type
1306 )
1307 {
1308         BTC_PRINT(
1309                 BTC_MSG_ALGORITHM,
1310                 ALGO_TRACE_FW,
1311                 (
1312                         "[BTCoex], %s turn %s PS TDMA, type =%d\n",
1313                         (bForceExec ? "force to" : ""),
1314                         (bTurnOn ? "ON" : "OFF"),
1315                         type
1316                 )
1317         );
1318         pCoexDm->bCurPsTdmaOn = bTurnOn;
1319         pCoexDm->curPsTdma = type;
1320
1321         if (!bForceExec) {
1322                 BTC_PRINT(
1323                         BTC_MSG_ALGORITHM,
1324                         ALGO_TRACE_FW_DETAIL,
1325                         (
1326                                 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1327                                 pCoexDm->bPrePsTdmaOn,
1328                                 pCoexDm->bCurPsTdmaOn
1329                         )
1330                 );
1331                 BTC_PRINT(
1332                         BTC_MSG_ALGORITHM,
1333                         ALGO_TRACE_FW_DETAIL,
1334                         (
1335                                 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1336                                 pCoexDm->prePsTdma, pCoexDm->curPsTdma
1337                         )
1338                 );
1339
1340                 if (
1341                         (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
1342                         (pCoexDm->prePsTdma == pCoexDm->curPsTdma)
1343                 )
1344                         return;
1345         }
1346
1347         if (bTurnOn) {
1348                 switch (type) {
1349                 case 1:
1350                 default:
1351                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1352                         break;
1353                 case 2:
1354                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1355                         break;
1356                 case 3:
1357                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1358                         break;
1359                 case 4:
1360                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
1361                         break;
1362                 case 5:
1363                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1364                         break;
1365                 case 6:
1366                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1367                         break;
1368                 case 7:
1369                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
1370                         break;
1371                 case 8:
1372                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
1373                         break;
1374                 case 9:
1375                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1376                         break;
1377                 case 10:
1378                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1379                         break;
1380                 case 11:
1381                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
1382                         break;
1383                 case 12:
1384                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1385                         break;
1386                 case 13:
1387                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1388                         break;
1389                 case 14:
1390                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1391                         break;
1392                 case 15:
1393                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
1394                         break;
1395                 case 16:
1396                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
1397                         break;
1398                 case 17:
1399                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1400                         break;
1401                 case 18:
1402                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1403                         break;
1404                 case 19:
1405                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1406                         break;
1407                 case 20:
1408                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1409                         break;
1410                 case 21:
1411                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1412                         break;
1413                 case 71:
1414                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1415                         break;
1416                 }
1417         } else {
1418                 /*  disable PS tdma */
1419                 switch (type) {
1420                 case 0:
1421                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1422                         break;
1423                 case 1:
1424                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1425                         break;
1426                 default:
1427                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1428                         break;
1429                 }
1430         }
1431
1432         /*  update pre state */
1433         pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1434         pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1435 }
1436
1437 static void halbtc8723b2ant_CoexAllOff(PBTC_COEXIST pBtCoexist)
1438 {
1439         /*  fw all off */
1440         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1441         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1442         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1443
1444         /*  sw all off */
1445         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1446         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1447
1448         /*  hw all off */
1449         /* pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
1450         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1451 }
1452
1453 static void halbtc8723b2ant_InitCoexDm(PBTC_COEXIST pBtCoexist)
1454 {
1455         /*  force to reset coex mechanism */
1456
1457         halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, false, 1);
1458         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1459         halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
1460
1461         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1462         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1463 }
1464
1465 static void halbtc8723b2ant_ActionBtInquiry(PBTC_COEXIST pBtCoexist)
1466 {
1467         bool bWifiConnected = false;
1468         bool bLowPwrDisable = true;
1469
1470         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1471         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1472
1473         if (bWifiConnected) {
1474                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1475                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 3);
1476         } else {
1477                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1478                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1479         }
1480
1481         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1482         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1483
1484         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1485         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1486
1487         pCoexDm->bNeedRecover0x948 = true;
1488         pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1489
1490         halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, false, false);
1491 }
1492
1493 static bool halbtc8723b2ant_IsCommonAction(PBTC_COEXIST pBtCoexist)
1494 {
1495         u8 btRssiState = BTC_RSSI_STATE_HIGH;
1496         bool bCommon = false, bWifiConnected = false, bWifiBusy = false;
1497         bool bBtHsOn = false, bLowPwrDisable = false;
1498
1499         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1500         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1501         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1502
1503         if (!bWifiConnected) {
1504                 bLowPwrDisable = false;
1505                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1506                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1507
1508                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non-connected idle!!\n"));
1509
1510                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1511                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1512                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1513                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1514                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1515
1516                 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1517                 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1518
1519                 bCommon = true;
1520         } else {
1521                 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) {
1522                         bLowPwrDisable = false;
1523                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1524                         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1525
1526                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
1527
1528                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1529                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1530                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1531                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1532                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1533
1534                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1535                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1536
1537                         bCommon = true;
1538                 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) {
1539                         bLowPwrDisable = true;
1540                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1541
1542                         if (bBtHsOn)
1543                                 return false;
1544
1545                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
1546                         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1547
1548                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1549                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1550                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1551                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1552                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1553
1554                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1555                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1556
1557                         bCommon = true;
1558                 } else {
1559                         bLowPwrDisable = true;
1560                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1561
1562                         if (bWifiBusy) {
1563                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
1564                                 bCommon = false;
1565                         } else {
1566                                 if (bBtHsOn)
1567                                         return false;
1568
1569                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
1570                                 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1571                                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1572
1573                                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1574                                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1575                                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 21);
1576                                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1577
1578                                 if (BTC_RSSI_HIGH(btRssiState))
1579                                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1580                                 else
1581                                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1582
1583                                 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1584                                 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1585                                 bCommon = true;
1586                         }
1587                 }
1588         }
1589
1590         return bCommon;
1591 }
1592
1593 static void halbtc8723b2ant_TdmaDurationAdjust(
1594         PBTC_COEXIST pBtCoexist, bool bScoHid, bool bTxPause, u8 maxInterval
1595 )
1596 {
1597         static s32 up, dn, m, n, WaitCount;
1598         s32 result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1599         u8 retryCount = 0;
1600
1601         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjust()\n"));
1602
1603         if (!pCoexDm->bAutoTdmaAdjust) {
1604                 pCoexDm->bAutoTdmaAdjust = true;
1605                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
1606                 {
1607                         if (bScoHid) {
1608                                 if (bTxPause) {
1609                                         if (maxInterval == 1)
1610                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1611                                         else if (maxInterval == 2)
1612                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1613                                         else if (maxInterval == 3)
1614                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1615                                         else
1616                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1617                                 } else {
1618                                         if (maxInterval == 1)
1619                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1620                                         else if (maxInterval == 2)
1621                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1622                                         else if (maxInterval == 3)
1623                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1624                                         else
1625                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1626                                 }
1627                         } else {
1628                                 if (bTxPause) {
1629                                         if (maxInterval == 1)
1630                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1631                                         else if (maxInterval == 2)
1632                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1633                                         else if (maxInterval == 3)
1634                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1635                                         else
1636                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1637                                 } else {
1638                                         if (maxInterval == 1)
1639                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1640                                         else if (maxInterval == 2)
1641                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1642                                         else if (maxInterval == 3)
1643                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1644                                         else
1645                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1646                                 }
1647                         }
1648                 }
1649                 /*  */
1650                 up = 0;
1651                 dn = 0;
1652                 m = 1;
1653                 n = 3;
1654                 result = 0;
1655                 WaitCount = 0;
1656         } else {
1657                 /* accquire the BT TRx retry count from BT_Info byte2 */
1658                 retryCount = pCoexSta->btRetryCnt;
1659                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount));
1660                 BTC_PRINT(
1661                         BTC_MSG_ALGORITHM,
1662                         ALGO_TRACE_FW_DETAIL,
1663                         (
1664                                 "[BTCoex], up =%d, dn =%d, m =%d, n =%d, WaitCount =%d\n",
1665                                 up, dn, m, n, WaitCount
1666                         )
1667                 );
1668                 result = 0;
1669                 WaitCount++;
1670
1671                 if (retryCount == 0) { /*  no retry in the last 2-second duration */
1672                         up++;
1673                         dn--;
1674
1675                         if (dn <= 0)
1676                                 dn = 0;
1677
1678                         if (up >= n) { /*  if 連續 n 個2秒 retry count為0, 則調寬WiFi duration */
1679                                 WaitCount = 0;
1680                                 n = 3;
1681                                 up = 0;
1682                                 dn = 0;
1683                                 result = 1;
1684                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n"));
1685                         }
1686                 } else if (retryCount <= 3) { /*  <=3 retry in the last 2-second duration */
1687                         up--;
1688                         dn++;
1689
1690                         if (up <= 0)
1691                                 up = 0;
1692
1693                         if (dn == 2) { /*  if 連續 2 個2秒 retry count< 3, 則調窄WiFi duration */
1694                                 if (WaitCount <= 2)
1695                                         m++; /*  避免一直在兩個level中來回 */
1696                                 else
1697                                         m = 1;
1698
1699                                 if (m >= 20) /* m 最大值 = 20 ' 最大120秒 recheck是否調整 WiFi duration. */
1700                                         m = 20;
1701
1702                                 n = 3*m;
1703                                 up = 0;
1704                                 dn = 0;
1705                                 WaitCount = 0;
1706                                 result = -1;
1707                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
1708                         }
1709                 } else { /* retry count > 3, 只要1次 retry count > 3, 則調窄WiFi duration */
1710                         if (WaitCount == 1)
1711                                 m++; /*  避免一直在兩個level中來回 */
1712                         else
1713                                 m = 1;
1714
1715                         if (m >= 20) /* m 最大值 = 20 ' 最大120秒 recheck是否調整 WiFi duration. */
1716                                 m = 20;
1717
1718                         n = 3*m;
1719                         up = 0;
1720                         dn = 0;
1721                         WaitCount = 0;
1722                         result = -1;
1723                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
1724                 }
1725
1726                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], max Interval = %d\n", maxInterval));
1727                 if (maxInterval == 1) {
1728                         if (bTxPause) {
1729                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1730
1731                                 if (pCoexDm->curPsTdma == 71)
1732                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1733                                 else if (pCoexDm->curPsTdma == 1)
1734                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1735                                 else if (pCoexDm->curPsTdma == 2)
1736                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1737                                 else if (pCoexDm->curPsTdma == 3)
1738                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1739                                 else if (pCoexDm->curPsTdma == 4)
1740                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1741
1742                                 if (pCoexDm->curPsTdma == 9)
1743                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1744                                 else if (pCoexDm->curPsTdma == 10)
1745                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1746                                 else if (pCoexDm->curPsTdma == 11)
1747                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1748                                 else if (pCoexDm->curPsTdma == 12)
1749                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1750
1751                                 if (result == -1) {
1752                                         if (pCoexDm->curPsTdma == 5)
1753                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1754                                         else if (pCoexDm->curPsTdma == 6)
1755                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1756                                         else if (pCoexDm->curPsTdma == 7)
1757                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1758                                         else if (pCoexDm->curPsTdma == 13)
1759                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1760                                         else if (pCoexDm->curPsTdma == 14)
1761                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1762                                         else if (pCoexDm->curPsTdma == 15)
1763                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1764                                 } else if (result == 1) {
1765                                         if (pCoexDm->curPsTdma == 8)
1766                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1767                                         else if (pCoexDm->curPsTdma == 7)
1768                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1769                                         else if (pCoexDm->curPsTdma == 6)
1770                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1771                                         else if (pCoexDm->curPsTdma == 16)
1772                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1773                                         else if (pCoexDm->curPsTdma == 15)
1774                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1775                                         else if (pCoexDm->curPsTdma == 14)
1776                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1777                                 }
1778                         } else {
1779                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1780                                 if (pCoexDm->curPsTdma == 5)
1781                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1782                                 else if (pCoexDm->curPsTdma == 6)
1783                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1784                                 else if (pCoexDm->curPsTdma == 7)
1785                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1786                                 else if (pCoexDm->curPsTdma == 8)
1787                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1788
1789                                 if (pCoexDm->curPsTdma == 13)
1790                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1791                                 else if (pCoexDm->curPsTdma == 14)
1792                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1793                                 else if (pCoexDm->curPsTdma == 15)
1794                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1795                                 else if (pCoexDm->curPsTdma == 16)
1796                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1797
1798                                 if (result == -1) {
1799                                         if (pCoexDm->curPsTdma == 71)
1800                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1801                                         else if (pCoexDm->curPsTdma == 1)
1802                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1803                                         else if (pCoexDm->curPsTdma == 2)
1804                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1805                                         else if (pCoexDm->curPsTdma == 3)
1806                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1807                                         else if (pCoexDm->curPsTdma == 9)
1808                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1809                                         else if (pCoexDm->curPsTdma == 10)
1810                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1811                                         else if (pCoexDm->curPsTdma == 11)
1812                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1813                                 } else if (result == 1) {
1814                                         if (pCoexDm->curPsTdma == 4)
1815                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1816                                         else if (pCoexDm->curPsTdma == 3)
1817                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1818                                         else if (pCoexDm->curPsTdma == 2)
1819                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1820                                         else if (pCoexDm->curPsTdma == 1)
1821                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1822                                         else if (pCoexDm->curPsTdma == 12)
1823                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1824                                         else if (pCoexDm->curPsTdma == 11)
1825                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1826                                         else if (pCoexDm->curPsTdma == 10)
1827                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1828                                 }
1829                         }
1830                 } else if (maxInterval == 2) {
1831                         if (bTxPause) {
1832                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1833                                 if (pCoexDm->curPsTdma == 1)
1834                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1835                                 else if (pCoexDm->curPsTdma == 2)
1836                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1837                                 else if (pCoexDm->curPsTdma == 3)
1838                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1839                                 else if (pCoexDm->curPsTdma == 4)
1840                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1841
1842                                 if (pCoexDm->curPsTdma == 9)
1843                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1844                                 else if (pCoexDm->curPsTdma == 10)
1845                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1846                                 else if (pCoexDm->curPsTdma == 11)
1847                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1848                                 else if (pCoexDm->curPsTdma == 12)
1849                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1850
1851                                 if (result == -1) {
1852                                         if (pCoexDm->curPsTdma == 5)
1853                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1854                                         else if (pCoexDm->curPsTdma == 6)
1855                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1856                                         else if (pCoexDm->curPsTdma == 7)
1857                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1858                                         else if (pCoexDm->curPsTdma == 13)
1859                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1860                                         else if (pCoexDm->curPsTdma == 14)
1861                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1862                                         else if (pCoexDm->curPsTdma == 15)
1863                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1864                                 } else if (result == 1) {
1865                                         if (pCoexDm->curPsTdma == 8)
1866                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1867                                         else if (pCoexDm->curPsTdma == 7)
1868                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1869                                         else if (pCoexDm->curPsTdma == 6)
1870                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1871                                         else if (pCoexDm->curPsTdma == 16)
1872                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1873                                         else if (pCoexDm->curPsTdma == 15)
1874                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1875                                         else if (pCoexDm->curPsTdma == 14)
1876                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1877                                 }
1878                         } else {
1879                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1880                                 if (pCoexDm->curPsTdma == 5)
1881                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1882                                 else if (pCoexDm->curPsTdma == 6)
1883                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1884                                 else if (pCoexDm->curPsTdma == 7)
1885                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1886                                 else if (pCoexDm->curPsTdma == 8)
1887                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1888
1889                                 if (pCoexDm->curPsTdma == 13)
1890                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1891                                 else if (pCoexDm->curPsTdma == 14)
1892                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1893                                 else if (pCoexDm->curPsTdma == 15)
1894                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1895                                 else if (pCoexDm->curPsTdma == 16)
1896                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1897
1898                                 if (result == -1) {
1899                                         if (pCoexDm->curPsTdma == 1)
1900                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1901                                         else if (pCoexDm->curPsTdma == 2)
1902                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1903                                         else if (pCoexDm->curPsTdma == 3)
1904                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1905                                         else if (pCoexDm->curPsTdma == 9)
1906                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1907                                         else if (pCoexDm->curPsTdma == 10)
1908                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1909                                         else if (pCoexDm->curPsTdma == 11)
1910                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1911                                 } else if (result == 1) {
1912                                         if (pCoexDm->curPsTdma == 4)
1913                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1914                                         else if (pCoexDm->curPsTdma == 3)
1915                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1916                                         else if (pCoexDm->curPsTdma == 2)
1917                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1918                                         else if (pCoexDm->curPsTdma == 12)
1919                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1920                                         else if (pCoexDm->curPsTdma == 11)
1921                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1922                                         else if (pCoexDm->curPsTdma == 10)
1923                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1924                                 }
1925                         }
1926                 } else if (maxInterval == 3) {
1927                         if (bTxPause) {
1928                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1929                                 if (pCoexDm->curPsTdma == 1)
1930                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1931                                 else if (pCoexDm->curPsTdma == 2)
1932                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1933                                 else if (pCoexDm->curPsTdma == 3)
1934                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1935                                 else if (pCoexDm->curPsTdma == 4)
1936                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1937
1938                                 if (pCoexDm->curPsTdma == 9)
1939                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1940                                 else if (pCoexDm->curPsTdma == 10)
1941                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1942                                 else if (pCoexDm->curPsTdma == 11)
1943                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1944                                 else if (pCoexDm->curPsTdma == 12)
1945                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1946
1947                                 if (result == -1) {
1948                                         if (pCoexDm->curPsTdma == 5)
1949                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1950                                         else if (pCoexDm->curPsTdma == 6)
1951                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1952                                         else if (pCoexDm->curPsTdma == 7)
1953                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1954                                         else if (pCoexDm->curPsTdma == 13)
1955                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1956                                         else if (pCoexDm->curPsTdma == 14)
1957                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1958                                         else if (pCoexDm->curPsTdma == 15)
1959                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1960                                 } else if (result == 1) {
1961                                         if (pCoexDm->curPsTdma == 8)
1962                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1963                                         else if (pCoexDm->curPsTdma == 7)
1964                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1965                                         else if (pCoexDm->curPsTdma == 6)
1966                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1967                                         else if (pCoexDm->curPsTdma == 16)
1968                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1969                                         else if (pCoexDm->curPsTdma == 15)
1970                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1971                                         else if (pCoexDm->curPsTdma == 14)
1972                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1973                                 }
1974                         } else {
1975                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1976                                 if (pCoexDm->curPsTdma == 5)
1977                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1978                                 else if (pCoexDm->curPsTdma == 6)
1979                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1980                                 else if (pCoexDm->curPsTdma == 7)
1981                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1982                                 else if (pCoexDm->curPsTdma == 8)
1983                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1984
1985                                 if (pCoexDm->curPsTdma == 13)
1986                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1987                                 else if (pCoexDm->curPsTdma == 14)
1988                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1989                                 else if (pCoexDm->curPsTdma == 15)
1990                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1991                                 else if (pCoexDm->curPsTdma == 16)
1992                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1993
1994                                 if (result == -1) {
1995                                         if (pCoexDm->curPsTdma == 1)
1996                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1997                                         else if (pCoexDm->curPsTdma == 2)
1998                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1999                                         else if (pCoexDm->curPsTdma == 3)
2000                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
2001                                         else if (pCoexDm->curPsTdma == 9)
2002                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2003                                         else if (pCoexDm->curPsTdma == 10)
2004                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2005                                         else if (pCoexDm->curPsTdma == 11)
2006                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
2007                                 } else if (result == 1) {
2008                                         if (pCoexDm->curPsTdma == 4)
2009                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2010                                         else if (pCoexDm->curPsTdma == 3)
2011                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2012                                         else if (pCoexDm->curPsTdma == 2)
2013                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2014                                         else if (pCoexDm->curPsTdma == 12)
2015                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2016                                         else if (pCoexDm->curPsTdma == 11)
2017                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2018                                         else if (pCoexDm->curPsTdma == 10)
2019                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2020                                 }
2021                         }
2022                 }
2023         }
2024
2025         /*  if current PsTdma not match with the recorded one (when scan, dhcp...), */
2026         /*  then we have to adjust it back to the previous record one. */
2027         if (pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) {
2028                 bool bScan = false, bLink = false, bRoam = false;
2029                 BTC_PRINT(
2030                         BTC_MSG_ALGORITHM,
2031                         ALGO_TRACE_FW_DETAIL,
2032                         (
2033                                 "[BTCoex], PsTdma type mismatch!!!, curPsTdma =%d, recordPsTdma =%d\n",
2034                                 pCoexDm->curPsTdma,
2035                                 pCoexDm->psTdmaDuAdjType
2036                         )
2037                 );
2038
2039                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2040                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
2041                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
2042
2043                 if (!bScan && !bLink && !bRoam)
2044                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, pCoexDm->psTdmaDuAdjType);
2045                 else {
2046                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
2047                 }
2048         }
2049 }
2050
2051 /*  SCO only or SCO+PAN(HS) */
2052 static void halbtc8723b2ant_ActionSco(PBTC_COEXIST pBtCoexist)
2053 {
2054         u8 wifiRssiState, btRssiState;
2055         u32 wifiBw;
2056
2057         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2058         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2059
2060         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2061
2062         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2063
2064         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
2065
2066         if (BTC_RSSI_HIGH(btRssiState))
2067                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2068         else
2069                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2070
2071         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2072
2073         if (BTC_WIFI_BW_LEGACY == wifiBw) /* for SCO quality at 11b/g mode */
2074                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
2075         else  /* for SCO quality & wifi performance balance at 11n mode */
2076                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
2077
2078         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 0); /* for voice quality */
2079
2080         /*  sw mechanism */
2081         if (BTC_WIFI_BW_HT40 == wifiBw) {
2082                 if (
2083                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2084                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2085                 ) {
2086                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2087                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
2088                 } else {
2089                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2090                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
2091                 }
2092         } else {
2093                 if (
2094                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2095                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2096                 ) {
2097                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2098                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
2099                 } else {
2100                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2101                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
2102                 }
2103         }
2104 }
2105
2106
2107 static void halbtc8723b2ant_ActionHid(PBTC_COEXIST pBtCoexist)
2108 {
2109         u8 wifiRssiState, btRssiState;
2110         u32 wifiBw;
2111
2112         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2113         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2114
2115         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2116
2117         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2118
2119         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2120
2121         if (BTC_RSSI_HIGH(btRssiState))
2122                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2123         else
2124                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2125
2126         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2127
2128         if (BTC_WIFI_BW_LEGACY == wifiBw) /* for HID at 11b/g mode */
2129                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2130         else  /* for HID quality & wifi performance balance at 11n mode */
2131                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
2132
2133         if (
2134                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2135                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2136         )
2137                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9);
2138         else
2139                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 13);
2140
2141         /*  sw mechanism */
2142         if (BTC_WIFI_BW_HT40 == wifiBw) {
2143                 if (
2144                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2145                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2146                 ) {
2147                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2148                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2149                 } else {
2150                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2151                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2152                 }
2153         } else {
2154                 if (
2155                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2156                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2157                 ) {
2158                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2159                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2160                 } else {
2161                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2162                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2163                 }
2164         }
2165 }
2166
2167 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2168 static void halbtc8723b2ant_ActionA2dp(PBTC_COEXIST pBtCoexist)
2169 {
2170         u8 wifiRssiState, wifiRssiState1, btRssiState;
2171         u32 wifiBw;
2172         u8 apNum = 0;
2173
2174         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2175         wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);
2176         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2177
2178         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2179
2180         /*  define the office environment */
2181         if (apNum >= 10 && BTC_RSSI_HIGH(wifiRssiState1)) {
2182                 /* DbgPrint(" AP#>10(%d)\n", apNum); */
2183                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2184                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2185                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2186                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2187                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2188                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
2189
2190                 /*  sw mechanism */
2191                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2192                 if (BTC_WIFI_BW_HT40 == wifiBw) {
2193                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2194                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
2195                 } else {
2196                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2197                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
2198                 }
2199                 return;
2200         }
2201
2202         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2203         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2204
2205         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2206
2207         if (BTC_RSSI_HIGH(btRssiState))
2208                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2209         else
2210                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2211
2212         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2213
2214         if (
2215                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2216                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2217         )
2218                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 1);
2219         else
2220                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 1);
2221
2222         /*  sw mechanism */
2223         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2224         if (BTC_WIFI_BW_HT40 == wifiBw) {
2225                 if (
2226                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2227                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2228                 ) {
2229                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2230                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2231                 } else {
2232                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2233                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2234                 }
2235         } else {
2236                 if (
2237                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2238                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2239                 ) {
2240                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2241                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2242                 } else {
2243                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2244                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2245                 }
2246         }
2247 }
2248
2249 static void halbtc8723b2ant_ActionA2dpPanHs(PBTC_COEXIST pBtCoexist)
2250 {
2251         u8 wifiRssiState, btRssiState;
2252         u32 wifiBw;
2253
2254         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2255         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2256
2257         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2258
2259         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2260
2261         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2262
2263         if (BTC_RSSI_HIGH(btRssiState))
2264                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2265         else
2266                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2267
2268         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2269
2270         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 2);
2271
2272         /*  sw mechanism */
2273         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2274         if (BTC_WIFI_BW_HT40 == wifiBw) {
2275                 if (
2276                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2277                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2278                 ) {
2279                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2280                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2281                 } else {
2282                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2283                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2284                 }
2285         } else {
2286                 if (
2287                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2288                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2289                 ) {
2290                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2291                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2292                 } else {
2293                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2294                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2295                 }
2296         }
2297 }
2298
2299 static void halbtc8723b2ant_ActionPanEdr(PBTC_COEXIST pBtCoexist)
2300 {
2301         u8 wifiRssiState, btRssiState;
2302         u32 wifiBw;
2303
2304         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2305         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2306
2307         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2308
2309         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2310
2311         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2312
2313         if (BTC_RSSI_HIGH(btRssiState))
2314                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2315         else
2316                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2317
2318         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
2319
2320         if (
2321                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2322                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2323         )
2324                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 1);
2325         else
2326                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 5);
2327
2328         /*  sw mechanism */
2329         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2330         if (BTC_WIFI_BW_HT40 == wifiBw) {
2331                 if (
2332                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2333                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2334                 ) {
2335                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2336                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2337                 } else {
2338                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2339                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2340                 }
2341         } else {
2342                 if (
2343                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2344                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2345                 ) {
2346                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2347                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2348                 } else {
2349                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2350                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2351                 }
2352         }
2353 }
2354
2355
2356 /* PAN(HS) only */
2357 static void halbtc8723b2ant_ActionPanHs(PBTC_COEXIST pBtCoexist)
2358 {
2359         u8 wifiRssiState, btRssiState;
2360         u32 wifiBw;
2361
2362         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2363         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2364
2365         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2366
2367         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2368
2369         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2370
2371         if (BTC_RSSI_HIGH(btRssiState))
2372                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2373         else
2374                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2375
2376         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2377
2378         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
2379
2380         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2381         if (BTC_WIFI_BW_HT40 == wifiBw) {
2382                 if (
2383                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2384                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2385                 ) {
2386                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2387                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2388                 } else {
2389                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2390                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2391                 }
2392         } else {
2393                 if (
2394                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2395                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2396                 ) {
2397                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2398                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2399                 } else {
2400                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2401                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2402                 }
2403         }
2404 }
2405
2406 /* PAN(EDR)+A2DP */
2407 static void halbtc8723b2ant_ActionPanEdrA2dp(PBTC_COEXIST pBtCoexist)
2408 {
2409         u8 wifiRssiState, btRssiState;
2410         u32 wifiBw;
2411
2412         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2413         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2414
2415         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2416
2417         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2418
2419         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2420
2421         if (BTC_RSSI_HIGH(btRssiState))
2422                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2423         else
2424                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2425
2426         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2427
2428         if (
2429                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2430                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2431         ) {
2432                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
2433                 if (BTC_WIFI_BW_HT40 == wifiBw)
2434                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
2435                 else
2436                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 3);
2437         } else {
2438                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2439                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
2440         }
2441
2442         /*  sw mechanism */
2443         if (BTC_WIFI_BW_HT40 == wifiBw) {
2444                 if (
2445                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2446                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2447                 ) {
2448                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2449                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2450                 } else {
2451                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2452                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2453                 }
2454         } else {
2455                 if (
2456                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2457                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2458                 ) {
2459                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2460                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2461                 } else {
2462                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2463                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2464                 }
2465         }
2466 }
2467
2468 static void halbtc8723b2ant_ActionPanEdrHid(PBTC_COEXIST pBtCoexist)
2469 {
2470         u8 wifiRssiState, btRssiState;
2471         u32 wifiBw;
2472
2473         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2474         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2475         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2476
2477         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2478
2479         if (BTC_RSSI_HIGH(btRssiState))
2480                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2481         else
2482                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2483
2484         if (
2485                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2486                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2487         ) {
2488                 if (BTC_WIFI_BW_HT40 == wifiBw) {
2489                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
2490                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2491                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
2492                 } else {
2493                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2494                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2495                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2496                 }
2497                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2498         } else {
2499                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2500                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2501                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2502                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2503         }
2504
2505         /*  sw mechanism */
2506         if (BTC_WIFI_BW_HT40 == wifiBw) {
2507                 if (
2508                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2509                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2510                 ) {
2511                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2512                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2513                 } else {
2514                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2515                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2516                 }
2517         } else {
2518                 if (
2519                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2520                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2521                 ) {
2522                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2523                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2524                 } else {
2525                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2526                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2527                 }
2528         }
2529 }
2530
2531 /*  HID+A2DP+PAN(EDR) */
2532 static void halbtc8723b2ant_ActionHidA2dpPanEdr(PBTC_COEXIST pBtCoexist)
2533 {
2534         u8 wifiRssiState, btRssiState;
2535         u32 wifiBw;
2536
2537         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2538         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2539
2540         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2541
2542         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2543
2544         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2545
2546         if (BTC_RSSI_HIGH(btRssiState))
2547                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2548         else
2549                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2550
2551         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2552
2553         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2554
2555         if (
2556                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2557                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2558         ) {
2559                 if (BTC_WIFI_BW_HT40 == wifiBw)
2560                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2561                 else
2562                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 3);
2563         } else
2564                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 3);
2565
2566         /*  sw mechanism */
2567         if (BTC_WIFI_BW_HT40 == wifiBw) {
2568                 if (
2569                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2570                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2571                 ) {
2572                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2573                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2574                 } else {
2575                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2576                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2577                 }
2578         } else {
2579                 if (
2580                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2581                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2582                 ) {
2583                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2584                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2585                 } else {
2586                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2587                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2588                 }
2589         }
2590 }
2591
2592 static void halbtc8723b2ant_ActionHidA2dp(PBTC_COEXIST pBtCoexist)
2593 {
2594         u8 wifiRssiState, btRssiState;
2595         u32 wifiBw;
2596         u8 apNum = 0;
2597
2598         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2599         /* btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0); */
2600         btRssiState = halbtc8723b2ant_BtRssiState(3, 29, 37);
2601
2602         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2603
2604         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, true, 0x5);
2605
2606         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2607
2608         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2609         if (BTC_WIFI_BW_LEGACY == wifiBw) {
2610                 if (BTC_RSSI_HIGH(btRssiState))
2611                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2612                 else if (BTC_RSSI_MEDIUM(btRssiState))
2613                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2614                 else
2615                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2616         } else {
2617                 /*  only 802.11N mode we have to dec bt power to 4 degree */
2618                 if (BTC_RSSI_HIGH(btRssiState)) {
2619                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2620                         /*  need to check ap Number of Not */
2621                         if (apNum < 10)
2622                                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
2623                         else
2624                                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2625                 } else if (BTC_RSSI_MEDIUM(btRssiState))
2626                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2627                 else
2628                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2629         }
2630
2631         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2632
2633         if (
2634                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2635                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2636         )
2637                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2638         else
2639                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2640
2641         /*  sw mechanism */
2642         if (BTC_WIFI_BW_HT40 == wifiBw) {
2643                 if (
2644                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2645                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2646                 ) {
2647                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2648                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2649                 } else {
2650                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2651                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2652                 }
2653         } else {
2654                 if (
2655                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2656                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2657                 ) {
2658                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2659                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2660                 } else {
2661                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2662                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2663                 }
2664         }
2665 }
2666
2667 static void halbtc8723b2ant_RunCoexistMechanism(PBTC_COEXIST pBtCoexist)
2668 {
2669         u8 algorithm = 0;
2670
2671         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism() ===>\n"));
2672
2673         if (pBtCoexist->bManualControl) {
2674                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
2675                 return;
2676         }
2677
2678         if (pCoexSta->bUnderIps) {
2679                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under IPS !!!\n"));
2680                 return;
2681         }
2682
2683         algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
2684         if (pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
2685                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under inquiry/page scan !!\n"));
2686                 halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
2687                 return;
2688         } else {
2689                 if (pCoexDm->bNeedRecover0x948) {
2690                         pCoexDm->bNeedRecover0x948 = false;
2691                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
2692                 }
2693         }
2694
2695         pCoexDm->curAlgorithm = algorithm;
2696         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Algorithm = %d\n", pCoexDm->curAlgorithm));
2697
2698         if (halbtc8723b2ant_IsCommonAction(pBtCoexist)) {
2699                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant common.\n"));
2700                 pCoexDm->bAutoTdmaAdjust = false;
2701         } else {
2702                 if (pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) {
2703                         BTC_PRINT(
2704                                 BTC_MSG_ALGORITHM,
2705                                 ALGO_TRACE,
2706                                 (
2707                                         "[BTCoex], preAlgorithm =%d, curAlgorithm =%d\n",
2708                                         pCoexDm->preAlgorithm,
2709                                         pCoexDm->curAlgorithm
2710                                 )
2711                         );
2712                         pCoexDm->bAutoTdmaAdjust = false;
2713                 }
2714
2715
2716                 switch (pCoexDm->curAlgorithm) {
2717                 case BT_8723B_2ANT_COEX_ALGO_SCO:
2718                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
2719                         halbtc8723b2ant_ActionSco(pBtCoexist);
2720                         break;
2721                 case BT_8723B_2ANT_COEX_ALGO_HID:
2722                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
2723                         halbtc8723b2ant_ActionHid(pBtCoexist);
2724                         break;
2725                 case BT_8723B_2ANT_COEX_ALGO_A2DP:
2726                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
2727                         halbtc8723b2ant_ActionA2dp(pBtCoexist);
2728                         break;
2729                 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
2730                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
2731                         halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist);
2732                         break;
2733                 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
2734                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
2735                         halbtc8723b2ant_ActionPanEdr(pBtCoexist);
2736                         break;
2737                 case BT_8723B_2ANT_COEX_ALGO_PANHS:
2738                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
2739                         halbtc8723b2ant_ActionPanHs(pBtCoexist);
2740                         break;
2741                 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
2742                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
2743                         halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist);
2744                         break;
2745                 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
2746                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
2747                         halbtc8723b2ant_ActionPanEdrHid(pBtCoexist);
2748                         break;
2749                 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
2750                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
2751                         halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist);
2752                         break;
2753                 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
2754                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
2755                         halbtc8723b2ant_ActionHidA2dp(pBtCoexist);
2756                         break;
2757                 default:
2758                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
2759                         halbtc8723b2ant_CoexAllOff(pBtCoexist);
2760                         break;
2761                 }
2762                 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
2763         }
2764 }
2765
2766 static void halbtc8723b2ant_WifiOffHwCfg(PBTC_COEXIST pBtCoexist)
2767 {
2768         bool bIsInMpMode = false;
2769         u8 H2C_Parameter[2] = {0};
2770         u32 fwVer = 0;
2771
2772         /*  set wlan_act to low */
2773         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2774
2775         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
2776         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2777         if (fwVer >= 0x180000) {
2778                 /* Use H2C to set GNT_BT to HIGH */
2779                 H2C_Parameter[0] = 1;
2780                 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
2781         } else
2782                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2783
2784         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
2785         if (!bIsInMpMode)
2786                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); /* BT select s0/s1 is controlled by BT */
2787         else
2788                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
2789 }
2790
2791 static void halbtc8723b2ant_InitHwConfig(PBTC_COEXIST pBtCoexist, bool bBackUp)
2792 {
2793         u8 u1Tmp = 0;
2794
2795         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
2796
2797         /*  backup rf 0x1e value */
2798         pCoexDm->btRf0x1eBackup =
2799                 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
2800
2801         /*  0x790[5:0]= 0x5 */
2802         u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
2803         u1Tmp &= 0xc0;
2804         u1Tmp |= 0x5;
2805         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
2806
2807         /* Antenna config */
2808         halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, true, false);
2809
2810         /*  PTA parameter */
2811         halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
2812
2813         /*  Enable counter statistics */
2814         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); /* 0x76e[3] = 1, WLAN_Act control by PTA */
2815         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
2816         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
2817 }
2818
2819 /*  */
2820 /*  work around function start with wa_halbtc8723b2ant_ */
2821 /*  */
2822 /*  */
2823 /*  extern function start with EXhalbtc8723b2ant_ */
2824 /*  */
2825 void EXhalbtc8723b2ant_PowerOnSetting(PBTC_COEXIST pBtCoexist)
2826 {
2827         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
2828         u8 u1Tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
2829         u16 u2Tmp = 0x0;
2830
2831         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
2832
2833         /*  enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
2834         u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
2835         pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
2836
2837         /*  set GRAN_BT = 1 */
2838         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2839         /*  set WLAN_ACT = 0 */
2840         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2841
2842         /*  */
2843         /*  S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
2844         /*  Local setting bit define */
2845         /*      BIT0: "0" for no antenna inverse; "1" for antenna inverse */
2846         /*      BIT1: "0" for internal switch; "1" for external switch */
2847         /*      BIT2: "0" for one antenna; "1" for two antenna */
2848         /*  NOTE: here default all internal switch and 1-antenna ==> BIT1 = 0 and BIT2 = 0 */
2849         if (pBtCoexist->chipInterface == BTC_INTF_USB) {
2850                 /*  fixed at S0 for USB interface */
2851                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2852
2853                 u1Tmp |= 0x1;   /*  antenna inverse */
2854                 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
2855
2856                 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2857         } else {
2858                 /*  for PCIE and SDIO interface, we check efuse 0xc3[6] */
2859                 if (pBoardInfo->singleAntPath == 0) {
2860                         /*  set to S1 */
2861                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280);
2862                         pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
2863                 } else if (pBoardInfo->singleAntPath == 1) {
2864                         /*  set to S0 */
2865                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2866                         u1Tmp |= 0x1;   /*  antenna inverse */
2867                         pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2868                 }
2869
2870                 if (pBtCoexist->chipInterface == BTC_INTF_PCI)
2871                         pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
2872                 else if (pBtCoexist->chipInterface == BTC_INTF_SDIO)
2873                         pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
2874         }
2875 }
2876
2877 void EXhalbtc8723b2ant_InitHwConfig(PBTC_COEXIST pBtCoexist, bool bWifiOnly)
2878 {
2879         halbtc8723b2ant_InitHwConfig(pBtCoexist, true);
2880 }
2881
2882 void EXhalbtc8723b2ant_InitCoexDm(PBTC_COEXIST pBtCoexist)
2883 {
2884         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n"));
2885
2886         halbtc8723b2ant_InitCoexDm(pBtCoexist);
2887 }
2888
2889 void EXhalbtc8723b2ant_DisplayCoexInfo(PBTC_COEXIST pBtCoexist)
2890 {
2891         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
2892         PBTC_STACK_INFO pStackInfo = &pBtCoexist->stackInfo;
2893         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
2894         u8 *cliBuf = pBtCoexist->cliBuf;
2895         u8 u1Tmp[4], i, btInfoExt, psTdmaCase = 0;
2896         u32 u4Tmp[4];
2897         bool bRoam = false, bScan = false, bLink = false, bWifiUnder5G = false;
2898         bool bBtHsOn = false, bWifiBusy = false;
2899         s32 wifiRssi = 0, btHsRssi = 0;
2900         u32 wifiBw, wifiTrafficDir, faOfdm, faCck;
2901         u8 wifiDot11Chnl, wifiHsChnl;
2902         u32 fwVer = 0, btPatchVer = 0;
2903         u8 apNum = 0;
2904
2905         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
2906         CL_PRINTF(cliBuf);
2907
2908         if (pBtCoexist->bManualControl) {
2909                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
2910                 CL_PRINTF(cliBuf);
2911                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
2912                 CL_PRINTF(cliBuf);
2913         }
2914
2915         CL_SPRINTF(
2916                 cliBuf,
2917                 BT_TMP_BUF_SIZE,
2918                 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
2919                 pBoardInfo->pgAntNum,
2920                 pBoardInfo->btdmAntNum
2921         );
2922         CL_PRINTF(cliBuf);
2923
2924         CL_SPRINTF(
2925                 cliBuf,
2926                 BT_TMP_BUF_SIZE,
2927                 "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
2928                 (pStackInfo->bProfileNotified ? "Yes" : "No"),
2929                 pStackInfo->hciVersion
2930         );
2931         CL_PRINTF(cliBuf);
2932
2933         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
2934         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2935         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
2936                 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer);
2937         CL_PRINTF(cliBuf);
2938
2939         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
2940         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
2941         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
2942         CL_SPRINTF(
2943                 cliBuf,
2944                 BT_TMP_BUF_SIZE,
2945                 "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
2946                 wifiDot11Chnl,
2947                 wifiHsChnl,
2948                 bBtHsOn
2949         );
2950         CL_PRINTF(cliBuf);
2951
2952         CL_SPRINTF(
2953                 cliBuf,
2954                 BT_TMP_BUF_SIZE,
2955                 "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
2956                 pCoexDm->wifiChnlInfo[0],
2957                 pCoexDm->wifiChnlInfo[1],
2958                 pCoexDm->wifiChnlInfo[2]
2959         );
2960         CL_PRINTF(cliBuf);
2961
2962         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
2963         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
2964         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2965         CL_SPRINTF(
2966                 cliBuf,
2967                 BT_TMP_BUF_SIZE,
2968                 "\r\n %-35s = %d/ %d/ %d", "Wifi rssi/ HS rssi/ AP#", \
2969                 wifiRssi,
2970                 btHsRssi,
2971                 apNum
2972         );
2973         CL_PRINTF(cliBuf);
2974
2975         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2976         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
2977         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
2978         CL_SPRINTF(
2979                 cliBuf,
2980                 BT_TMP_BUF_SIZE,
2981                 "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
2982                 bLink,
2983                 bRoam,
2984                 bScan
2985         );
2986         CL_PRINTF(cliBuf);
2987
2988         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
2989         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2990         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
2991         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
2992         CL_SPRINTF(
2993                 cliBuf,
2994                 BT_TMP_BUF_SIZE,
2995                 "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
2996                 (bWifiUnder5G ? "5G" : "2.4G"),
2997                 ((BTC_WIFI_BW_LEGACY == wifiBw) ? "Legacy" : (((BTC_WIFI_BW_HT40 == wifiBw) ? "HT40" : "HT20"))),
2998                 ((!bWifiBusy) ? "idle" : ((BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ? "uplink" : "downlink"))
2999         );
3000         CL_PRINTF(cliBuf);
3001
3002         CL_SPRINTF(
3003                 cliBuf,
3004                 BT_TMP_BUF_SIZE,
3005                 "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
3006                 ((pBtCoexist->btInfo.bBtDisabled) ? ("disabled") : ((pCoexSta->bC2hBtInquiryPage) ? ("inquiry/page scan") : ((BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ? "non-connected idle" :
3007                 ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ? "connected-idle" : "busy")))),
3008                 pCoexSta->btRssi,
3009                 pCoexSta->btRetryCnt
3010         );
3011         CL_PRINTF(cliBuf);
3012
3013         CL_SPRINTF(
3014                 cliBuf,
3015                 BT_TMP_BUF_SIZE,
3016                 "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
3017                 pBtLinkInfo->bScoExist,
3018                 pBtLinkInfo->bHidExist,
3019                 pBtLinkInfo->bPanExist,
3020                 pBtLinkInfo->bA2dpExist
3021         );
3022         CL_PRINTF(cliBuf);
3023         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
3024
3025         btInfoExt = pCoexSta->btInfoExt;
3026         CL_SPRINTF(
3027                 cliBuf,
3028                 BT_TMP_BUF_SIZE,
3029                 "\r\n %-35s = %s", "BT Info A2DP rate", \
3030                 (btInfoExt&BIT0) ? "Basic rate" : "EDR rate"
3031         );
3032         CL_PRINTF(cliBuf);
3033
3034         for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
3035                 if (pCoexSta->btInfoC2hCnt[i]) {
3036                         CL_SPRINTF(
3037                                 cliBuf,
3038                                 BT_TMP_BUF_SIZE,
3039                                 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \
3040                                 pCoexSta->btInfoC2h[i][0],
3041                                 pCoexSta->btInfoC2h[i][1],
3042                                 pCoexSta->btInfoC2h[i][2],
3043                                 pCoexSta->btInfoC2h[i][3],
3044                                 pCoexSta->btInfoC2h[i][4],
3045                                 pCoexSta->btInfoC2h[i][5],
3046                                 pCoexSta->btInfoC2h[i][6],
3047                                 pCoexSta->btInfoC2hCnt[i]
3048                         );
3049                         CL_PRINTF(cliBuf);
3050                 }
3051         }
3052
3053         CL_SPRINTF(
3054                 cliBuf,
3055                 BT_TMP_BUF_SIZE,
3056                 "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \
3057                 ((pCoexSta->bUnderIps ? "IPS ON" : "IPS OFF")),
3058                 ((pCoexSta->bUnderLps ? "LPS ON" : "LPS OFF"))
3059         );
3060         CL_PRINTF(cliBuf);
3061         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3062
3063         /*  Sw mechanism */
3064         CL_SPRINTF(
3065                 cliBuf,
3066                 BT_TMP_BUF_SIZE,
3067                 "\r\n %-35s", "============[Sw mechanism]============"
3068         );
3069         CL_PRINTF(cliBuf);
3070         CL_SPRINTF(
3071                 cliBuf,
3072                 BT_TMP_BUF_SIZE,
3073                 "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
3074                 pCoexDm->bCurRfRxLpfShrink,
3075                 pCoexDm->bCurLowPenaltyRa,
3076                 pCoexDm->bLimitedDig
3077         );
3078         CL_PRINTF(cliBuf);
3079         CL_SPRINTF(
3080                 cliBuf,
3081                 BT_TMP_BUF_SIZE,
3082                 "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3083                 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
3084                 pCoexDm->bCurAgcTableEn,
3085                 pCoexDm->bCurAdcBackOff,
3086                 pCoexDm->bCurDacSwingOn,
3087                 pCoexDm->curDacSwingLvl
3088         );
3089         CL_PRINTF(cliBuf);
3090
3091         /*  Fw mechanism */
3092         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
3093         CL_PRINTF(cliBuf);
3094
3095         psTdmaCase = pCoexDm->curPsTdma;
3096         CL_SPRINTF(
3097                 cliBuf,
3098                 BT_TMP_BUF_SIZE,
3099                 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \
3100                 pCoexDm->psTdmaPara[0],
3101                 pCoexDm->psTdmaPara[1],
3102                 pCoexDm->psTdmaPara[2],
3103                 pCoexDm->psTdmaPara[3],
3104                 pCoexDm->psTdmaPara[4],
3105                 psTdmaCase, pCoexDm->bAutoTdmaAdjust
3106         );
3107         CL_PRINTF(cliBuf);
3108
3109         CL_SPRINTF(
3110                 cliBuf,
3111                 BT_TMP_BUF_SIZE,
3112                 "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
3113                 pCoexDm->curBtDecPwrLvl,
3114                 pCoexDm->bCurIgnoreWlanAct
3115         );
3116         CL_PRINTF(cliBuf);
3117
3118         /*  Hw setting */
3119         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
3120         CL_PRINTF(cliBuf);
3121
3122         CL_SPRINTF(
3123                 cliBuf,
3124                 BT_TMP_BUF_SIZE,
3125                 "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
3126                 pCoexDm->btRf0x1eBackup
3127         );
3128         CL_PRINTF(cliBuf);
3129
3130         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
3131         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880);
3132         CL_SPRINTF(
3133                 cliBuf,
3134                 BT_TMP_BUF_SIZE,
3135                 "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \
3136                 u1Tmp[0],
3137                 (u4Tmp[0]&0x3e000000) >> 25
3138         );
3139         CL_PRINTF(cliBuf);
3140
3141
3142         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
3143         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67);
3144         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
3145         CL_SPRINTF(
3146                 cliBuf,
3147                 BT_TMP_BUF_SIZE,
3148                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \
3149                 u4Tmp[0],
3150                 ((u1Tmp[0]&0x20)>>5),
3151                 u1Tmp[1]
3152         );
3153         CL_PRINTF(cliBuf);
3154
3155         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c);
3156         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
3157         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944);
3158         CL_SPRINTF(
3159                 cliBuf,
3160                 BT_TMP_BUF_SIZE,
3161                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \
3162                 u4Tmp[0]&0x3,
3163                 u4Tmp[1]&0xff,
3164                 u4Tmp[2]&0x3
3165         );
3166         CL_PRINTF(cliBuf);
3167
3168
3169         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39);
3170         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
3171         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
3172         u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64);
3173         CL_SPRINTF(
3174                 cliBuf,
3175                 BT_TMP_BUF_SIZE,
3176                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \
3177                 ((u1Tmp[0] & 0x8)>>3),
3178                 u1Tmp[1],
3179                 ((u4Tmp[0]&0x01800000)>>23),
3180                 u1Tmp[2]&0x1
3181         );
3182         CL_PRINTF(cliBuf);
3183
3184         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
3185         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
3186         CL_SPRINTF(
3187                 cliBuf,
3188                 BT_TMP_BUF_SIZE,
3189                 "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
3190                 u4Tmp[0],
3191                 u1Tmp[0]
3192         );
3193         CL_PRINTF(cliBuf);
3194
3195         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
3196         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c);
3197         CL_SPRINTF(
3198                 cliBuf,
3199                 BT_TMP_BUF_SIZE,
3200                 "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \
3201                 u4Tmp[0]&0xff,
3202                 u1Tmp[0]
3203         );
3204         CL_PRINTF(cliBuf);
3205
3206         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0);
3207         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4);
3208         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8);
3209         u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0);
3210
3211         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
3212         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
3213
3214         faOfdm =
3215                 ((u4Tmp[0]&0xffff0000) >> 16) +
3216                 ((u4Tmp[1]&0xffff0000) >> 16) +
3217                 (u4Tmp[1] & 0xffff) +  (u4Tmp[2] & 0xffff) + \
3218                 ((u4Tmp[3]&0xffff0000) >> 16) +
3219                 (u4Tmp[3] & 0xffff);
3220
3221         faCck = (u1Tmp[0] << 8) + u1Tmp[1];
3222
3223         CL_SPRINTF(
3224                 cliBuf,
3225                 BT_TMP_BUF_SIZE,
3226                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \
3227                 u4Tmp[0]&0xffff,
3228                 faOfdm,
3229                 faCck
3230         );
3231         CL_PRINTF(cliBuf);
3232
3233         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
3234         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
3235         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
3236         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
3237         CL_SPRINTF(
3238                 cliBuf,
3239                 BT_TMP_BUF_SIZE,
3240                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
3241                 u4Tmp[0],
3242                 u4Tmp[1],
3243                 u4Tmp[2],
3244                 u1Tmp[0]
3245         );
3246         CL_PRINTF(cliBuf);
3247
3248         CL_SPRINTF(
3249                 cliBuf,
3250                 BT_TMP_BUF_SIZE,
3251                 "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \
3252                 pCoexSta->highPriorityRx,
3253                 pCoexSta->highPriorityTx
3254         );
3255         CL_PRINTF(cliBuf);
3256         CL_SPRINTF(
3257                 cliBuf,
3258                 BT_TMP_BUF_SIZE,
3259                 "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \
3260                 pCoexSta->lowPriorityRx,
3261                 pCoexSta->lowPriorityTx
3262         );
3263         CL_PRINTF(cliBuf);
3264
3265         halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
3266         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
3267 }
3268
3269
3270 void EXhalbtc8723b2ant_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
3271 {
3272         if (BTC_IPS_ENTER == type) {
3273                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n"));
3274                 pCoexSta->bUnderIps = true;
3275                 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
3276                 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
3277                 halbtc8723b2ant_CoexAllOff(pBtCoexist);
3278         } else if (BTC_IPS_LEAVE == type) {
3279                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n"));
3280                 pCoexSta->bUnderIps = false;
3281                 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
3282                 halbtc8723b2ant_InitCoexDm(pBtCoexist);
3283                 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
3284         }
3285 }
3286
3287 void EXhalbtc8723b2ant_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
3288 {
3289         if (BTC_LPS_ENABLE == type) {
3290                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n"));
3291                 pCoexSta->bUnderLps = true;
3292         } else if (BTC_LPS_DISABLE == type) {
3293                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n"));
3294                 pCoexSta->bUnderLps = false;
3295         }
3296 }
3297
3298 void EXhalbtc8723b2ant_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type)
3299 {
3300         if (BTC_SCAN_START == type) {
3301                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n"));
3302         } else if (BTC_SCAN_FINISH == type) {
3303                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n"));
3304         }
3305 }
3306
3307 void EXhalbtc8723b2ant_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 type)
3308 {
3309         if (BTC_ASSOCIATE_START == type) {
3310                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n"));
3311         } else if (BTC_ASSOCIATE_FINISH == type) {
3312                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n"));
3313         }
3314 }
3315
3316 void EXhalbtc8723b2ant_MediaStatusNotify(PBTC_COEXIST pBtCoexist, u8 type)
3317 {
3318         u8 H2C_Parameter[3] = {0};
3319         u32 wifiBw;
3320         u8 wifiCentralChnl;
3321         u8 apNum = 0;
3322
3323         if (BTC_MEDIA_CONNECT == type) {
3324                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n"));
3325         } else {
3326                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n"));
3327         }
3328
3329         /*  only 2.4G we need to inform bt the chnl mask */
3330         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
3331         if ((BTC_MEDIA_CONNECT == type) && (wifiCentralChnl <= 14)) {
3332                 H2C_Parameter[0] = 0x1;
3333                 H2C_Parameter[1] = wifiCentralChnl;
3334                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3335                 if (BTC_WIFI_BW_HT40 == wifiBw)
3336                         H2C_Parameter[2] = 0x30;
3337                 else {
3338                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3339                         if (apNum < 10)
3340                                 H2C_Parameter[2] = 0x30;
3341                         else
3342                                 H2C_Parameter[2] = 0x20;
3343                 }
3344         }
3345
3346         pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
3347         pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
3348         pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
3349
3350         BTC_PRINT(
3351                 BTC_MSG_ALGORITHM,
3352                 ALGO_TRACE_FW_EXEC,
3353                 (
3354                         "[BTCoex], FW write 0x66 = 0x%x\n",
3355                         H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]
3356                 )
3357         );
3358
3359         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
3360 }
3361
3362 void EXhalbtc8723b2ant_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 type)
3363 {
3364         if (type == BTC_PACKET_DHCP) {
3365                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n"));
3366         }
3367 }
3368
3369 void EXhalbtc8723b2ant_BtInfoNotify(
3370         PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length
3371 )
3372 {
3373         u8      btInfo = 0;
3374         u8      i, rspSource = 0;
3375         bool bBtBusy = false, bLimitedDig = false;
3376         bool bWifiConnected = false;
3377
3378         pCoexSta->bC2hBtInfoReqSent = false;
3379
3380         rspSource = tmpBuf[0]&0xf;
3381         if (rspSource >= BT_INFO_SRC_8723B_2ANT_MAX)
3382                 rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
3383
3384         pCoexSta->btInfoC2hCnt[rspSource]++;
3385
3386         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length =%d, hex data =[", rspSource, length));
3387         for (i = 0; i < length; i++) {
3388                 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
3389                 if (i == 1)
3390                         btInfo = tmpBuf[i];
3391
3392                 if (i == length-1) {
3393                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i]));
3394                 } else {
3395                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i]));
3396                 }
3397         }
3398
3399         if (pBtCoexist->bManualControl) {
3400                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"));
3401                 return;
3402         }
3403
3404         if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) {
3405                 pCoexSta->btRetryCnt = pCoexSta->btInfoC2h[rspSource][2]&0xf; /* [3:0] */
3406
3407                 pCoexSta->btRssi = pCoexSta->btInfoC2h[rspSource][3]*2+10;
3408
3409                 pCoexSta->btInfoExt = pCoexSta->btInfoC2h[rspSource][4];
3410
3411                 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40);
3412                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
3413                 if (pCoexSta->bBtTxRxMask) {
3414                         /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
3415                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"));
3416                         pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
3417                 }
3418
3419                 /*  Here we need to resend some wifi info to BT */
3420                 /*  because bt is reset and loss of the info. */
3421                 if ((pCoexSta->btInfoExt & BIT1)) {
3422                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
3423                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
3424
3425                         if (bWifiConnected)
3426                                 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
3427                         else
3428                                 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
3429                 }
3430
3431                 if ((pCoexSta->btInfoExt & BIT3)) {
3432                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
3433                         halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
3434                 } else {
3435                         /*  BT already NOT ignore Wlan active, do nothing here. */
3436                 }
3437         }
3438
3439         /*  check BIT2 first ==> check if bt is under inquiry or page scan */
3440         if (btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE)
3441                 pCoexSta->bC2hBtInquiryPage = true;
3442         else
3443                 pCoexSta->bC2hBtInquiryPage = false;
3444
3445         /*  set link exist status */
3446         if (!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) {
3447                 pCoexSta->bBtLinkExist = false;
3448                 pCoexSta->bPanExist = false;
3449                 pCoexSta->bA2dpExist = false;
3450                 pCoexSta->bHidExist = false;
3451                 pCoexSta->bScoExist = false;
3452         } else { /*  connection exists */
3453                 pCoexSta->bBtLinkExist = true;
3454                 if (btInfo & BT_INFO_8723B_2ANT_B_FTP)
3455                         pCoexSta->bPanExist = true;
3456                 else
3457                         pCoexSta->bPanExist = false;
3458                 if (btInfo & BT_INFO_8723B_2ANT_B_A2DP)
3459                         pCoexSta->bA2dpExist = true;
3460                 else
3461                         pCoexSta->bA2dpExist = false;
3462                 if (btInfo & BT_INFO_8723B_2ANT_B_HID)
3463                         pCoexSta->bHidExist = true;
3464                 else
3465                         pCoexSta->bHidExist = false;
3466                 if (btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO)
3467                         pCoexSta->bScoExist = true;
3468                 else
3469                         pCoexSta->bScoExist = false;
3470         }
3471
3472         halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist);
3473
3474         if (!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) {
3475                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3476                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
3477         } else if (btInfo == BT_INFO_8723B_2ANT_B_CONNECTION)   { /*  connection exists but no busy */
3478                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
3479                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
3480         } else if (
3481                 (btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
3482                 (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY)
3483         ) {
3484                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
3485                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
3486         } else if (btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY) {
3487                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
3488                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
3489         } else {
3490                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX;
3491                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
3492         }
3493
3494         if (
3495                 (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
3496                 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
3497                 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus)
3498         ) {
3499                 bBtBusy = true;
3500                 bLimitedDig = true;
3501         } else {
3502                 bBtBusy = false;
3503                 bLimitedDig = false;
3504         }
3505
3506         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
3507
3508         pCoexDm->bLimitedDig = bLimitedDig;
3509         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
3510
3511         halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
3512 }
3513
3514 void EXhalbtc8723b2ant_HaltNotify(PBTC_COEXIST pBtCoexist)
3515 {
3516         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n"));
3517
3518         halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
3519         pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); /* BT goto standby while GNT_BT 1-->0 */
3520         halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
3521
3522         EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
3523 }
3524
3525 void EXhalbtc8723b2ant_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState)
3526 {
3527         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify\n"));
3528
3529         if (BTC_WIFI_PNP_SLEEP == pnpState) {
3530                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to SLEEP\n"));
3531         } else if (BTC_WIFI_PNP_WAKE_UP == pnpState) {
3532                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to WAKE UP\n"));
3533                 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
3534                 halbtc8723b2ant_InitCoexDm(pBtCoexist);
3535                 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
3536         }
3537 }
3538
3539 void EXhalbtc8723b2ant_Periodical(PBTC_COEXIST pBtCoexist)
3540 {
3541         static u8 disVerInfoCnt;
3542         u32 fwVer = 0, btPatchVer = 0;
3543
3544         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical ===========================\n"));
3545
3546         if (disVerInfoCnt <= 5) {
3547                 disVerInfoCnt += 1;
3548                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
3549                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
3550                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
3551                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \
3552                         GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer));
3553                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
3554         }
3555
3556         if (
3557                 halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) ||
3558                 pCoexDm->bAutoTdmaAdjust
3559         )
3560                 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
3561 }