drivers/staging/pi433/rf69.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * abstraction of the spi interface of HopeRf rf69 radio module
   4  *
   5  * Copyright (C) 2016 Wolf-Entwicklungen
   6  *      Marcus Wolf <linux@wolf-entwicklungen.de>
   7  */
   8
   9 /* enable prosa debug info */
  10 #undef DEBUG
  11 /* enable print of values on reg access */
  12 #undef DEBUG_VALUES
  13 /* enable print of values on fifo access */
  14 #undef DEBUG_FIFO_ACCESS
  15
  16 #include <linux/types.h>
  17 #include <linux/spi/spi.h>
  18
  19 #include "rf69.h"
  20 #include "rf69_registers.h"
  21
  22 #define F_OSC     32000000 /* in Hz */
  23 #define FIFO_SIZE 66       /* in byte */
  24
  25 /*-------------------------------------------------------------------------*/
  26
  27 static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
  28 {
  29         int retval;
  30
  31         retval = spi_w8r8(spi, addr);
  32
  33 #ifdef DEBUG_VALUES
  34         if (retval < 0)
  35                 /*
  36                  * should never happen, since we already checked,
  37                  * that module is connected. Therefore no error
  38                  * handling, just an optional error message...
  39                  */
  40                 dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
  41         else
  42                 dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
  43 #endif
  44
  45         return retval;
  46 }
  47
  48 static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
  49 {
  50         int retval;
  51         char buffer[2];
  52
  53         buffer[0] = addr | WRITE_BIT;
  54         buffer[1] = value;
  55
  56         retval = spi_write(spi, &buffer, 2);
  57
  58 #ifdef DEBUG_VALUES
  59         if (retval < 0)
  60                 /*
  61                  * should never happen, since we already checked,
  62                  * that module is connected. Therefore no error
  63                  * handling, just an optional error message...
  64                  */
  65                 dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
  66         else
  67                 dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
  68 #endif
  69
  70         return retval;
  71 }
  72
  73 /*-------------------------------------------------------------------------*/
  74
  75 static int rf69_set_bit(struct spi_device *spi, u8 reg, u8 mask)
  76 {
  77         u8 tmp;
  78
  79         tmp = rf69_read_reg(spi, reg);
  80         tmp = tmp | mask;
  81         return rf69_write_reg(spi, reg, tmp);
  82 }
  83
  84 static int rf69_clear_bit(struct spi_device *spi, u8 reg, u8 mask)
  85 {
  86         u8 tmp;
  87
  88         tmp = rf69_read_reg(spi, reg);
  89         tmp = tmp & ~mask;
  90         return rf69_write_reg(spi, reg, tmp);
  91 }
  92
  93 static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg,
  94                                       u8 mask, u8 value)
  95 {
  96         u8 tmp;
  97
  98         tmp = rf69_read_reg(spi, reg);
  99         tmp = (tmp & ~mask) | value;
 100         return rf69_write_reg(spi, reg, tmp);
 101 }
 102
 103 /*-------------------------------------------------------------------------*/
 104
 105 int rf69_set_mode(struct spi_device *spi, enum mode mode)
 106 {
 107         static const u8 mode_map[] = {
 108                 [transmit] = OPMODE_MODE_TRANSMIT,
 109                 [receive] = OPMODE_MODE_RECEIVE,
 110                 [synthesizer] = OPMODE_MODE_SYNTHESIZER,
 111                 [standby] = OPMODE_MODE_STANDBY,
 112                 [mode_sleep] = OPMODE_MODE_SLEEP,
 113         };
 114
 115         if (unlikely(mode >= ARRAY_SIZE(mode_map))) {
 116                 dev_dbg(&spi->dev, "set: illegal input param");
 117                 return -EINVAL;
 118         }
 119
 120         return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
 121                                    mode_map[mode]);
 122
 123         /*
 124          * we are using packet mode, so this check is not really needed
 125          * but waiting for mode ready is necessary when going from sleep
 126          * because the FIFO may not be immediately available from previous mode
 127          * while (_mode == RF69_MODE_SLEEP && (READ_REG(REG_IRQFLAGS1) &
 128                   RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
 129          */
 130 }
 131
 132 int rf69_set_data_mode(struct spi_device *spi, u8 data_mode)
 133 {
 134         return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODE,
 135                                    data_mode);
 136 }
 137
 138 int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
 139 {
 140         static const u8 modulation_map[] = {
 141                 [OOK] = DATAMODUL_MODULATION_TYPE_OOK,
 142                 [FSK] = DATAMODUL_MODULATION_TYPE_FSK,
 143         };
 144
 145         if (unlikely(modulation >= ARRAY_SIZE(modulation_map))) {
 146                 dev_dbg(&spi->dev, "set: illegal input param");
 147                 return -EINVAL;
 148         }
 149
 150         return rf69_read_mod_write(spi, REG_DATAMODUL,
 151                                    MASK_DATAMODUL_MODULATION_TYPE,
 152                                    modulation_map[modulation]);
 153 }
 154
 155 static enum modulation rf69_get_modulation(struct spi_device *spi)
 156 {
 157         u8 modulation_reg;
 158
 159         modulation_reg = rf69_read_reg(spi, REG_DATAMODUL);
 160
 161         switch (modulation_reg & MASK_DATAMODUL_MODULATION_TYPE) {
 162         case DATAMODUL_MODULATION_TYPE_OOK:
 163                 return OOK;
 164         case DATAMODUL_MODULATION_TYPE_FSK:
 165                 return FSK;
 166         default:
 167                 return UNDEF;
 168         }
 169 }
 170
 171 int rf69_set_modulation_shaping(struct spi_device *spi,
 172                                 enum mod_shaping mod_shaping)
 173 {
 174         switch (rf69_get_modulation(spi)) {
 175         case FSK:
 176                 switch (mod_shaping) {
 177                 case SHAPING_OFF:
 178                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 179                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 180                                                    DATAMODUL_MODULATION_SHAPE_NONE);
 181                 case SHAPING_1_0:
 182                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 183                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 184                                                    DATAMODUL_MODULATION_SHAPE_1_0);
 185                 case SHAPING_0_5:
 186                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 187                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 188                                                    DATAMODUL_MODULATION_SHAPE_0_5);
 189                 case SHAPING_0_3:
 190                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 191                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 192                                                    DATAMODUL_MODULATION_SHAPE_0_3);
 193                 default:
 194                         dev_dbg(&spi->dev, "set: illegal input param");
 195                         return -EINVAL;
 196                 }
 197         case OOK:
 198                 switch (mod_shaping) {
 199                 case SHAPING_OFF:
 200                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 201                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 202                                                    DATAMODUL_MODULATION_SHAPE_NONE);
 203                 case SHAPING_BR:
 204                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 205                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 206                                                    DATAMODUL_MODULATION_SHAPE_BR);
 207                 case SHAPING_2BR:
 208                         return rf69_read_mod_write(spi, REG_DATAMODUL,
 209                                                    MASK_DATAMODUL_MODULATION_SHAPE,
 210                                                    DATAMODUL_MODULATION_SHAPE_2BR);
 211                 default:
 212                         dev_dbg(&spi->dev, "set: illegal input param");
 213                         return -EINVAL;
 214                 }
 215         default:
 216                 dev_dbg(&spi->dev, "set: modulation undefined");
 217                 return -EINVAL;
 218         }
 219 }
 220
 221 int rf69_set_bit_rate(struct spi_device *spi, u16 bit_rate)
 222 {
 223         int retval;
 224         u32 bit_rate_min;
 225         u32 bit_rate_reg;
 226         u8 msb;
 227         u8 lsb;
 228
 229         // check input value
 230         bit_rate_min = F_OSC / 8388608; // 8388608 = 2^23;
 231         if (bit_rate < bit_rate_min) {
 232                 dev_dbg(&spi->dev, "setBitRate: illegal input param");
 233                 return -EINVAL;
 234         }
 235
 236         // calculate reg settings
 237         bit_rate_reg = (F_OSC / bit_rate);
 238
 239         msb = (bit_rate_reg & 0xff00) >> 8;
 240         lsb = (bit_rate_reg & 0xff);
 241
 242         // transmit to RF 69
 243         retval = rf69_write_reg(spi, REG_BITRATE_MSB, msb);
 244         if (retval)
 245                 return retval;
 246         retval = rf69_write_reg(spi, REG_BITRATE_LSB, lsb);
 247         if (retval)
 248                 return retval;
 249
 250         return 0;
 251 }
 252
 253 int rf69_set_deviation(struct spi_device *spi, u32 deviation)
 254 {
 255         int retval;
 256         u64 f_reg;
 257         u64 f_step;
 258         u8 msb;
 259         u8 lsb;
 260         u64 factor = 1000000; // to improve precision of calculation
 261
 262         // TODO: Dependency to bitrate
 263         if (deviation < 600 || deviation > 500000) {
 264                 dev_dbg(&spi->dev, "set_deviation: illegal input param");
 265                 return -EINVAL;
 266         }
 267
 268         // calculat f step
 269         f_step = F_OSC * factor;
 270         do_div(f_step, 524288); //  524288 = 2^19
 271
 272         // calculate register settings
 273         f_reg = deviation * factor;
 274         do_div(f_reg, f_step);
 275
 276         msb = (f_reg & 0xff00) >> 8;
 277         lsb = (f_reg & 0xff);
 278
 279         // check msb
 280         if (msb & ~FDEVMASB_MASK) {
 281                 dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
 282                 return -EINVAL;
 283         }
 284
 285         // write to chip
 286         retval = rf69_write_reg(spi, REG_FDEV_MSB, msb);
 287         if (retval)
 288                 return retval;
 289         retval = rf69_write_reg(spi, REG_FDEV_LSB, lsb);
 290         if (retval)
 291                 return retval;
 292
 293         return 0;
 294 }
 295
 296 int rf69_set_frequency(struct spi_device *spi, u32 frequency)
 297 {
 298         int retval;
 299         u32 f_max;
 300         u64 f_reg;
 301         u64 f_step;
 302         u8 msb;
 303         u8 mid;
 304         u8 lsb;
 305         u64 factor = 1000000; // to improve precision of calculation
 306
 307         // calculat f step
 308         f_step = F_OSC * factor;
 309         do_div(f_step, 524288); //  524288 = 2^19
 310
 311         // check input value
 312         f_max = div_u64(f_step * 8388608, factor);
 313         if (frequency > f_max) {
 314                 dev_dbg(&spi->dev, "setFrequency: illegal input param");
 315                 return -EINVAL;
 316         }
 317
 318         // calculate reg settings
 319         f_reg = frequency * factor;
 320         do_div(f_reg, f_step);
 321
 322         msb = (f_reg & 0xff0000) >> 16;
 323         mid = (f_reg & 0xff00)   >>  8;
 324         lsb = (f_reg & 0xff);
 325
 326         // write to chip
 327         retval = rf69_write_reg(spi, REG_FRF_MSB, msb);
 328         if (retval)
 329                 return retval;
 330         retval = rf69_write_reg(spi, REG_FRF_MID, mid);
 331         if (retval)
 332                 return retval;
 333         retval = rf69_write_reg(spi, REG_FRF_LSB, lsb);
 334         if (retval)
 335                 return retval;
 336
 337         return 0;
 338 }
 339
 340 int rf69_enable_amplifier(struct spi_device *spi, u8 amplifier_mask)
 341 {
 342         return rf69_set_bit(spi, REG_PALEVEL, amplifier_mask);
 343 }
 344
 345 int rf69_disable_amplifier(struct spi_device *spi, u8 amplifier_mask)
 346 {
 347         return rf69_clear_bit(spi, REG_PALEVEL, amplifier_mask);
 348 }
 349
 350 int rf69_set_output_power_level(struct spi_device *spi, u8 power_level)
 351 {
 352         u8 pa_level, ocp, test_pa1, test_pa2;
 353         bool pa0, pa1, pa2, high_power;
 354         u8 min_power_level;
 355
 356         // check register pa_level
 357         pa_level = rf69_read_reg(spi, REG_PALEVEL);
 358         pa0 = pa_level & MASK_PALEVEL_PA0;
 359         pa1 = pa_level & MASK_PALEVEL_PA1;
 360         pa2 = pa_level & MASK_PALEVEL_PA2;
 361
 362         // check high power mode
 363         ocp = rf69_read_reg(spi, REG_OCP);
 364         test_pa1 = rf69_read_reg(spi, REG_TESTPA1);
 365         test_pa2 = rf69_read_reg(spi, REG_TESTPA2);
 366         high_power = (ocp == 0x0f) && (test_pa1 == 0x5d) && (test_pa2 == 0x7c);
 367
 368         if (pa0 && !pa1 && !pa2) {
 369                 power_level += 18;
 370                 min_power_level = 0;
 371         } else if (!pa0 && pa1 && !pa2) {
 372                 power_level += 18;
 373                 min_power_level = 16;
 374         } else if (!pa0 && pa1 && pa2) {
 375                 if (high_power)
 376                         power_level += 11;
 377                 else
 378                         power_level += 14;
 379                 min_power_level = 16;
 380         } else {
 381                 goto failed;
 382         }
 383
 384         // check input value
 385         if (power_level > 0x1f)
 386                 goto failed;
 387
 388         if (power_level < min_power_level)
 389                 goto failed;
 390
 391         // write value
 392         return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER,
 393                                    power_level);
 394 failed:
 395         dev_dbg(&spi->dev, "set: illegal input param");
 396         return -EINVAL;
 397 }
 398
 399 int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp)
 400 {
 401         static const u8 pa_ramp_map[] = {
 402                 [ramp3400] = PARAMP_3400,
 403                 [ramp2000] = PARAMP_2000,
 404                 [ramp1000] = PARAMP_1000,
 405                 [ramp500] = PARAMP_500,
 406                 [ramp250] = PARAMP_250,
 407                 [ramp125] = PARAMP_125,
 408                 [ramp100] = PARAMP_100,
 409                 [ramp62] = PARAMP_62,
 410                 [ramp50] = PARAMP_50,
 411                 [ramp40] = PARAMP_40,
 412                 [ramp31] = PARAMP_31,
 413                 [ramp25] = PARAMP_25,
 414                 [ramp20] = PARAMP_20,
 415                 [ramp15] = PARAMP_15,
 416                 [ramp10] = PARAMP_10,
 417         };
 418
 419         if (unlikely(pa_ramp >= ARRAY_SIZE(pa_ramp_map))) {
 420                 dev_dbg(&spi->dev, "set: illegal input param");
 421                 return -EINVAL;
 422         }
 423
 424         return rf69_write_reg(spi, REG_PARAMP, pa_ramp_map[pa_ramp]);
 425 }
 426
 427 int rf69_set_antenna_impedance(struct spi_device *spi,
 428                                enum antenna_impedance antenna_impedance)
 429 {
 430         switch (antenna_impedance) {
 431         case fifty_ohm:
 432                 return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
 433         case two_hundred_ohm:
 434                 return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
 435         default:
 436                 dev_dbg(&spi->dev, "set: illegal input param");
 437                 return -EINVAL;
 438         }
 439 }
 440
 441 int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain)
 442 {
 443         static const u8 lna_gain_map[] = {
 444                 [automatic] = LNA_GAIN_AUTO,
 445                 [max] = LNA_GAIN_MAX,
 446                 [max_minus_6] = LNA_GAIN_MAX_MINUS_6,
 447                 [max_minus_12] = LNA_GAIN_MAX_MINUS_12,
 448                 [max_minus_24] = LNA_GAIN_MAX_MINUS_24,
 449                 [max_minus_36] = LNA_GAIN_MAX_MINUS_36,
 450                 [max_minus_48] = LNA_GAIN_MAX_MINUS_48,
 451         };
 452
 453         if (unlikely(lna_gain >= ARRAY_SIZE(lna_gain_map))) {
 454                 dev_dbg(&spi->dev, "set: illegal input param");
 455                 return -EINVAL;
 456         }
 457
 458         return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
 459                                    lna_gain_map[lna_gain]);
 460 }
 461
 462 static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
 463                                      enum mantisse mantisse, u8 exponent)
 464 {
 465         u8 bandwidth;
 466
 467         // check value for mantisse and exponent
 468         if (exponent > 7) {
 469                 dev_dbg(&spi->dev, "set: illegal input param");
 470                 return -EINVAL;
 471         }
 472
 473         if ((mantisse != mantisse16) &&
 474             (mantisse != mantisse20) &&
 475             (mantisse != mantisse24)) {
 476                 dev_dbg(&spi->dev, "set: illegal input param");
 477                 return -EINVAL;
 478         }
 479
 480         // read old value
 481         bandwidth = rf69_read_reg(spi, reg);
 482
 483         // "delete" mantisse and exponent = just keep the DCC setting
 484         bandwidth = bandwidth & MASK_BW_DCC_FREQ;
 485
 486         // add new mantisse
 487         switch (mantisse) {
 488         case mantisse16:
 489                 bandwidth = bandwidth | BW_MANT_16;
 490                 break;
 491         case mantisse20:
 492                 bandwidth = bandwidth | BW_MANT_20;
 493                 break;
 494         case mantisse24:
 495                 bandwidth = bandwidth | BW_MANT_24;
 496                 break;
 497         }
 498
 499         // add new exponent
 500         bandwidth = bandwidth | exponent;
 501
 502         // write back
 503         return rf69_write_reg(spi, reg, bandwidth);
 504 }
 505
 506 int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse,
 507                        u8 exponent)
 508 {
 509         return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
 510 }
 511
 512 int rf69_set_bandwidth_during_afc(struct spi_device *spi,
 513                                   enum mantisse mantisse,
 514                                   u8 exponent)
 515 {
 516         return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
 517 }
 518
 519 int rf69_set_ook_threshold_dec(struct spi_device *spi,
 520                                enum threshold_decrement threshold_decrement)
 521 {
 522         static const u8 td_map[] = {
 523                 [dec_every8th] = OOKPEAK_THRESHDEC_EVERY_8TH,
 524                 [dec_every4th] = OOKPEAK_THRESHDEC_EVERY_4TH,
 525                 [dec_every2nd] = OOKPEAK_THRESHDEC_EVERY_2ND,
 526                 [dec_once] = OOKPEAK_THRESHDEC_ONCE,
 527                 [dec_twice] = OOKPEAK_THRESHDEC_TWICE,
 528                 [dec_4times] = OOKPEAK_THRESHDEC_4_TIMES,
 529                 [dec_8times] = OOKPEAK_THRESHDEC_8_TIMES,
 530                 [dec_16times] = OOKPEAK_THRESHDEC_16_TIMES,
 531         };
 532
 533         if (unlikely(threshold_decrement >= ARRAY_SIZE(td_map))) {
 534                 dev_dbg(&spi->dev, "set: illegal input param");
 535                 return -EINVAL;
 536         }
 537
 538         return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC,
 539                                    td_map[threshold_decrement]);
 540 }
 541
 542 int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
 543 {
 544         u8 mask;
 545         u8 shift;
 546         u8 dio_addr;
 547         u8 dio_value;
 548
 549         switch (dio_number) {
 550         case 0:
 551                 mask = MASK_DIO0;
 552                 shift = SHIFT_DIO0;
 553                 dio_addr = REG_DIOMAPPING1;
 554                 break;
 555         case 1:
 556                 mask = MASK_DIO1;
 557                 shift = SHIFT_DIO1;
 558                 dio_addr = REG_DIOMAPPING1;
 559                 break;
 560         case 2:
 561                 mask = MASK_DIO2;
 562                 shift = SHIFT_DIO2;
 563                 dio_addr = REG_DIOMAPPING1;
 564                 break;
 565         case 3:
 566                 mask = MASK_DIO3;
 567                 shift = SHIFT_DIO3;
 568                 dio_addr = REG_DIOMAPPING1;
 569                 break;
 570         case 4:
 571                 mask = MASK_DIO4;
 572                 shift = SHIFT_DIO4;
 573                 dio_addr = REG_DIOMAPPING2;
 574                 break;
 575         case 5:
 576                 mask = MASK_DIO5;
 577                 shift = SHIFT_DIO5;
 578                 dio_addr = REG_DIOMAPPING2;
 579                 break;
 580         default:
 581         dev_dbg(&spi->dev, "set: illegal input param");
 582                 return -EINVAL;
 583         }
 584
 585         // read reg
 586         dio_value = rf69_read_reg(spi, dio_addr);
 587         // delete old value
 588         dio_value = dio_value & ~mask;
 589         // add new value
 590         dio_value = dio_value | value << shift;
 591         // write back
 592         return rf69_write_reg(spi, dio_addr, dio_value);
 593 }
 594
 595 bool rf69_get_flag(struct spi_device *spi, enum flag flag)
 596 {
 597         switch (flag) {
 598         case mode_switch_completed:
 599                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
 600         case ready_to_receive:
 601                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
 602         case ready_to_send:
 603                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
 604         case pll_locked:
 605                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
 606         case rssi_exceeded_threshold:
 607                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
 608         case timeout:
 609                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
 610         case automode:
 611                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
 612         case sync_address_match:
 613                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
 614         case fifo_full:
 615                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
 616 /*
 617  *      case fifo_not_empty:
 618  *              return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
 619  */
 620         case fifo_empty:
 621                 return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
 622         case fifo_level_below_threshold:
 623                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
 624         case fifo_overrun:
 625                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
 626         case packet_sent:
 627                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
 628         case payload_ready:
 629                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
 630         case crc_ok:
 631                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
 632         case battery_low:
 633                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
 634         default:                         return false;
 635         }
 636 }
 637
 638 int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
 639 {
 640         /* no value check needed - u8 exactly matches register size */
 641
 642         return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
 643 }
 644
 645 int rf69_set_preamble_length(struct spi_device *spi, u16 preamble_length)
 646 {
 647         int retval;
 648         u8 msb, lsb;
 649
 650         /* no value check needed - u16 exactly matches register size */
 651
 652         /* calculate reg settings */
 653         msb = (preamble_length & 0xff00) >> 8;
 654         lsb = (preamble_length & 0xff);
 655
 656         /* transmit to chip */
 657         retval = rf69_write_reg(spi, REG_PREAMBLE_MSB, msb);
 658         if (retval)
 659                 return retval;
 660         return rf69_write_reg(spi, REG_PREAMBLE_LSB, lsb);
 661 }
 662
 663 int rf69_enable_sync(struct spi_device *spi)
 664 {
 665         return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
 666 }
 667
 668 int rf69_disable_sync(struct spi_device *spi)
 669 {
 670         return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
 671 }
 672
 673 int rf69_set_fifo_fill_condition(struct spi_device *spi,
 674                                  enum fifo_fill_condition fifo_fill_condition)
 675 {
 676         switch (fifo_fill_condition) {
 677         case always:
 678                 return rf69_set_bit(spi, REG_SYNC_CONFIG,
 679                                     MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
 680         case after_sync_interrupt:
 681                 return rf69_clear_bit(spi, REG_SYNC_CONFIG,
 682                                       MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
 683         default:
 684                 dev_dbg(&spi->dev, "set: illegal input param");
 685                 return -EINVAL;
 686         }
 687 }
 688
 689 int rf69_set_sync_size(struct spi_device *spi, u8 sync_size)
 690 {
 691         // check input value
 692         if (sync_size > 0x07) {
 693                 dev_dbg(&spi->dev, "set: illegal input param");
 694                 return -EINVAL;
 695         }
 696
 697         // write value
 698         return rf69_read_mod_write(spi, REG_SYNC_CONFIG,
 699                                    MASK_SYNC_CONFIG_SYNC_SIZE,
 700                                    (sync_size << 3));
 701 }
 702
 703 int rf69_set_sync_values(struct spi_device *spi, u8 sync_values[8])
 704 {
 705         int retval = 0;
 706
 707         retval += rf69_write_reg(spi, REG_SYNCVALUE1, sync_values[0]);
 708         retval += rf69_write_reg(spi, REG_SYNCVALUE2, sync_values[1]);
 709         retval += rf69_write_reg(spi, REG_SYNCVALUE3, sync_values[2]);
 710         retval += rf69_write_reg(spi, REG_SYNCVALUE4, sync_values[3]);
 711         retval += rf69_write_reg(spi, REG_SYNCVALUE5, sync_values[4]);
 712         retval += rf69_write_reg(spi, REG_SYNCVALUE6, sync_values[5]);
 713         retval += rf69_write_reg(spi, REG_SYNCVALUE7, sync_values[6]);
 714         retval += rf69_write_reg(spi, REG_SYNCVALUE8, sync_values[7]);
 715
 716         return retval;
 717 }
 718
 719 int rf69_set_packet_format(struct spi_device *spi,
 720                            enum packet_format packet_format)
 721 {
 722         switch (packet_format) {
 723         case packet_length_var:
 724                 return rf69_set_bit(spi, REG_PACKETCONFIG1,
 725                                     MASK_PACKETCONFIG1_PACKET_FORMAT_VARIABLE);
 726         case packet_length_fix:
 727                 return rf69_clear_bit(spi, REG_PACKETCONFIG1,
 728                                       MASK_PACKETCONFIG1_PACKET_FORMAT_VARIABLE);
 729         default:
 730                 dev_dbg(&spi->dev, "set: illegal input param");
 731                 return -EINVAL;
 732         }
 733 }
 734
 735 int rf69_enable_crc(struct spi_device *spi)
 736 {
 737         return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
 738 }
 739
 740 int rf69_disable_crc(struct spi_device *spi)
 741 {
 742         return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
 743 }
 744
 745 int rf69_set_address_filtering(struct spi_device *spi,
 746                                enum address_filtering address_filtering)
 747 {
 748         static const u8 af_map[] = {
 749                 [filtering_off] = PACKETCONFIG1_ADDRESSFILTERING_OFF,
 750                 [node_address] = PACKETCONFIG1_ADDRESSFILTERING_NODE,
 751                 [node_or_broadcast_address] =
 752                         PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST,
 753         };
 754
 755         if (unlikely(address_filtering >= ARRAY_SIZE(af_map))) {
 756                 dev_dbg(&spi->dev, "set: illegal input param");
 757                 return -EINVAL;
 758         }
 759
 760         return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
 761                                    MASK_PACKETCONFIG1_ADDRESSFILTERING,
 762                                    af_map[address_filtering]);
 763 }
 764
 765 int rf69_set_payload_length(struct spi_device *spi, u8 payload_length)
 766 {
 767         return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payload_length);
 768 }
 769
 770 int rf69_set_node_address(struct spi_device *spi, u8 node_address)
 771 {
 772         return rf69_write_reg(spi, REG_NODEADRS, node_address);
 773 }
 774
 775 int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcast_address)
 776 {
 777         return rf69_write_reg(spi, REG_BROADCASTADRS, broadcast_address);
 778 }
 779
 780 int rf69_set_tx_start_condition(struct spi_device *spi,
 781                                 enum tx_start_condition tx_start_condition)
 782 {
 783         switch (tx_start_condition) {
 784         case fifo_level:
 785                 return rf69_clear_bit(spi, REG_FIFO_THRESH,
 786                                       MASK_FIFO_THRESH_TXSTART);
 787         case fifo_not_empty:
 788                 return rf69_set_bit(spi, REG_FIFO_THRESH,
 789                                     MASK_FIFO_THRESH_TXSTART);
 790         default:
 791                 dev_dbg(&spi->dev, "set: illegal input param");
 792                 return -EINVAL;
 793         }
 794 }
 795
 796 int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
 797 {
 798         int retval;
 799
 800         /* check input value */
 801         if (threshold & 0x80) {
 802                 dev_dbg(&spi->dev, "set: illegal input param");
 803                 return -EINVAL;
 804         }
 805
 806         /* write value */
 807         retval = rf69_read_mod_write(spi, REG_FIFO_THRESH,
 808                                      MASK_FIFO_THRESH_VALUE,
 809                                      threshold);
 810         if (retval)
 811                 return retval;
 812
 813         /*
 814          * access the fifo to activate new threshold
 815          * retval (mis-) used as buffer here
 816          */
 817         return rf69_read_fifo(spi, (u8 *)&retval, 1);
 818 }
 819
 820 int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
 821 {
 822         static const u8 dagc_map[] = {
 823                 [normal_mode] = DAGC_NORMAL,
 824                 [improve] = DAGC_IMPROVED_LOWBETA0,
 825                 [improve_for_low_modulation_index] = DAGC_IMPROVED_LOWBETA1,
 826         };
 827
 828         if (unlikely(dagc >= ARRAY_SIZE(dagc_map))) {
 829                 dev_dbg(&spi->dev, "set: illegal input param");
 830                 return -EINVAL;
 831         }
 832
 833         return rf69_write_reg(spi, REG_TESTDAGC, dagc_map[dagc]);
 834 }
 835
 836 /*-------------------------------------------------------------------------*/
 837
 838 int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
 839 {
 840 #ifdef DEBUG_FIFO_ACCESS
 841         int i;
 842 #endif
 843         struct spi_transfer transfer;
 844         u8 local_buffer[FIFO_SIZE + 1];
 845         int retval;
 846
 847         if (size > FIFO_SIZE) {
 848                 dev_dbg(&spi->dev,
 849                         "read fifo: passed in buffer bigger then internal buffer\n");
 850                 return -EMSGSIZE;
 851         }
 852
 853         /* prepare a bidirectional transfer */
 854         local_buffer[0] = REG_FIFO;
 855         memset(&transfer, 0, sizeof(transfer));
 856         transfer.tx_buf = local_buffer;
 857         transfer.rx_buf = local_buffer;
 858         transfer.len    = size + 1;
 859
 860         retval = spi_sync_transfer(spi, &transfer, 1);
 861
 862 #ifdef DEBUG_FIFO_ACCESS
 863         for (i = 0; i < size; i++)
 864                 dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
 865 #endif
 866
 867         memcpy(buffer, &local_buffer[1], size);
 868
 869         return retval;
 870 }
 871
 872 int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
 873 {
 874 #ifdef DEBUG_FIFO_ACCESS
 875         int i;
 876 #endif
 877         u8 local_buffer[FIFO_SIZE + 1];
 878
 879         if (size > FIFO_SIZE) {
 880                 dev_dbg(&spi->dev,
 881                         "read fifo: passed in buffer bigger then internal buffer\n");
 882                 return -EMSGSIZE;
 883         }
 884
 885         local_buffer[0] = REG_FIFO | WRITE_BIT;
 886         memcpy(&local_buffer[1], buffer, size);
 887
 888 #ifdef DEBUG_FIFO_ACCESS
 889         for (i = 0; i < size; i++)
 890                 dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
 891 #endif
 892
 893         return spi_write(spi, local_buffer, size + 1);
 894 }
 895