1 // SPDX-License-Identifier: GPL-2.0
3 * Hantro VPU codec driver
5 * Copyright (C) 2018 Collabora, Ltd.
6 * Copyright 2018 Google LLC.
7 * Tomasz Figa <tfiga@chromium.org>
9 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
10 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
13 #include <linux/clk.h>
14 #include <linux/module.h>
16 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/slab.h>
20 #include <linux/videodev2.h>
21 #include <linux/workqueue.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-vmalloc.h>
27 #include "hantro_v4l2.h"
29 #include "hantro_hw.h"
31 #define DRIVER_NAME "hantro-vpu"
34 module_param_named(debug, hantro_debug, int, 0644);
35 MODULE_PARM_DESC(debug,
36 "Debug level - higher value produces more verbose messages");
38 void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id)
40 struct v4l2_ctrl *ctrl;
42 ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, id);
43 return ctrl ? ctrl->p_cur.p : NULL;
46 dma_addr_t hantro_get_ref(struct vb2_queue *q, u64 ts)
48 struct vb2_buffer *buf;
51 index = vb2_find_timestamp(q, ts, 0);
54 buf = vb2_get_buffer(q, index);
55 return vb2_dma_contig_plane_dma_addr(buf, 0);
59 hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
60 unsigned int bytesused)
64 avail_size = vb2_plane_size(buf, 0) - ctx->vpu_dst_fmt->header_size;
65 if (bytesused > avail_size)
68 * The bounce buffer is only for the JPEG encoder.
69 * TODO: Rework the JPEG encoder to eliminate the need
70 * for a bounce buffer.
72 if (ctx->jpeg_enc.bounce_buffer.cpu) {
73 memcpy(vb2_plane_vaddr(buf, 0) +
74 ctx->vpu_dst_fmt->header_size,
75 ctx->jpeg_enc.bounce_buffer.cpu, bytesused);
77 buf->planes[0].bytesused =
78 ctx->vpu_dst_fmt->header_size + bytesused;
83 hantro_dec_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
84 unsigned int bytesused)
86 /* For decoders set bytesused as per the output picture. */
87 buf->planes[0].bytesused = ctx->dst_fmt.plane_fmt[0].sizeimage;
91 static void hantro_job_finish(struct hantro_dev *vpu,
92 struct hantro_ctx *ctx,
93 unsigned int bytesused,
94 enum vb2_buffer_state result)
96 struct vb2_v4l2_buffer *src, *dst;
99 pm_runtime_mark_last_busy(vpu->dev);
100 pm_runtime_put_autosuspend(vpu->dev);
101 clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks);
103 src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
104 dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
111 src->sequence = ctx->sequence_out++;
112 dst->sequence = ctx->sequence_cap++;
114 ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused);
116 result = VB2_BUF_STATE_ERROR;
118 v4l2_m2m_buf_done(src, result);
119 v4l2_m2m_buf_done(dst, result);
121 v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx);
124 void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused,
125 enum vb2_buffer_state result)
127 struct hantro_ctx *ctx =
128 v4l2_m2m_get_curr_priv(vpu->m2m_dev);
131 * If cancel_delayed_work returns false
132 * the timeout expired. The watchdog is running,
133 * and will take care of finishing the job.
135 if (cancel_delayed_work(&vpu->watchdog_work))
136 hantro_job_finish(vpu, ctx, bytesused, result);
139 void hantro_watchdog(struct work_struct *work)
141 struct hantro_dev *vpu;
142 struct hantro_ctx *ctx;
144 vpu = container_of(to_delayed_work(work),
145 struct hantro_dev, watchdog_work);
146 ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev);
148 vpu_err("frame processing timed out!\n");
149 ctx->codec_ops->reset(ctx);
150 hantro_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR);
154 void hantro_prepare_run(struct hantro_ctx *ctx)
156 struct vb2_v4l2_buffer *src_buf;
158 src_buf = hantro_get_src_buf(ctx);
159 v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
163 void hantro_finish_run(struct hantro_ctx *ctx)
165 struct vb2_v4l2_buffer *src_buf;
167 src_buf = hantro_get_src_buf(ctx);
168 v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
171 /* Kick the watchdog. */
172 schedule_delayed_work(&ctx->dev->watchdog_work,
173 msecs_to_jiffies(2000));
176 static void device_run(void *priv)
178 struct hantro_ctx *ctx = priv;
179 struct vb2_v4l2_buffer *src, *dst;
182 src = hantro_get_src_buf(ctx);
183 dst = hantro_get_dst_buf(ctx);
185 ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks);
188 ret = pm_runtime_get_sync(ctx->dev->dev);
192 v4l2_m2m_buf_copy_metadata(src, dst, true);
194 ctx->codec_ops->run(ctx);
198 hantro_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR);
201 bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx)
203 return ctx->buf_finish == hantro_enc_buf_finish;
206 static struct v4l2_m2m_ops vpu_m2m_ops = {
207 .device_run = device_run,
211 queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
213 struct hantro_ctx *ctx = priv;
216 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
217 src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
218 src_vq->drv_priv = ctx;
219 src_vq->ops = &hantro_queue_ops;
220 src_vq->mem_ops = &vb2_dma_contig_memops;
223 * Driver does mostly sequential access, so sacrifice TLB efficiency
224 * for faster allocation. Also, no CPU access on the source queue,
225 * so no kernel mapping needed.
227 src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES |
228 DMA_ATTR_NO_KERNEL_MAPPING;
229 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
230 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
231 src_vq->lock = &ctx->dev->vpu_mutex;
232 src_vq->dev = ctx->dev->v4l2_dev.dev;
233 src_vq->supports_requests = true;
235 ret = vb2_queue_init(src_vq);
240 * When encoding, the CAPTURE queue doesn't need dma memory,
241 * as the CPU needs to create the JPEG frames, from the
242 * hardware-produced JPEG payload.
244 * For the DMA destination buffer, we use a bounce buffer.
246 if (hantro_is_encoder_ctx(ctx)) {
247 dst_vq->mem_ops = &vb2_vmalloc_memops;
249 dst_vq->bidirectional = true;
250 dst_vq->mem_ops = &vb2_dma_contig_memops;
251 dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES |
252 DMA_ATTR_NO_KERNEL_MAPPING;
255 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
256 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
257 dst_vq->drv_priv = ctx;
258 dst_vq->ops = &hantro_queue_ops;
259 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
260 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
261 dst_vq->lock = &ctx->dev->vpu_mutex;
262 dst_vq->dev = ctx->dev->v4l2_dev.dev;
264 return vb2_queue_init(dst_vq);
267 static int hantro_s_ctrl(struct v4l2_ctrl *ctrl)
269 struct hantro_ctx *ctx;
271 ctx = container_of(ctrl->handler,
272 struct hantro_ctx, ctrl_handler);
274 vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
277 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
278 ctx->jpeg_quality = ctrl->val;
287 static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
288 .s_ctrl = hantro_s_ctrl,
291 static const struct hantro_ctrl controls[] = {
293 .codec = HANTRO_JPEG_ENCODER,
295 .id = V4L2_CID_JPEG_COMPRESSION_QUALITY,
300 .ops = &hantro_ctrl_ops,
303 .codec = HANTRO_MPEG2_DECODER,
305 .id = V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS,
308 .codec = HANTRO_MPEG2_DECODER,
310 .id = V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION,
313 .codec = HANTRO_VP8_DECODER,
315 .id = V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER,
318 .codec = HANTRO_H264_DECODER,
320 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS,
323 .codec = HANTRO_H264_DECODER,
325 .id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS,
328 .codec = HANTRO_H264_DECODER,
330 .id = V4L2_CID_MPEG_VIDEO_H264_SPS,
333 .codec = HANTRO_H264_DECODER,
335 .id = V4L2_CID_MPEG_VIDEO_H264_PPS,
338 .codec = HANTRO_H264_DECODER,
340 .id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX,
343 .codec = HANTRO_H264_DECODER,
345 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE,
346 .min = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
347 .def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
348 .max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
351 .codec = HANTRO_H264_DECODER,
353 .id = V4L2_CID_MPEG_VIDEO_H264_START_CODE,
354 .min = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
355 .def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
356 .max = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
362 static int hantro_ctrls_setup(struct hantro_dev *vpu,
363 struct hantro_ctx *ctx,
366 int i, num_ctrls = ARRAY_SIZE(controls);
368 v4l2_ctrl_handler_init(&ctx->ctrl_handler, num_ctrls);
370 for (i = 0; i < num_ctrls; i++) {
371 if (!(allowed_codecs & controls[i].codec))
374 v4l2_ctrl_new_custom(&ctx->ctrl_handler,
375 &controls[i].cfg, NULL);
376 if (ctx->ctrl_handler.error) {
377 vpu_err("Adding control (%d) failed %d\n",
379 ctx->ctrl_handler.error);
380 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
381 return ctx->ctrl_handler.error;
384 return v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
388 * V4L2 file operations.
391 static int hantro_open(struct file *filp)
393 struct hantro_dev *vpu = video_drvdata(filp);
394 struct video_device *vdev = video_devdata(filp);
395 struct hantro_func *func = hantro_vdev_to_func(vdev);
396 struct hantro_ctx *ctx;
397 int allowed_codecs, ret;
400 * We do not need any extra locking here, because we operate only
401 * on local data here, except reading few fields from dev, which
402 * do not change through device's lifetime (which is guaranteed by
403 * reference on module from open()) and V4L2 internal objects (such
404 * as vdev and ctx->fh), which have proper locking done in respective
405 * helper functions used here.
408 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
413 if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) {
414 allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS;
415 ctx->buf_finish = hantro_enc_buf_finish;
416 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx,
418 } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) {
419 allowed_codecs = vpu->variant->codec & HANTRO_DECODERS;
420 ctx->buf_finish = hantro_dec_buf_finish;
421 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx,
424 ctx->fh.m2m_ctx = ERR_PTR(-ENODEV);
426 if (IS_ERR(ctx->fh.m2m_ctx)) {
427 ret = PTR_ERR(ctx->fh.m2m_ctx);
432 v4l2_fh_init(&ctx->fh, vdev);
433 filp->private_data = &ctx->fh;
434 v4l2_fh_add(&ctx->fh);
436 hantro_reset_fmts(ctx);
438 ret = hantro_ctrls_setup(vpu, ctx, allowed_codecs);
440 vpu_err("Failed to set up controls\n");
443 ctx->fh.ctrl_handler = &ctx->ctrl_handler;
448 v4l2_fh_del(&ctx->fh);
449 v4l2_fh_exit(&ctx->fh);
454 static int hantro_release(struct file *filp)
456 struct hantro_ctx *ctx =
457 container_of(filp->private_data, struct hantro_ctx, fh);
460 * No need for extra locking because this was the last reference
463 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
464 v4l2_fh_del(&ctx->fh);
465 v4l2_fh_exit(&ctx->fh);
466 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
472 static const struct v4l2_file_operations hantro_fops = {
473 .owner = THIS_MODULE,
475 .release = hantro_release,
476 .poll = v4l2_m2m_fop_poll,
477 .unlocked_ioctl = video_ioctl2,
478 .mmap = v4l2_m2m_fop_mmap,
481 static const struct of_device_id of_hantro_match[] = {
482 #ifdef CONFIG_VIDEO_HANTRO_ROCKCHIP
483 { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
484 { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
485 { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
489 MODULE_DEVICE_TABLE(of, of_hantro_match);
491 static int hantro_register_entity(struct media_device *mdev,
492 struct media_entity *entity,
493 const char *entity_name,
494 struct media_pad *pads, int num_pads,
495 int function, struct video_device *vdev)
500 entity->obj_type = MEDIA_ENTITY_TYPE_BASE;
501 if (function == MEDIA_ENT_F_IO_V4L) {
502 entity->info.dev.major = VIDEO_MAJOR;
503 entity->info.dev.minor = vdev->minor;
506 name = devm_kasprintf(mdev->dev, GFP_KERNEL, "%s-%s", vdev->name,
512 entity->function = function;
514 ret = media_entity_pads_init(entity, num_pads, pads);
518 ret = media_device_register_entity(mdev, entity);
525 static int hantro_attach_func(struct hantro_dev *vpu,
526 struct hantro_func *func)
528 struct media_device *mdev = &vpu->mdev;
529 struct media_link *link;
532 /* Create the three encoder entities with their pads */
533 func->source_pad.flags = MEDIA_PAD_FL_SOURCE;
534 ret = hantro_register_entity(mdev, &func->vdev.entity, "source",
535 &func->source_pad, 1, MEDIA_ENT_F_IO_V4L,
540 func->proc_pads[0].flags = MEDIA_PAD_FL_SINK;
541 func->proc_pads[1].flags = MEDIA_PAD_FL_SOURCE;
542 ret = hantro_register_entity(mdev, &func->proc, "proc",
543 func->proc_pads, 2, func->id,
546 goto err_rel_entity0;
548 func->sink_pad.flags = MEDIA_PAD_FL_SINK;
549 ret = hantro_register_entity(mdev, &func->sink, "sink",
550 &func->sink_pad, 1, MEDIA_ENT_F_IO_V4L,
553 goto err_rel_entity1;
555 /* Connect the three entities */
556 ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 0,
557 MEDIA_LNK_FL_IMMUTABLE |
558 MEDIA_LNK_FL_ENABLED);
560 goto err_rel_entity2;
562 ret = media_create_pad_link(&func->proc, 1, &func->sink, 0,
563 MEDIA_LNK_FL_IMMUTABLE |
564 MEDIA_LNK_FL_ENABLED);
568 /* Create video interface */
569 func->intf_devnode = media_devnode_create(mdev, MEDIA_INTF_T_V4L_VIDEO,
572 if (!func->intf_devnode) {
577 /* Connect the two DMA engines to the interface */
578 link = media_create_intf_link(&func->vdev.entity,
579 &func->intf_devnode->intf,
580 MEDIA_LNK_FL_IMMUTABLE |
581 MEDIA_LNK_FL_ENABLED);
587 link = media_create_intf_link(&func->sink, &func->intf_devnode->intf,
588 MEDIA_LNK_FL_IMMUTABLE |
589 MEDIA_LNK_FL_ENABLED);
597 media_devnode_remove(func->intf_devnode);
600 media_entity_remove_links(&func->sink);
603 media_entity_remove_links(&func->proc);
604 media_entity_remove_links(&func->vdev.entity);
607 media_device_unregister_entity(&func->sink);
610 media_device_unregister_entity(&func->proc);
613 media_device_unregister_entity(&func->vdev.entity);
617 static void hantro_detach_func(struct hantro_func *func)
619 media_devnode_remove(func->intf_devnode);
620 media_entity_remove_links(&func->sink);
621 media_entity_remove_links(&func->proc);
622 media_entity_remove_links(&func->vdev.entity);
623 media_device_unregister_entity(&func->sink);
624 media_device_unregister_entity(&func->proc);
625 media_device_unregister_entity(&func->vdev.entity);
628 static int hantro_add_func(struct hantro_dev *vpu, unsigned int funcid)
630 const struct of_device_id *match;
631 struct hantro_func *func;
632 struct video_device *vfd;
635 match = of_match_node(of_hantro_match, vpu->dev->of_node);
636 func = devm_kzalloc(vpu->dev, sizeof(*func), GFP_KERNEL);
638 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n");
645 vfd->fops = &hantro_fops;
646 vfd->release = video_device_release_empty;
647 vfd->lock = &vpu->vpu_mutex;
648 vfd->v4l2_dev = &vpu->v4l2_dev;
649 vfd->vfl_dir = VFL_DIR_M2M;
650 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE;
651 vfd->ioctl_ops = &hantro_ioctl_ops;
652 snprintf(vfd->name, sizeof(vfd->name), "%s-%s", match->compatible,
653 funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER ? "enc" : "dec");
655 if (funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER)
660 video_set_drvdata(vfd, vpu);
662 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
664 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n");
668 ret = hantro_attach_func(vpu, func);
670 v4l2_err(&vpu->v4l2_dev,
671 "Failed to attach functionality to the media device\n");
675 v4l2_info(&vpu->v4l2_dev, "registered %s as /dev/video%d\n", vfd->name,
681 video_unregister_device(vfd);
685 static int hantro_add_enc_func(struct hantro_dev *vpu)
687 if (!vpu->variant->enc_fmts)
690 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER);
693 static int hantro_add_dec_func(struct hantro_dev *vpu)
695 if (!vpu->variant->dec_fmts)
698 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER);
701 static void hantro_remove_func(struct hantro_dev *vpu,
704 struct hantro_func *func;
706 if (funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER)
714 hantro_detach_func(func);
715 video_unregister_device(&func->vdev);
718 static void hantro_remove_enc_func(struct hantro_dev *vpu)
720 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER);
723 static void hantro_remove_dec_func(struct hantro_dev *vpu)
725 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER);
728 static const struct media_device_ops hantro_m2m_media_ops = {
729 .req_validate = vb2_request_validate,
730 .req_queue = v4l2_m2m_request_queue,
733 static int hantro_probe(struct platform_device *pdev)
735 const struct of_device_id *match;
736 struct hantro_dev *vpu;
737 struct resource *res;
741 vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
745 vpu->dev = &pdev->dev;
747 mutex_init(&vpu->vpu_mutex);
748 spin_lock_init(&vpu->irqlock);
750 match = of_match_node(of_hantro_match, pdev->dev.of_node);
751 vpu->variant = match->data;
753 INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog);
755 vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks,
756 sizeof(*vpu->clocks), GFP_KERNEL);
760 for (i = 0; i < vpu->variant->num_clocks; i++)
761 vpu->clocks[i].id = vpu->variant->clk_names[i];
762 ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
767 num_bases = vpu->variant->num_regs ?: 1;
768 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases,
769 sizeof(*vpu->reg_bases), GFP_KERNEL);
773 for (i = 0; i < num_bases; i++) {
774 res = vpu->variant->reg_names ?
775 platform_get_resource_byname(vpu->pdev, IORESOURCE_MEM,
776 vpu->variant->reg_names[i]) :
777 platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
778 vpu->reg_bases[i] = devm_ioremap_resource(vpu->dev, res);
779 if (IS_ERR(vpu->reg_bases[i]))
780 return PTR_ERR(vpu->reg_bases[i]);
782 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset;
783 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset;
785 ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
787 dev_err(vpu->dev, "Could not set DMA coherent mask.\n");
790 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
792 for (i = 0; i < vpu->variant->num_irqs; i++) {
793 const char *irq_name = vpu->variant->irqs[i].name;
796 if (!vpu->variant->irqs[i].handler)
799 irq = platform_get_irq_byname(vpu->pdev, irq_name);
803 ret = devm_request_irq(vpu->dev, irq,
804 vpu->variant->irqs[i].handler, 0,
805 dev_name(vpu->dev), vpu);
807 dev_err(vpu->dev, "Could not request %s IRQ.\n",
813 ret = vpu->variant->init(vpu);
815 dev_err(&pdev->dev, "Failed to init VPU hardware\n");
819 pm_runtime_set_autosuspend_delay(vpu->dev, 100);
820 pm_runtime_use_autosuspend(vpu->dev);
821 pm_runtime_enable(vpu->dev);
823 ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
825 dev_err(&pdev->dev, "Failed to prepare clocks\n");
829 ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
831 dev_err(&pdev->dev, "Failed to register v4l2 device\n");
832 goto err_clk_unprepare;
834 platform_set_drvdata(pdev, vpu);
836 vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
837 if (IS_ERR(vpu->m2m_dev)) {
838 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n");
839 ret = PTR_ERR(vpu->m2m_dev);
843 vpu->mdev.dev = vpu->dev;
844 strscpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model));
845 strscpy(vpu->mdev.bus_info, "platform: " DRIVER_NAME,
846 sizeof(vpu->mdev.model));
847 media_device_init(&vpu->mdev);
848 vpu->mdev.ops = &hantro_m2m_media_ops;
849 vpu->v4l2_dev.mdev = &vpu->mdev;
851 ret = hantro_add_enc_func(vpu);
853 dev_err(&pdev->dev, "Failed to register encoder\n");
857 ret = hantro_add_dec_func(vpu);
859 dev_err(&pdev->dev, "Failed to register decoder\n");
860 goto err_rm_enc_func;
863 ret = media_device_register(&vpu->mdev);
865 v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n");
866 goto err_rm_dec_func;
872 hantro_remove_dec_func(vpu);
874 hantro_remove_enc_func(vpu);
876 media_device_cleanup(&vpu->mdev);
877 v4l2_m2m_release(vpu->m2m_dev);
879 v4l2_device_unregister(&vpu->v4l2_dev);
881 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
882 pm_runtime_dont_use_autosuspend(vpu->dev);
883 pm_runtime_disable(vpu->dev);
887 static int hantro_remove(struct platform_device *pdev)
889 struct hantro_dev *vpu = platform_get_drvdata(pdev);
891 v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name);
893 media_device_unregister(&vpu->mdev);
894 hantro_remove_dec_func(vpu);
895 hantro_remove_enc_func(vpu);
896 media_device_cleanup(&vpu->mdev);
897 v4l2_m2m_release(vpu->m2m_dev);
898 v4l2_device_unregister(&vpu->v4l2_dev);
899 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
900 pm_runtime_dont_use_autosuspend(vpu->dev);
901 pm_runtime_disable(vpu->dev);
906 static int hantro_runtime_resume(struct device *dev)
908 struct hantro_dev *vpu = dev_get_drvdata(dev);
910 if (vpu->variant->runtime_resume)
911 return vpu->variant->runtime_resume(vpu);
917 static const struct dev_pm_ops hantro_pm_ops = {
918 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
919 pm_runtime_force_resume)
920 SET_RUNTIME_PM_OPS(NULL, hantro_runtime_resume, NULL)
923 static struct platform_driver hantro_driver = {
924 .probe = hantro_probe,
925 .remove = hantro_remove,
928 .of_match_table = of_match_ptr(of_hantro_match),
929 .pm = &hantro_pm_ops,
932 module_platform_driver(hantro_driver);
934 MODULE_LICENSE("GPL v2");
935 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");
936 MODULE_AUTHOR("Tomasz Figa <tfiga@chromium.org>");
937 MODULE_AUTHOR("Ezequiel Garcia <ezequiel@collabora.com>");
938 MODULE_DESCRIPTION("Hantro VPU codec driver");