1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Inc
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation version 2.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 * Manjunath Hadli <manjunath.hadli@ti.com>
16 * Prabhakar Lad <prabhakar.lad@ti.com>
19 #include <linux/delay.h>
20 #include "dm365_isif.h"
21 #include "vpfe_mc_capture.h"
23 #define MAX_WIDTH 4096
24 #define MAX_HEIGHT 4096
26 static const unsigned int isif_fmts[] = {
27 MEDIA_BUS_FMT_YUYV8_2X8,
28 MEDIA_BUS_FMT_UYVY8_2X8,
29 MEDIA_BUS_FMT_YUYV8_1X16,
30 MEDIA_BUS_FMT_YUYV10_1X20,
31 MEDIA_BUS_FMT_SGRBG12_1X12,
32 MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8,
33 MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
36 #define ISIF_COLPTN_R_Ye 0x0
37 #define ISIF_COLPTN_Gr_Cy 0x1
38 #define ISIF_COLPTN_Gb_G 0x2
39 #define ISIF_COLPTN_B_Mg 0x3
41 #define ISIF_CCOLP_CP01_0 0
42 #define ISIF_CCOLP_CP03_2 2
43 #define ISIF_CCOLP_CP05_4 4
44 #define ISIF_CCOLP_CP07_6 6
45 #define ISIF_CCOLP_CP11_0 8
46 #define ISIF_CCOLP_CP13_2 10
47 #define ISIF_CCOLP_CP15_4 12
48 #define ISIF_CCOLP_CP17_6 14
50 static const u32 isif_sgrbg_pattern =
51 ISIF_COLPTN_Gr_Cy << ISIF_CCOLP_CP01_0 |
52 ISIF_COLPTN_R_Ye << ISIF_CCOLP_CP03_2 |
53 ISIF_COLPTN_B_Mg << ISIF_CCOLP_CP05_4 |
54 ISIF_COLPTN_Gb_G << ISIF_CCOLP_CP07_6 |
55 ISIF_COLPTN_Gr_Cy << ISIF_CCOLP_CP11_0 |
56 ISIF_COLPTN_R_Ye << ISIF_CCOLP_CP13_2 |
57 ISIF_COLPTN_B_Mg << ISIF_CCOLP_CP15_4 |
58 ISIF_COLPTN_Gb_G << ISIF_CCOLP_CP17_6;
60 static const u32 isif_srggb_pattern =
61 ISIF_COLPTN_R_Ye << ISIF_CCOLP_CP01_0 |
62 ISIF_COLPTN_Gr_Cy << ISIF_CCOLP_CP03_2 |
63 ISIF_COLPTN_Gb_G << ISIF_CCOLP_CP05_4 |
64 ISIF_COLPTN_B_Mg << ISIF_CCOLP_CP07_6 |
65 ISIF_COLPTN_R_Ye << ISIF_CCOLP_CP11_0 |
66 ISIF_COLPTN_Gr_Cy << ISIF_CCOLP_CP13_2 |
67 ISIF_COLPTN_Gb_G << ISIF_CCOLP_CP15_4 |
68 ISIF_COLPTN_B_Mg << ISIF_CCOLP_CP17_6;
70 static inline u32 isif_read(void __iomem *base_addr, u32 offset)
72 return readl(base_addr + offset);
75 static inline void isif_write(void __iomem *base_addr, u32 val, u32 offset)
77 writel(val, base_addr + offset);
80 static inline u32 isif_merge(void __iomem *base_addr, u32 mask, u32 val,
83 u32 new_val = (isif_read(base_addr, offset) & ~mask) | (val & mask);
85 isif_write(base_addr, new_val, offset);
90 static void isif_enable_output_to_sdram(struct vpfe_isif_device *isif, int en)
92 isif_merge(isif->isif_cfg.base_addr, ISIF_SYNCEN_WEN_MASK,
93 en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN);
97 isif_regw_lin_tbl(struct vpfe_isif_device *isif, u32 val, u32 offset, int i)
100 writel(val, isif->isif_cfg.linear_tbl0_addr + offset);
102 writel(val, isif->isif_cfg.linear_tbl1_addr + offset);
105 static void isif_disable_all_modules(struct vpfe_isif_device *isif)
108 isif_write(isif->isif_cfg.base_addr, 0, CLAMPCFG);
110 isif_write(isif->isif_cfg.base_addr, 0, DFCCTL);
112 isif_write(isif->isif_cfg.base_addr, 0, CSCCTL);
113 /* disable linearization */
114 isif_write(isif->isif_cfg.base_addr, 0, LINCFG0);
117 static void isif_enable(struct vpfe_isif_device *isif, int en)
120 /* Before disable isif, disable all ISIF modules */
121 isif_disable_all_modules(isif);
124 * wait for next VD. Assume lowest scan rate is 12 Hz. So
125 * 100 msec delay is good enough
128 isif_merge(isif->isif_cfg.base_addr, ISIF_SYNCEN_VDHDEN_MASK,
133 * ISIF helper functions
136 #define DM365_ISIF_MDFS_OFFSET 15
137 #define DM365_ISIF_MDFS_MASK 0x1
139 /* get field id in isif hardware */
140 enum v4l2_field vpfe_isif_get_fid(struct vpfe_device *vpfe_dev)
142 struct vpfe_isif_device *isif = &vpfe_dev->vpfe_isif;
145 field_status = isif_read(isif->isif_cfg.base_addr, MODESET);
146 return (field_status >> DM365_ISIF_MDFS_OFFSET) &
147 DM365_ISIF_MDFS_MASK;
151 isif_set_pixel_format(struct vpfe_isif_device *isif, unsigned int pixfmt)
153 if (isif->formats[ISIF_PAD_SINK].code == MEDIA_BUS_FMT_SGRBG12_1X12) {
154 if (pixfmt == V4L2_PIX_FMT_SBGGR16)
155 isif->isif_cfg.data_pack = ISIF_PACK_16BIT;
156 else if ((pixfmt == V4L2_PIX_FMT_SGRBG10DPCM8) ||
157 (pixfmt == V4L2_PIX_FMT_SGRBG10ALAW8))
158 isif->isif_cfg.data_pack = ISIF_PACK_8BIT;
162 isif->isif_cfg.bayer.pix_fmt = ISIF_PIXFMT_RAW;
163 isif->isif_cfg.bayer.v4l2_pix_fmt = pixfmt;
165 if (pixfmt == V4L2_PIX_FMT_YUYV)
166 isif->isif_cfg.ycbcr.pix_order = ISIF_PIXORDER_YCBYCR;
167 else if (pixfmt == V4L2_PIX_FMT_UYVY)
168 isif->isif_cfg.ycbcr.pix_order = ISIF_PIXORDER_CBYCRY;
172 isif->isif_cfg.data_pack = ISIF_PACK_8BIT;
173 isif->isif_cfg.ycbcr.v4l2_pix_fmt = pixfmt;
180 isif_set_frame_format(struct vpfe_isif_device *isif,
181 enum isif_frmfmt frm_fmt)
183 if (isif->formats[ISIF_PAD_SINK].code == MEDIA_BUS_FMT_SGRBG12_1X12)
184 isif->isif_cfg.bayer.frm_fmt = frm_fmt;
186 isif->isif_cfg.ycbcr.frm_fmt = frm_fmt;
191 static int isif_set_image_window(struct vpfe_isif_device *isif)
193 struct v4l2_rect *win = &isif->crop;
195 if (isif->formats[ISIF_PAD_SINK].code == MEDIA_BUS_FMT_SGRBG12_1X12) {
196 isif->isif_cfg.bayer.win.top = win->top;
197 isif->isif_cfg.bayer.win.left = win->left;
198 isif->isif_cfg.bayer.win.width = win->width;
199 isif->isif_cfg.bayer.win.height = win->height;
202 isif->isif_cfg.ycbcr.win.top = win->top;
203 isif->isif_cfg.ycbcr.win.left = win->left;
204 isif->isif_cfg.ycbcr.win.width = win->width;
205 isif->isif_cfg.ycbcr.win.height = win->height;
211 isif_set_buftype(struct vpfe_isif_device *isif, enum isif_buftype buf_type)
213 if (isif->formats[ISIF_PAD_SINK].code == MEDIA_BUS_FMT_SGRBG12_1X12)
214 isif->isif_cfg.bayer.buf_type = buf_type;
216 isif->isif_cfg.ycbcr.buf_type = buf_type;
221 /* configure format in isif hardware */
223 isif_config_format(struct vpfe_device *vpfe_dev, unsigned int pad)
225 struct vpfe_isif_device *vpfe_isif = &vpfe_dev->vpfe_isif;
226 enum isif_frmfmt frm_fmt = ISIF_FRMFMT_INTERLACED;
227 struct v4l2_pix_format format;
230 v4l2_fill_pix_format(&format, &vpfe_dev->vpfe_isif.formats[pad]);
231 mbus_to_pix(&vpfe_dev->vpfe_isif.formats[pad], &format);
233 if (isif_set_pixel_format(vpfe_isif, format.pixelformat) < 0) {
234 v4l2_err(&vpfe_dev->v4l2_dev,
235 "Failed to set pixel format in isif\n");
239 /* call for s_crop will override these values */
240 vpfe_isif->crop.left = 0;
241 vpfe_isif->crop.top = 0;
242 vpfe_isif->crop.width = format.width;
243 vpfe_isif->crop.height = format.height;
245 /* configure the image window */
246 isif_set_image_window(vpfe_isif);
248 switch (vpfe_dev->vpfe_isif.formats[pad].field) {
249 case V4L2_FIELD_INTERLACED:
250 /* do nothing, since it is default */
251 ret = isif_set_buftype(vpfe_isif, ISIF_BUFTYPE_FLD_INTERLEAVED);
254 case V4L2_FIELD_NONE:
255 frm_fmt = ISIF_FRMFMT_PROGRESSIVE;
256 /* buffer type only applicable for interlaced scan */
259 case V4L2_FIELD_SEQ_TB:
260 ret = isif_set_buftype(vpfe_isif, ISIF_BUFTYPE_FLD_SEPARATED);
267 /* set the frame format */
269 ret = isif_set_frame_format(vpfe_isif, frm_fmt);
275 * isif_try_format() - Try video format on a pad
276 * @isif: VPFE isif device
277 * @cfg: V4L2 subdev pad config
278 * @fmt: pointer to v4l2 subdev format structure
281 isif_try_format(struct vpfe_isif_device *isif,
282 struct v4l2_subdev_pad_config *cfg,
283 struct v4l2_subdev_format *fmt)
285 unsigned int width = fmt->format.width;
286 unsigned int height = fmt->format.height;
289 for (i = 0; i < ARRAY_SIZE(isif_fmts); i++) {
290 if (fmt->format.code == isif_fmts[i])
294 /* If not found, use YUYV8_2x8 as default */
295 if (i >= ARRAY_SIZE(isif_fmts))
296 fmt->format.code = MEDIA_BUS_FMT_YUYV8_2X8;
298 /* Clamp the size. */
299 fmt->format.width = clamp_t(u32, width, 32, MAX_WIDTH);
300 fmt->format.height = clamp_t(u32, height, 32, MAX_HEIGHT);
302 /* The data formatter truncates the number of horizontal output
303 * pixels to a multiple of 16. To avoid clipping data, allow
304 * callers to request an output size bigger than the input size
305 * up to the nearest multiple of 16.
307 if (fmt->pad == ISIF_PAD_SOURCE)
308 fmt->format.width &= ~15;
312 * vpfe_isif_buffer_isr() - isif module non-progressive buffer scheduling isr
313 * @isif: Pointer to isif subdevice.
315 void vpfe_isif_buffer_isr(struct vpfe_isif_device *isif)
317 struct vpfe_device *vpfe_dev = to_vpfe_device(isif);
318 struct vpfe_video_device *video = &isif->video_out;
319 enum v4l2_field field;
325 field = video->fmt.fmt.pix.field;
327 if (field == V4L2_FIELD_NONE) {
328 /* handle progressive frame capture */
329 if (video->cur_frm != video->next_frm)
330 vpfe_video_process_buffer_complete(video);
334 /* interlaced or TB capture check which field we
337 fid = vpfe_isif_get_fid(vpfe_dev);
339 /* switch the software maintained field id */
340 video->field_id ^= 1;
341 if (fid == video->field_id) {
342 /* we are in-sync here,continue */
345 * One frame is just being captured. If the
346 * next frame is available, release the current
349 if (video->cur_frm != video->next_frm)
350 vpfe_video_process_buffer_complete(video);
352 * based on whether the two fields are stored
353 * interleavely or separately in memory,
354 * reconfigure the ISIF memory address
356 if (field == V4L2_FIELD_SEQ_TB)
357 vpfe_video_schedule_bottom_field(video);
361 * if one field is just being captured configure
362 * the next frame get the next frame from the
363 * empty queue if no frame is available hold on
364 * to the current buffer
366 spin_lock(&video->dma_queue_lock);
367 if (!list_empty(&video->dma_queue) &&
368 video->cur_frm == video->next_frm)
369 vpfe_video_schedule_next_buffer(video);
370 spin_unlock(&video->dma_queue_lock);
371 } else if (fid == 0) {
373 * out of sync. Recover from any hardware out-of-sync.
374 * May loose one frame
376 video->field_id = fid;
381 * vpfe_isif_vidint1_isr() - ISIF module progressive buffer scheduling isr
382 * @isif: Pointer to isif subdevice.
384 void vpfe_isif_vidint1_isr(struct vpfe_isif_device *isif)
386 struct vpfe_video_device *video = &isif->video_out;
391 spin_lock(&video->dma_queue_lock);
392 if (video->fmt.fmt.pix.field == V4L2_FIELD_NONE &&
393 !list_empty(&video->dma_queue) && video->cur_frm == video->next_frm)
394 vpfe_video_schedule_next_buffer(video);
396 spin_unlock(&video->dma_queue_lock);
400 * VPFE video operations
403 static int isif_video_queue(struct vpfe_device *vpfe_dev, unsigned long addr)
405 struct vpfe_isif_device *isif = &vpfe_dev->vpfe_isif;
407 isif_write(isif->isif_cfg.base_addr, (addr >> 21) &
408 ISIF_CADU_BITS, CADU);
409 isif_write(isif->isif_cfg.base_addr, (addr >> 5) &
410 ISIF_CADL_BITS, CADL);
415 static const struct vpfe_video_operations isif_video_ops = {
416 .queue = isif_video_queue,
420 * V4L2 subdev operations
423 /* Parameter operations */
424 static int isif_get_params(struct v4l2_subdev *sd, void *params)
426 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
428 /* only raw module parameters can be set through the IOCTL */
429 if (isif->formats[ISIF_PAD_SINK].code != MEDIA_BUS_FMT_SGRBG12_1X12)
431 memcpy(params, &isif->isif_cfg.bayer.config_params,
432 sizeof(isif->isif_cfg.bayer.config_params));
436 static int isif_validate_df_csc_params(const struct vpfe_isif_df_csc *df_csc)
438 const struct vpfe_isif_color_space_conv *csc;
442 if (!df_csc->df_or_csc) {
443 /* csc configuration */
446 for (i = 0; i < VPFE_ISIF_CSC_NUM_COEFF; i++)
447 if (csc->coeff[i].integer >
448 ISIF_CSC_COEF_INTEG_MASK ||
449 csc->coeff[i].decimal >
450 ISIF_CSC_COEF_DECIMAL_MASK) {
451 pr_err("Invalid CSC coefficients\n");
456 if (df_csc->start_pix > ISIF_DF_CSC_SPH_MASK) {
457 pr_err("Invalid df_csc start pix value\n");
461 if (df_csc->num_pixels > ISIF_DF_NUMPIX) {
462 pr_err("Invalid df_csc num pixels value\n");
466 if (df_csc->start_line > ISIF_DF_CSC_LNH_MASK) {
467 pr_err("Invalid df_csc start_line value\n");
471 if (df_csc->num_lines > ISIF_DF_NUMLINES) {
472 pr_err("Invalid df_csc num_lines value\n");
479 #define DM365_ISIF_MAX_VDFLSFT 4
480 #define DM365_ISIF_MAX_VDFSLV 4095
481 #define DM365_ISIF_MAX_DFCMEM0 0x1fff
482 #define DM365_ISIF_MAX_DFCMEM1 0x1fff
484 static int isif_validate_dfc_params(const struct vpfe_isif_dfc *dfc)
492 if (dfc->corr_whole_line > 1) {
493 pr_err("Invalid corr_whole_line value\n");
497 if (dfc->def_level_shift > DM365_ISIF_MAX_VDFLSFT) {
498 pr_err("Invalid def_level_shift value\n");
502 if (dfc->def_sat_level > DM365_ISIF_MAX_VDFSLV) {
503 pr_err("Invalid def_sat_level value\n");
507 if (!dfc->num_vdefects ||
508 dfc->num_vdefects > VPFE_ISIF_VDFC_TABLE_SIZE) {
509 pr_err("Invalid num_vdefects value\n");
513 for (i = 0; i < VPFE_ISIF_VDFC_TABLE_SIZE; i++) {
514 if (dfc->table[i].pos_vert > DM365_ISIF_MAX_DFCMEM0) {
515 pr_err("Invalid pos_vert value\n");
518 if (dfc->table[i].pos_horz > DM365_ISIF_MAX_DFCMEM1) {
519 pr_err("Invalid pos_horz value\n");
527 #define DM365_ISIF_MAX_CLVRV 0xfff
528 #define DM365_ISIF_MAX_CLDC 0x1fff
529 #define DM365_ISIF_MAX_CLHSH 0x1fff
530 #define DM365_ISIF_MAX_CLHSV 0x1fff
531 #define DM365_ISIF_MAX_CLVSH 0x1fff
532 #define DM365_ISIF_MAX_CLVSV 0x1fff
533 #define DM365_ISIF_MAX_HEIGHT_BLACK_REGION 0x1fff
535 static int isif_validate_bclamp_params(const struct vpfe_isif_black_clamp *bclamp)
539 if (bclamp->dc_offset > DM365_ISIF_MAX_CLDC) {
540 pr_err("Invalid bclamp dc_offset value\n");
545 if (bclamp->horz.clamp_pix_limit > 1) {
546 pr_err("Invalid bclamp horz clamp_pix_limit value\n");
549 if (bclamp->horz.win_count_calc < 1 ||
550 bclamp->horz.win_count_calc > 32) {
551 pr_err("Invalid bclamp horz win_count_calc value\n");
554 if (bclamp->horz.win_start_h_calc > DM365_ISIF_MAX_CLHSH) {
555 pr_err("Invalid bclamp win_start_v_calc value\n");
559 if (bclamp->horz.win_start_v_calc > DM365_ISIF_MAX_CLHSV) {
560 pr_err("Invalid bclamp win_start_v_calc value\n");
563 if (bclamp->vert.reset_clamp_val > DM365_ISIF_MAX_CLVRV) {
564 pr_err("Invalid bclamp reset_clamp_val value\n");
567 if (bclamp->vert.ob_v_sz_calc > DM365_ISIF_MAX_HEIGHT_BLACK_REGION) {
568 pr_err("Invalid bclamp ob_v_sz_calc value\n");
571 if (bclamp->vert.ob_start_h > DM365_ISIF_MAX_CLVSH) {
572 pr_err("Invalid bclamp ob_start_h value\n");
575 if (bclamp->vert.ob_start_v > DM365_ISIF_MAX_CLVSV) {
576 pr_err("Invalid bclamp ob_start_h value\n");
583 isif_validate_raw_params(const struct vpfe_isif_raw_config *params)
587 ret = isif_validate_df_csc_params(¶ms->df_csc);
590 ret = isif_validate_dfc_params(¶ms->dfc);
593 return isif_validate_bclamp_params(¶ms->bclamp);
596 static int isif_set_params(struct v4l2_subdev *sd, const struct vpfe_isif_raw_config *params)
598 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
601 /* only raw module parameters can be set through the IOCTL */
602 if (isif->formats[ISIF_PAD_SINK].code != MEDIA_BUS_FMT_SGRBG12_1X12)
605 if (!isif_validate_raw_params(params)) {
606 memcpy(&isif->isif_cfg.bayer.config_params, params,
613 * isif_ioctl() - isif module private ioctl's
614 * @sd: VPFE isif V4L2 subdevice
615 * @cmd: ioctl command
616 * @arg: ioctl argument
618 * Return 0 on success or a negative error code otherwise.
620 static long isif_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
623 case VIDIOC_VPFE_ISIF_S_RAW_PARAMS:
624 return isif_set_params(sd, arg);
626 case VIDIOC_VPFE_ISIF_G_RAW_PARAMS:
627 return isif_get_params(sd, arg);
634 static void isif_config_gain_offset(struct vpfe_isif_device *isif)
636 struct vpfe_isif_gain_offsets_adj *gain_off_ptr =
637 &isif->isif_cfg.bayer.config_params.gain_offset;
638 void __iomem *base = isif->isif_cfg.base_addr;
641 val = ((gain_off_ptr->gain_sdram_en & 1) << GAIN_SDRAM_EN_SHIFT) |
642 ((gain_off_ptr->gain_ipipe_en & 1) << GAIN_IPIPE_EN_SHIFT) |
643 ((gain_off_ptr->gain_h3a_en & 1) << GAIN_H3A_EN_SHIFT) |
644 ((gain_off_ptr->offset_sdram_en & 1) << OFST_SDRAM_EN_SHIFT) |
645 ((gain_off_ptr->offset_ipipe_en & 1) << OFST_IPIPE_EN_SHIFT) |
646 ((gain_off_ptr->offset_h3a_en & 1) << OFST_H3A_EN_SHIFT);
647 isif_merge(base, GAIN_OFFSET_EN_MASK, val, CGAMMAWD);
649 isif_write(base, isif->isif_cfg.isif_gain_params.cr_gain, CRGAIN);
650 isif_write(base, isif->isif_cfg.isif_gain_params.cgr_gain, CGRGAIN);
651 isif_write(base, isif->isif_cfg.isif_gain_params.cgb_gain, CGBGAIN);
652 isif_write(base, isif->isif_cfg.isif_gain_params.cb_gain, CBGAIN);
653 isif_write(base, isif->isif_cfg.isif_gain_params.offset & OFFSET_MASK,
658 static void isif_config_bclamp(struct vpfe_isif_device *isif,
659 struct vpfe_isif_black_clamp *bc)
664 * DC Offset is always added to image data irrespective of bc enable
667 val = bc->dc_offset & ISIF_BC_DCOFFSET_MASK;
668 isif_write(isif->isif_cfg.base_addr, val, CLDCOFST);
673 val = (bc->bc_mode_color & ISIF_BC_MODE_COLOR_MASK) <<
674 ISIF_BC_MODE_COLOR_SHIFT;
676 /* Enable BC and horizontal clamp calculation parameters */
677 val = val | 1 | ((bc->horz.mode & ISIF_HORZ_BC_MODE_MASK) <<
678 ISIF_HORZ_BC_MODE_SHIFT);
680 isif_write(isif->isif_cfg.base_addr, val, CLAMPCFG);
682 if (bc->horz.mode != VPFE_ISIF_HORZ_BC_DISABLE) {
684 * Window count for calculation
685 * Base window selection
687 * Horizontal size of window
688 * vertical size of the window
689 * Horizontal start position of the window
690 * Vertical start position of the window
692 val = (bc->horz.win_count_calc & ISIF_HORZ_BC_WIN_COUNT_MASK) |
693 ((bc->horz.base_win_sel_calc & 1) <<
694 ISIF_HORZ_BC_WIN_SEL_SHIFT) |
695 ((bc->horz.clamp_pix_limit & 1) <<
696 ISIF_HORZ_BC_PIX_LIMIT_SHIFT) |
697 ((bc->horz.win_h_sz_calc &
698 ISIF_HORZ_BC_WIN_H_SIZE_MASK) <<
699 ISIF_HORZ_BC_WIN_H_SIZE_SHIFT) |
700 ((bc->horz.win_v_sz_calc &
701 ISIF_HORZ_BC_WIN_V_SIZE_MASK) <<
702 ISIF_HORZ_BC_WIN_V_SIZE_SHIFT);
704 isif_write(isif->isif_cfg.base_addr, val, CLHWIN0);
706 val = bc->horz.win_start_h_calc & ISIF_HORZ_BC_WIN_START_H_MASK;
707 isif_write(isif->isif_cfg.base_addr, val, CLHWIN1);
709 val = bc->horz.win_start_v_calc & ISIF_HORZ_BC_WIN_START_V_MASK;
710 isif_write(isif->isif_cfg.base_addr, val, CLHWIN2);
713 /* vertical clamp calculation parameters */
715 val = bc->vert.ob_h_sz_calc & ISIF_VERT_BC_OB_H_SZ_MASK;
717 /* Reset clamp value sel for previous line */
718 val |= (bc->vert.reset_val_sel & ISIF_VERT_BC_RST_VAL_SEL_MASK) <<
719 ISIF_VERT_BC_RST_VAL_SEL_SHIFT;
721 /* Line average coefficient */
722 val |= bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT;
723 isif_write(isif->isif_cfg.base_addr, val, CLVWIN0);
725 /* Configured reset value */
726 if (bc->vert.reset_val_sel == VPFE_ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL) {
727 val = bc->vert.reset_clamp_val & ISIF_VERT_BC_RST_VAL_MASK;
728 isif_write(isif->isif_cfg.base_addr, val, CLVRV);
731 /* Optical Black horizontal start position */
732 val = bc->vert.ob_start_h & ISIF_VERT_BC_OB_START_HORZ_MASK;
733 isif_write(isif->isif_cfg.base_addr, val, CLVWIN1);
735 /* Optical Black vertical start position */
736 val = bc->vert.ob_start_v & ISIF_VERT_BC_OB_START_VERT_MASK;
737 isif_write(isif->isif_cfg.base_addr, val, CLVWIN2);
739 val = bc->vert.ob_v_sz_calc & ISIF_VERT_BC_OB_VERT_SZ_MASK;
740 isif_write(isif->isif_cfg.base_addr, val, CLVWIN3);
742 /* Vertical start position for BC subtraction */
743 val = bc->vert_start_sub & ISIF_BC_VERT_START_SUB_V_MASK;
744 isif_write(isif->isif_cfg.base_addr, val, CLSV);
747 /* This function will configure the window size to be capture in ISIF reg */
749 isif_setwin(struct vpfe_isif_device *isif, struct v4l2_rect *image_win,
750 enum isif_frmfmt frm_fmt, int ppc, int mode)
759 * ppc - per pixel count. indicates how many pixels per cell
760 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
761 * raw capture this is 1
763 horz_start = image_win->left << (ppc - 1);
764 horz_nr_pixels = (image_win->width << (ppc - 1)) - 1;
766 /* Writing the horizontal info into the registers */
767 isif_write(isif->isif_cfg.base_addr,
768 horz_start & START_PX_HOR_MASK, SPH);
769 isif_write(isif->isif_cfg.base_addr,
770 horz_nr_pixels & NUM_PX_HOR_MASK, LNH);
771 vert_start = image_win->top;
773 if (frm_fmt == ISIF_FRMFMT_INTERLACED) {
774 vert_nr_lines = (image_win->height >> 1) - 1;
776 /* To account for VD since line 0 doesn't have any data */
779 /* To account for VD since line 0 doesn't have any data */
781 vert_nr_lines = image_win->height - 1;
782 /* configure VDINT0 and VDINT1 */
783 mid_img = vert_start + (image_win->height / 2);
784 isif_write(isif->isif_cfg.base_addr, mid_img, VDINT1);
788 isif_write(isif->isif_cfg.base_addr, 0, VDINT0);
790 isif_write(isif->isif_cfg.base_addr, vert_nr_lines, VDINT0);
791 isif_write(isif->isif_cfg.base_addr,
792 vert_start & START_VER_ONE_MASK, SLV0);
793 isif_write(isif->isif_cfg.base_addr,
794 vert_start & START_VER_TWO_MASK, SLV1);
795 isif_write(isif->isif_cfg.base_addr,
796 vert_nr_lines & NUM_LINES_VER, LNV);
799 #define DM365_ISIF_DFCMWR_MEMORY_WRITE 1
800 #define DM365_ISIF_DFCMRD_MEMORY_READ 0x2
803 isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
805 #define DFC_WRITE_WAIT_COUNT 1000
806 u32 count = DFC_WRITE_WAIT_COUNT;
813 /* Correction mode */
814 val = (vdfc->corr_mode & ISIF_VDFC_CORR_MOD_MASK) <<
815 ISIF_VDFC_CORR_MOD_SHIFT;
817 /* Correct whole line or partial */
818 if (vdfc->corr_whole_line)
819 val |= BIT(ISIF_VDFC_CORR_WHOLE_LN_SHIFT);
821 /* level shift value */
822 val |= (vdfc->def_level_shift & ISIF_VDFC_LEVEL_SHFT_MASK) <<
823 ISIF_VDFC_LEVEL_SHFT_SHIFT;
825 isif_write(isif->isif_cfg.base_addr, val, DFCCTL);
827 /* Defect saturation level */
828 val = vdfc->def_sat_level & ISIF_VDFC_SAT_LEVEL_MASK;
829 isif_write(isif->isif_cfg.base_addr, val, VDFSATLV);
831 isif_write(isif->isif_cfg.base_addr, vdfc->table[0].pos_vert &
832 ISIF_VDFC_POS_MASK, DFCMEM0);
833 isif_write(isif->isif_cfg.base_addr, vdfc->table[0].pos_horz &
834 ISIF_VDFC_POS_MASK, DFCMEM1);
835 if (vdfc->corr_mode == VPFE_ISIF_VDFC_NORMAL ||
836 vdfc->corr_mode == VPFE_ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
837 isif_write(isif->isif_cfg.base_addr,
838 vdfc->table[0].level_at_pos, DFCMEM2);
839 isif_write(isif->isif_cfg.base_addr,
840 vdfc->table[0].level_up_pixels, DFCMEM3);
841 isif_write(isif->isif_cfg.base_addr,
842 vdfc->table[0].level_low_pixels, DFCMEM4);
845 val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
846 /* set DFCMARST and set DFCMWR */
847 val |= BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
849 isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
851 while (count && (isif_read(isif->isif_cfg.base_addr, DFCMEMCTL) & 0x01))
854 val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
856 pr_debug("defect table write timeout !!\n");
860 for (i = 1; i < vdfc->num_vdefects; i++) {
861 isif_write(isif->isif_cfg.base_addr, vdfc->table[i].pos_vert &
862 ISIF_VDFC_POS_MASK, DFCMEM0);
864 isif_write(isif->isif_cfg.base_addr, vdfc->table[i].pos_horz &
865 ISIF_VDFC_POS_MASK, DFCMEM1);
867 if (vdfc->corr_mode == VPFE_ISIF_VDFC_NORMAL ||
868 vdfc->corr_mode == VPFE_ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
869 isif_write(isif->isif_cfg.base_addr,
870 vdfc->table[i].level_at_pos, DFCMEM2);
871 isif_write(isif->isif_cfg.base_addr,
872 vdfc->table[i].level_up_pixels, DFCMEM3);
873 isif_write(isif->isif_cfg.base_addr,
874 vdfc->table[i].level_low_pixels, DFCMEM4);
876 val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
877 /* clear DFCMARST and set DFCMWR */
878 val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
880 isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
882 count = DFC_WRITE_WAIT_COUNT;
883 while (count && (isif_read(isif->isif_cfg.base_addr,
887 val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
889 pr_debug("defect table write timeout !!\n");
893 if (vdfc->num_vdefects < VPFE_ISIF_VDFC_TABLE_SIZE) {
894 /* Extra cycle needed */
895 isif_write(isif->isif_cfg.base_addr, 0, DFCMEM0);
896 isif_write(isif->isif_cfg.base_addr,
897 DM365_ISIF_MAX_DFCMEM1, DFCMEM1);
898 isif_write(isif->isif_cfg.base_addr,
899 DM365_ISIF_DFCMWR_MEMORY_WRITE, DFCMEMCTL);
902 isif_merge(isif->isif_cfg.base_addr, (1 << ISIF_VDFC_EN_SHIFT),
903 (1 << ISIF_VDFC_EN_SHIFT), DFCCTL);
905 isif_merge(isif->isif_cfg.base_addr, (1 << ISIF_VDFC_EN_SHIFT),
906 (0 << ISIF_VDFC_EN_SHIFT), DFCCTL);
908 isif_write(isif->isif_cfg.base_addr, 0x6, DFCMEMCTL);
909 for (i = 0; i < vdfc->num_vdefects; i++) {
910 count = DFC_WRITE_WAIT_COUNT;
912 (isif_read(isif->isif_cfg.base_addr, DFCMEMCTL) & 0x2))
914 val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
916 pr_debug("defect table write timeout !!\n");
919 isif_write(isif->isif_cfg.base_addr,
920 DM365_ISIF_DFCMRD_MEMORY_READ, DFCMEMCTL);
925 isif_config_csc(struct vpfe_isif_device *isif, struct vpfe_isif_df_csc *df_csc)
931 if (!df_csc->csc.en) {
932 isif_write(isif->isif_cfg.base_addr, 0, CSCCTL);
935 /* initialize all bits to 0 */
937 for (i = 0; i < VPFE_ISIF_CSC_NUM_COEFF; i++) {
940 val1 = ((df_csc->csc.coeff[i].integer &
941 ISIF_CSC_COEF_INTEG_MASK) <<
942 ISIF_CSC_COEF_INTEG_SHIFT) |
943 ((df_csc->csc.coeff[i].decimal &
944 ISIF_CSC_COEF_DECIMAL_MASK));
948 val2 = ((df_csc->csc.coeff[i].integer &
949 ISIF_CSC_COEF_INTEG_MASK) <<
950 ISIF_CSC_COEF_INTEG_SHIFT) |
951 ((df_csc->csc.coeff[i].decimal &
952 ISIF_CSC_COEF_DECIMAL_MASK));
953 val2 <<= ISIF_CSCM_MSB_SHIFT;
955 isif_write(isif->isif_cfg.base_addr, val2,
956 (CSCM0 + ((i-1) << 1)));
959 /* program the active area */
960 isif_write(isif->isif_cfg.base_addr, df_csc->start_pix &
961 ISIF_DF_CSC_SPH_MASK, FMTSPH);
963 * one extra pixel as required for CSC. Actually number of
964 * pixel - 1 should be configured in this register. So we
965 * need to subtract 1 before writing to FMTSPH, but we will
966 * not do this since csc requires one extra pixel
968 isif_write(isif->isif_cfg.base_addr, df_csc->num_pixels &
969 ISIF_DF_CSC_SPH_MASK, FMTLNH);
970 isif_write(isif->isif_cfg.base_addr, df_csc->start_line &
971 ISIF_DF_CSC_SPH_MASK, FMTSLV);
973 * one extra line as required for CSC. See reason documented for
976 isif_write(isif->isif_cfg.base_addr, df_csc->num_lines &
977 ISIF_DF_CSC_SPH_MASK, FMTLNV);
979 isif_write(isif->isif_cfg.base_addr, 1, CSCCTL);
983 isif_config_linearization(struct vpfe_isif_device *isif,
984 struct vpfe_isif_linearize *linearize)
989 if (!linearize->en) {
990 isif_write(isif->isif_cfg.base_addr, 0, LINCFG0);
993 /* shift value for correction */
994 val = (linearize->corr_shft & ISIF_LIN_CORRSFT_MASK) <<
995 ISIF_LIN_CORRSFT_SHIFT;
998 isif_write(isif->isif_cfg.base_addr, val, LINCFG0);
1000 val = (linearize->scale_fact.integer & 1) <<
1001 ISIF_LIN_SCALE_FACT_INTEG_SHIFT;
1002 val |= linearize->scale_fact.decimal & ISIF_LIN_SCALE_FACT_DECIMAL_MASK;
1003 isif_write(isif->isif_cfg.base_addr, val, LINCFG1);
1005 for (i = 0; i < VPFE_ISIF_LINEAR_TAB_SIZE; i++) {
1006 val = linearize->table[i] & ISIF_LIN_ENTRY_MASK;
1008 isif_regw_lin_tbl(isif, val, ((i >> 1) << 2), 1);
1010 isif_regw_lin_tbl(isif, val, ((i >> 1) << 2), 0);
1015 isif_config_culling(struct vpfe_isif_device *isif, struct vpfe_isif_cul *cul)
1019 /* Horizontal pattern */
1020 val = cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT;
1021 val |= cul->hcpat_odd;
1022 isif_write(isif->isif_cfg.base_addr, val, CULH);
1023 /* vertical pattern */
1024 isif_write(isif->isif_cfg.base_addr, cul->vcpat, CULV);
1026 isif_merge(isif->isif_cfg.base_addr, ISIF_LPF_MASK << ISIF_LPF_SHIFT,
1027 cul->en_lpf << ISIF_LPF_SHIFT, MODESET);
1030 static int isif_get_pix_fmt(u32 mbus_code)
1032 switch (mbus_code) {
1033 case MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8:
1034 case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8:
1035 case MEDIA_BUS_FMT_SGRBG12_1X12:
1036 return ISIF_PIXFMT_RAW;
1038 case MEDIA_BUS_FMT_YUYV8_2X8:
1039 case MEDIA_BUS_FMT_UYVY8_2X8:
1040 case MEDIA_BUS_FMT_YUYV10_2X10:
1041 case MEDIA_BUS_FMT_Y8_1X8:
1042 return ISIF_PIXFMT_YCBCR_8BIT;
1044 case MEDIA_BUS_FMT_YUYV8_1X16:
1045 case MEDIA_BUS_FMT_YUYV10_1X20:
1046 return ISIF_PIXFMT_YCBCR_16BIT;
1054 #define ISIF_INTERLACE_INVERSE_MODE 0x4b6d
1055 #define ISIF_INTERLACE_NON_INVERSE_MODE 0x0b6d
1056 #define ISIF_PROGRESSIVE_INVERSE_MODE 0x4000
1057 #define ISIF_PROGRESSIVE_NON_INVERSE_MODE 0x0000
1059 static int isif_config_raw(struct v4l2_subdev *sd, int mode)
1061 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1062 struct isif_params_raw *params = &isif->isif_cfg.bayer;
1063 struct vpfe_isif_raw_config *module_params =
1064 &isif->isif_cfg.bayer.config_params;
1065 struct v4l2_mbus_framefmt *format;
1069 format = &isif->formats[ISIF_PAD_SINK];
1071 /* In case of user has set BT656IF earlier, it should be reset
1072 * when configuring for raw input.
1074 isif_write(isif->isif_cfg.base_addr, 0, REC656IF);
1075 /* Configure CCDCFG register
1076 * Set CCD Not to swap input since input is RAW data
1077 * Set FID detection function to Latch at V-Sync
1078 * Set WENLOG - isif valid area
1081 * Packed to 8 or 16 bits
1083 val = ISIF_YCINSWP_RAW | ISIF_CCDCFG_FIDMD_LATCH_VSYNC |
1084 ISIF_CCDCFG_WENLOG_AND | ISIF_CCDCFG_TRGSEL_WEN |
1085 ISIF_CCDCFG_EXTRG_DISABLE | (isif->isif_cfg.data_pack &
1086 ISIF_DATA_PACK_MASK);
1087 isif_write(isif->isif_cfg.base_addr, val, CCDCFG);
1089 pix_fmt = isif_get_pix_fmt(format->code);
1091 pr_debug("Invalid pix_fmt(input mode)\n");
1095 * Configure the vertical sync polarity(MODESET.VDPOL)
1096 * Configure the horizontal sync polarity (MODESET.HDPOL)
1097 * Configure frame id polarity (MODESET.FLDPOL)
1098 * Configure data polarity
1099 * Configure External WEN Selection
1100 * Configure frame format(progressive or interlace)
1101 * Configure pixel format (Input mode)
1102 * Configure the data shift
1104 val = ISIF_VDHDOUT_INPUT | ((params->vd_pol & ISIF_VD_POL_MASK) <<
1105 ISIF_VD_POL_SHIFT) | ((params->hd_pol & ISIF_HD_POL_MASK) <<
1106 ISIF_HD_POL_SHIFT) | ((params->fid_pol & ISIF_FID_POL_MASK) <<
1107 ISIF_FID_POL_SHIFT) | ((ISIF_DATAPOL_NORMAL &
1108 ISIF_DATAPOL_MASK) << ISIF_DATAPOL_SHIFT) | ((ISIF_EXWEN_DISABLE &
1109 ISIF_EXWEN_MASK) << ISIF_EXWEN_SHIFT) | ((params->frm_fmt &
1110 ISIF_FRM_FMT_MASK) << ISIF_FRM_FMT_SHIFT) | ((pix_fmt &
1111 ISIF_INPUT_MASK) << ISIF_INPUT_SHIFT);
1113 /* currently only MEDIA_BUS_FMT_SGRBG12_1X12 is
1114 * supported. shift appropriately depending on
1115 * different MBUS fmt's added
1117 if (format->code == MEDIA_BUS_FMT_SGRBG12_1X12)
1118 val |= ((VPFE_ISIF_NO_SHIFT &
1119 ISIF_DATASFT_MASK) << ISIF_DATASFT_SHIFT);
1121 isif_write(isif->isif_cfg.base_addr, val, MODESET);
1123 * Configure GAMMAWD register
1124 * CFA pattern setting
1126 val = (params->cfa_pat & ISIF_GAMMAWD_CFA_MASK) <<
1127 ISIF_GAMMAWD_CFA_SHIFT;
1129 if (params->v4l2_pix_fmt == V4L2_PIX_FMT_SGRBG10ALAW8)
1130 val = val | ISIF_ALAW_ENABLE;
1132 val = val | ((params->data_msb & ISIF_ALAW_GAMA_WD_MASK) <<
1133 ISIF_ALAW_GAMA_WD_SHIFT);
1135 isif_write(isif->isif_cfg.base_addr, val, CGAMMAWD);
1136 /* Configure DPCM compression settings */
1137 if (params->v4l2_pix_fmt == V4L2_PIX_FMT_SGRBG10DPCM8) {
1138 val = BIT(ISIF_DPCM_EN_SHIFT);
1139 val |= (params->dpcm_predictor &
1140 ISIF_DPCM_PREDICTOR_MASK) << ISIF_DPCM_PREDICTOR_SHIFT;
1142 isif_write(isif->isif_cfg.base_addr, val, MISC);
1143 /* Configure Gain & Offset */
1144 isif_config_gain_offset(isif);
1145 /* Configure Color pattern */
1146 if (format->code == MEDIA_BUS_FMT_SGRBG12_1X12)
1147 val = isif_sgrbg_pattern;
1149 /* default set to rggb */
1150 val = isif_srggb_pattern;
1152 isif_write(isif->isif_cfg.base_addr, val, CCOLP);
1154 /* Configure HSIZE register */
1155 val = (params->horz_flip_en & ISIF_HSIZE_FLIP_MASK) <<
1156 ISIF_HSIZE_FLIP_SHIFT;
1158 /* calculate line offset in 32 bytes based on pack value */
1159 if (isif->isif_cfg.data_pack == ISIF_PACK_8BIT)
1160 val |= ((params->win.width + 31) >> 5) & ISIF_LINEOFST_MASK;
1161 else if (isif->isif_cfg.data_pack == ISIF_PACK_12BIT)
1162 val |= ((((params->win.width + (params->win.width >> 2)) +
1163 31) >> 5) & ISIF_LINEOFST_MASK);
1165 val |= (((params->win.width * 2) + 31) >> 5) &
1167 isif_write(isif->isif_cfg.base_addr, val, HSIZE);
1168 /* Configure SDOFST register */
1169 if (params->frm_fmt == ISIF_FRMFMT_INTERLACED) {
1170 if (params->image_invert_en)
1171 /* For interlace inverse mode */
1172 isif_write(isif->isif_cfg.base_addr,
1173 ISIF_INTERLACE_INVERSE_MODE, SDOFST);
1175 /* For interlace non inverse mode */
1176 isif_write(isif->isif_cfg.base_addr,
1177 ISIF_INTERLACE_NON_INVERSE_MODE, SDOFST);
1178 } else if (params->frm_fmt == ISIF_FRMFMT_PROGRESSIVE) {
1179 if (params->image_invert_en)
1180 isif_write(isif->isif_cfg.base_addr,
1181 ISIF_PROGRESSIVE_INVERSE_MODE, SDOFST);
1183 /* For progessive non inverse mode */
1184 isif_write(isif->isif_cfg.base_addr,
1185 ISIF_PROGRESSIVE_NON_INVERSE_MODE, SDOFST);
1187 /* Configure video window */
1188 isif_setwin(isif, ¶ms->win, params->frm_fmt, 1, mode);
1189 /* Configure Black Clamp */
1190 isif_config_bclamp(isif, &module_params->bclamp);
1191 /* Configure Vertical Defection Pixel Correction */
1192 isif_config_dfc(isif, &module_params->dfc);
1193 if (!module_params->df_csc.df_or_csc)
1194 /* Configure Color Space Conversion */
1195 isif_config_csc(isif, &module_params->df_csc);
1197 isif_config_linearization(isif, &module_params->linearize);
1198 /* Configure Culling */
1199 isif_config_culling(isif, &module_params->culling);
1200 /* Configure Horizontal and vertical offsets(DFC,LSC,Gain) */
1201 val = module_params->horz_offset & ISIF_DATA_H_OFFSET_MASK;
1202 isif_write(isif->isif_cfg.base_addr, val, DATAHOFST);
1204 val = module_params->vert_offset & ISIF_DATA_V_OFFSET_MASK;
1205 isif_write(isif->isif_cfg.base_addr, val, DATAVOFST);
1210 #define DM365_ISIF_HSIZE_MASK 0xffffffe0
1211 #define DM365_ISIF_SDOFST_2_LINES 0x00000249
1213 /* This function will configure ISIF for YCbCr parameters. */
1214 static int isif_config_ycbcr(struct v4l2_subdev *sd, int mode)
1216 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1217 struct isif_ycbcr_config *params = &isif->isif_cfg.ycbcr;
1218 struct v4l2_mbus_framefmt *format;
1223 format = &isif->formats[ISIF_PAD_SINK];
1225 * first reset the ISIF
1226 * all registers have default values after reset
1227 * This is important since we assume default values to be set in
1228 * a lot of registers that we didn't touch
1230 /* start with all bits zero */
1233 pix_fmt = isif_get_pix_fmt(format->code);
1235 pr_debug("Invalid pix_fmt(input mode)\n");
1238 /* configure pixel format or input mode */
1239 modeset = modeset | ((pix_fmt & ISIF_INPUT_MASK) <<
1240 ISIF_INPUT_SHIFT) | ((params->frm_fmt & ISIF_FRM_FMT_MASK) <<
1241 ISIF_FRM_FMT_SHIFT) | (((params->fid_pol &
1242 ISIF_FID_POL_MASK) << ISIF_FID_POL_SHIFT)) |
1243 (((params->hd_pol & ISIF_HD_POL_MASK) << ISIF_HD_POL_SHIFT)) |
1244 (((params->vd_pol & ISIF_VD_POL_MASK) << ISIF_VD_POL_SHIFT));
1245 /* pack the data to 8-bit CCDCCFG */
1246 switch (format->code) {
1247 case MEDIA_BUS_FMT_YUYV8_2X8:
1248 case MEDIA_BUS_FMT_UYVY8_2X8:
1249 if (pix_fmt != ISIF_PIXFMT_YCBCR_8BIT) {
1250 pr_debug("Invalid pix_fmt(input mode)\n");
1253 modeset |= ((VPFE_PINPOL_NEGATIVE & ISIF_VD_POL_MASK) <<
1255 isif_write(isif->isif_cfg.base_addr, 3, REC656IF);
1256 ccdcfg = ccdcfg | ISIF_PACK_8BIT | ISIF_YCINSWP_YCBCR;
1259 case MEDIA_BUS_FMT_YUYV10_2X10:
1260 if (pix_fmt != ISIF_PIXFMT_YCBCR_8BIT) {
1261 pr_debug("Invalid pix_fmt(input mode)\n");
1264 /* setup BT.656, embedded sync */
1265 isif_write(isif->isif_cfg.base_addr, 3, REC656IF);
1266 /* enable 10 bit mode in ccdcfg */
1267 ccdcfg = ccdcfg | ISIF_PACK_8BIT | ISIF_YCINSWP_YCBCR |
1271 case MEDIA_BUS_FMT_YUYV10_1X20:
1272 if (pix_fmt != ISIF_PIXFMT_YCBCR_16BIT) {
1273 pr_debug("Invalid pix_fmt(input mode)\n");
1276 isif_write(isif->isif_cfg.base_addr, 3, REC656IF);
1279 case MEDIA_BUS_FMT_Y8_1X8:
1280 ccdcfg |= ISIF_PACK_8BIT;
1281 ccdcfg |= ISIF_YCINSWP_YCBCR;
1282 if (pix_fmt != ISIF_PIXFMT_YCBCR_8BIT) {
1283 pr_debug("Invalid pix_fmt(input mode)\n");
1288 case MEDIA_BUS_FMT_YUYV8_1X16:
1289 if (pix_fmt != ISIF_PIXFMT_YCBCR_16BIT) {
1290 pr_debug("Invalid pix_fmt(input mode)\n");
1296 /* should never come here */
1297 pr_debug("Invalid interface type\n");
1300 isif_write(isif->isif_cfg.base_addr, modeset, MODESET);
1301 /* Set up pix order */
1302 ccdcfg |= (params->pix_order & ISIF_PIX_ORDER_MASK) <<
1303 ISIF_PIX_ORDER_SHIFT;
1304 isif_write(isif->isif_cfg.base_addr, ccdcfg, CCDCFG);
1305 /* configure video window */
1306 if (format->code == MEDIA_BUS_FMT_YUYV10_1X20 ||
1307 format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1308 isif_setwin(isif, ¶ms->win, params->frm_fmt, 1, mode);
1310 isif_setwin(isif, ¶ms->win, params->frm_fmt, 2, mode);
1313 * configure the horizontal line offset
1314 * this is done by rounding up width to a multiple of 16 pixels
1315 * and multiply by two to account for y:cb:cr 4:2:2 data
1317 isif_write(isif->isif_cfg.base_addr,
1318 ((((params->win.width * 2) + 31) &
1319 DM365_ISIF_HSIZE_MASK) >> 5), HSIZE);
1321 /* configure the memory line offset */
1322 if (params->frm_fmt == ISIF_FRMFMT_INTERLACED &&
1323 params->buf_type == ISIF_BUFTYPE_FLD_INTERLEAVED)
1324 /* two fields are interleaved in memory */
1325 isif_write(isif->isif_cfg.base_addr,
1326 DM365_ISIF_SDOFST_2_LINES, SDOFST);
1330 static int isif_configure(struct v4l2_subdev *sd, int mode)
1332 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1333 struct v4l2_mbus_framefmt *format;
1335 format = &isif->formats[ISIF_PAD_SINK];
1337 switch (format->code) {
1338 case MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8:
1339 case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8:
1340 case MEDIA_BUS_FMT_SGRBG12_1X12:
1341 return isif_config_raw(sd, mode);
1343 case MEDIA_BUS_FMT_YUYV8_2X8:
1344 case MEDIA_BUS_FMT_UYVY8_2X8:
1345 case MEDIA_BUS_FMT_YUYV10_2X10:
1346 case MEDIA_BUS_FMT_Y8_1X8:
1347 case MEDIA_BUS_FMT_YUYV8_1X16:
1348 case MEDIA_BUS_FMT_YUYV10_1X20:
1349 return isif_config_ycbcr(sd, mode);
1358 * isif_set_stream() - Enable/Disable streaming on the ISIF module
1359 * @sd: VPFE ISIF V4L2 subdevice
1360 * @enable: Enable/disable stream
1362 static int isif_set_stream(struct v4l2_subdev *sd, int enable)
1364 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1368 ret = isif_configure(sd,
1369 (isif->output == ISIF_OUTPUT_MEMORY) ? 0 : 1);
1372 if (isif->output == ISIF_OUTPUT_MEMORY)
1373 isif_enable_output_to_sdram(isif, 1);
1374 isif_enable(isif, 1);
1376 isif_enable(isif, 0);
1377 isif_enable_output_to_sdram(isif, 0);
1384 * __isif_get_format() - helper function for getting isif format
1385 * @isif: pointer to isif private structure.
1387 * @cfg: V4L2 subdev pad config
1388 * @which: wanted subdev format.
1390 static struct v4l2_mbus_framefmt *
1391 __isif_get_format(struct vpfe_isif_device *isif,
1392 struct v4l2_subdev_pad_config *cfg, unsigned int pad,
1393 enum v4l2_subdev_format_whence which)
1395 if (which == V4L2_SUBDEV_FORMAT_TRY)
1396 return v4l2_subdev_get_try_format(&isif->subdev, cfg, pad);
1398 return &isif->formats[pad];
1402 * isif_set_format() - set format on pad
1403 * @sd : VPFE ISIF device
1404 * @cfg : V4L2 subdev pad config
1405 * @fmt : pointer to v4l2 subdev format structure
1407 * Return 0 on success or -EINVAL if format or pad is invalid
1410 isif_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1411 struct v4l2_subdev_format *fmt)
1413 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1414 struct vpfe_device *vpfe_dev = to_vpfe_device(isif);
1415 struct v4l2_mbus_framefmt *format;
1417 format = __isif_get_format(isif, cfg, fmt->pad, fmt->which);
1421 isif_try_format(isif, cfg, fmt);
1422 memcpy(format, &fmt->format, sizeof(*format));
1424 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1427 if (fmt->pad == ISIF_PAD_SOURCE)
1428 return isif_config_format(vpfe_dev, fmt->pad);
1434 * isif_get_format() - Retrieve the video format on a pad
1435 * @sd: VPFE ISIF V4L2 subdevice
1436 * @cfg: V4L2 subdev pad config
1437 * @fmt: pointer to v4l2 subdev format structure
1439 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1440 * to the format type.
1443 isif_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1444 struct v4l2_subdev_format *fmt)
1446 struct vpfe_isif_device *vpfe_isif = v4l2_get_subdevdata(sd);
1447 struct v4l2_mbus_framefmt *format;
1449 format = __isif_get_format(vpfe_isif, cfg, fmt->pad, fmt->which);
1453 memcpy(&fmt->format, format, sizeof(fmt->format));
1459 * isif_enum_frame_size() - enum frame sizes on pads
1460 * @sd: VPFE isif V4L2 subdevice
1461 * @cfg: V4L2 subdev pad config
1462 * @code: pointer to v4l2_subdev_frame_size_enum structure
1465 isif_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1466 struct v4l2_subdev_frame_size_enum *fse)
1468 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1469 struct v4l2_subdev_format format;
1471 if (fse->index != 0)
1474 format.pad = fse->pad;
1475 format.format.code = fse->code;
1476 format.format.width = 1;
1477 format.format.height = 1;
1478 format.which = fse->which;
1479 isif_try_format(isif, cfg, &format);
1480 fse->min_width = format.format.width;
1481 fse->min_height = format.format.height;
1483 if (format.format.code != fse->code)
1486 format.pad = fse->pad;
1487 format.format.code = fse->code;
1488 format.format.width = -1;
1489 format.format.height = -1;
1490 format.which = fse->which;
1491 isif_try_format(isif, cfg, &format);
1492 fse->max_width = format.format.width;
1493 fse->max_height = format.format.height;
1499 * isif_enum_mbus_code() - enum mbus codes for pads
1500 * @sd: VPFE isif V4L2 subdevice
1501 * @cfg: V4L2 subdev pad config
1502 * @code: pointer to v4l2_subdev_mbus_code_enum structure
1505 isif_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1506 struct v4l2_subdev_mbus_code_enum *code)
1508 switch (code->pad) {
1510 case ISIF_PAD_SOURCE:
1511 if (code->index >= ARRAY_SIZE(isif_fmts))
1513 code->code = isif_fmts[code->index];
1524 * isif_pad_set_selection() - set crop rectangle on pad
1525 * @sd: VPFE isif V4L2 subdevice
1526 * @cfg: V4L2 subdev pad config
1527 * @code: pointer to v4l2_subdev_mbus_code_enum structure
1529 * Return 0 on success, -EINVAL if pad is invalid
1532 isif_pad_set_selection(struct v4l2_subdev *sd,
1533 struct v4l2_subdev_pad_config *cfg,
1534 struct v4l2_subdev_selection *sel)
1536 struct vpfe_isif_device *vpfe_isif = v4l2_get_subdevdata(sd);
1537 struct v4l2_mbus_framefmt *format;
1539 /* check whether it's a valid pad and target */
1540 if (sel->pad != ISIF_PAD_SINK || sel->target != V4L2_SEL_TGT_CROP)
1543 format = __isif_get_format(vpfe_isif, cfg, sel->pad, sel->which);
1547 /* check wether crop rect is within limits */
1548 if (sel->r.top < 0 || sel->r.left < 0 ||
1549 (sel->r.left + sel->r.width >
1550 vpfe_isif->formats[ISIF_PAD_SINK].width) ||
1551 (sel->r.top + sel->r.height >
1552 vpfe_isif->formats[ISIF_PAD_SINK].height)) {
1555 sel->r.width = format->width;
1556 sel->r.height = format->height;
1558 /* adjust the width to 16 pixel boundary */
1559 sel->r.width = (sel->r.width + 15) & ~0xf;
1560 vpfe_isif->crop = sel->r;
1561 if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
1562 isif_set_image_window(vpfe_isif);
1564 struct v4l2_rect *rect;
1566 rect = v4l2_subdev_get_try_crop(sd, cfg, ISIF_PAD_SINK);
1567 memcpy(rect, &vpfe_isif->crop, sizeof(*rect));
1573 * isif_pad_get_selection() - get crop rectangle on pad
1574 * @sd: VPFE isif V4L2 subdevice
1575 * @cfg: V4L2 subdev pad config
1576 * @code: pointer to v4l2_subdev_mbus_code_enum structure
1578 * Return 0 on success, -EINVAL if pad is invalid
1581 isif_pad_get_selection(struct v4l2_subdev *sd,
1582 struct v4l2_subdev_pad_config *cfg,
1583 struct v4l2_subdev_selection *sel)
1585 struct vpfe_isif_device *vpfe_isif = v4l2_get_subdevdata(sd);
1587 /* check whether it's a valid pad and target */
1588 if (sel->pad != ISIF_PAD_SINK || sel->target != V4L2_SEL_TGT_CROP)
1591 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1592 struct v4l2_rect *rect;
1594 rect = v4l2_subdev_get_try_crop(sd, cfg, ISIF_PAD_SINK);
1595 memcpy(&sel->r, rect, sizeof(*rect));
1597 sel->r = vpfe_isif->crop;
1604 * isif_init_formats() - Initialize formats on all pads
1605 * @sd: VPFE isif V4L2 subdevice
1606 * @fh: V4L2 subdev file handle
1608 * Initialize all pad formats with default values. Try formats are initialized
1609 * on the file handle.
1612 isif_init_formats(struct v4l2_subdev *sd,
1613 struct v4l2_subdev_fh *fh)
1615 struct v4l2_subdev_format format;
1616 struct v4l2_subdev_selection sel;
1618 memset(&format, 0, sizeof(format));
1619 format.pad = ISIF_PAD_SINK;
1620 format.which = V4L2_SUBDEV_FORMAT_TRY;
1621 format.format.code = MEDIA_BUS_FMT_SGRBG12_1X12;
1622 format.format.width = MAX_WIDTH;
1623 format.format.height = MAX_HEIGHT;
1624 isif_set_format(sd, fh->pad, &format);
1626 memset(&format, 0, sizeof(format));
1627 format.pad = ISIF_PAD_SOURCE;
1628 format.which = V4L2_SUBDEV_FORMAT_TRY;
1629 format.format.code = MEDIA_BUS_FMT_SGRBG12_1X12;
1630 format.format.width = MAX_WIDTH;
1631 format.format.height = MAX_HEIGHT;
1632 isif_set_format(sd, fh->pad, &format);
1634 memset(&sel, 0, sizeof(sel));
1635 sel.pad = ISIF_PAD_SINK;
1636 sel.which = V4L2_SUBDEV_FORMAT_TRY;
1637 sel.target = V4L2_SEL_TGT_CROP;
1638 sel.r.width = MAX_WIDTH;
1639 sel.r.height = MAX_HEIGHT;
1640 isif_pad_set_selection(sd, fh->pad, &sel);
1645 /* subdev core operations */
1646 static const struct v4l2_subdev_core_ops isif_v4l2_core_ops = {
1647 .ioctl = isif_ioctl,
1650 /* subdev file operations */
1651 static const struct v4l2_subdev_internal_ops isif_v4l2_internal_ops = {
1652 .open = isif_init_formats,
1655 /* subdev video operations */
1656 static const struct v4l2_subdev_video_ops isif_v4l2_video_ops = {
1657 .s_stream = isif_set_stream,
1660 /* subdev pad operations */
1661 static const struct v4l2_subdev_pad_ops isif_v4l2_pad_ops = {
1662 .enum_mbus_code = isif_enum_mbus_code,
1663 .enum_frame_size = isif_enum_frame_size,
1664 .get_fmt = isif_get_format,
1665 .set_fmt = isif_set_format,
1666 .set_selection = isif_pad_set_selection,
1667 .get_selection = isif_pad_get_selection,
1670 /* subdev operations */
1671 static const struct v4l2_subdev_ops isif_v4l2_ops = {
1672 .core = &isif_v4l2_core_ops,
1673 .video = &isif_v4l2_video_ops,
1674 .pad = &isif_v4l2_pad_ops,
1678 * Media entity operations
1682 * isif_link_setup() - Setup isif connections
1683 * @entity: isif media entity
1684 * @local: Pad at the local end of the link
1685 * @remote: Pad at the remote end of the link
1686 * @flags: Link flags
1688 * return -EINVAL or zero on success
1691 isif_link_setup(struct media_entity *entity, const struct media_pad *local,
1692 const struct media_pad *remote, u32 flags)
1694 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1695 struct vpfe_isif_device *isif = v4l2_get_subdevdata(sd);
1696 unsigned int index = local->index;
1698 /* FIXME: this is actually a hack! */
1699 if (is_media_entity_v4l2_subdev(remote->entity))
1703 case ISIF_PAD_SINK | 2 << 16:
1704 /* read from decoder/sensor */
1705 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1706 isif->input = ISIF_INPUT_NONE;
1709 if (isif->input != ISIF_INPUT_NONE)
1711 isif->input = ISIF_INPUT_PARALLEL;
1714 case ISIF_PAD_SOURCE:
1715 /* write to memory */
1716 if (flags & MEDIA_LNK_FL_ENABLED)
1717 isif->output = ISIF_OUTPUT_MEMORY;
1719 isif->output = ISIF_OUTPUT_NONE;
1722 case ISIF_PAD_SOURCE | 2 << 16:
1723 if (flags & MEDIA_LNK_FL_ENABLED)
1724 isif->output = ISIF_OUTPUT_IPIPEIF;
1726 isif->output = ISIF_OUTPUT_NONE;
1735 static const struct media_entity_operations isif_media_ops = {
1736 .link_setup = isif_link_setup,
1740 * vpfe_isif_unregister_entities() - isif unregister entity
1741 * @isif - pointer to isif subdevice structure.
1743 void vpfe_isif_unregister_entities(struct vpfe_isif_device *isif)
1745 vpfe_video_unregister(&isif->video_out);
1746 /* unregister subdev */
1747 v4l2_device_unregister_subdev(&isif->subdev);
1748 /* cleanup entity */
1749 media_entity_cleanup(&isif->subdev.entity);
1752 static void isif_restore_defaults(struct vpfe_isif_device *isif)
1754 enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
1757 memset(&isif->isif_cfg.bayer.config_params, 0,
1758 sizeof(struct vpfe_isif_raw_config));
1760 isif->isif_cfg.bayer.config_params.linearize.corr_shft =
1762 isif->isif_cfg.bayer.config_params.linearize.scale_fact.integer = 1;
1763 isif->isif_cfg.bayer.config_params.culling.hcpat_odd =
1764 ISIF_CULLING_HCAPT_ODD;
1765 isif->isif_cfg.bayer.config_params.culling.hcpat_even =
1766 ISIF_CULLING_HCAPT_EVEN;
1767 isif->isif_cfg.bayer.config_params.culling.vcpat = ISIF_CULLING_VCAPT;
1768 /* Enable clock to ISIF, IPIPEIF and BL */
1769 vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
1770 vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
1771 vpss_enable_clock(VPSS_BL_CLOCK, 1);
1773 /* set all registers to default value */
1774 for (i = 0; i <= 0x1f8; i += 4)
1775 isif_write(isif->isif_cfg.base_addr, 0, i);
1776 /* no culling support */
1777 isif_write(isif->isif_cfg.base_addr, 0xffff, CULH);
1778 isif_write(isif->isif_cfg.base_addr, 0xff, CULV);
1780 /* Set default offset and gain */
1781 isif_config_gain_offset(isif);
1782 vpss_select_ccdc_source(source);
1786 * vpfe_isif_register_entities() - isif register entity
1787 * @isif - pointer to isif subdevice structure.
1788 * @vdev: pointer to v4l2 device structure.
1790 int vpfe_isif_register_entities(struct vpfe_isif_device *isif,
1791 struct v4l2_device *vdev)
1793 struct vpfe_device *vpfe_dev = to_vpfe_device(isif);
1797 /* Register the subdev */
1798 ret = v4l2_device_register_subdev(vdev, &isif->subdev);
1802 isif_restore_defaults(isif);
1803 ret = vpfe_video_register(&isif->video_out, vdev);
1805 pr_err("Failed to register isif video out device\n");
1806 goto out_video_register;
1808 isif->video_out.vpfe_dev = vpfe_dev;
1810 /* connect isif to video node */
1811 ret = media_create_pad_link(&isif->subdev.entity, 1,
1812 &isif->video_out.video_dev.entity,
1815 goto out_create_link;
1818 vpfe_video_unregister(&isif->video_out);
1820 v4l2_device_unregister_subdev(&isif->subdev);
1824 /* -------------------------------------------------------------------
1825 * V4L2 subdev control operations
1828 static int vpfe_isif_s_ctrl(struct v4l2_ctrl *ctrl)
1830 struct vpfe_isif_device *isif =
1831 container_of(ctrl->handler, struct vpfe_isif_device, ctrls);
1832 struct isif_oper_config *config = &isif->isif_cfg;
1835 case VPFE_CID_DPCM_PREDICTOR:
1836 config->bayer.dpcm_predictor = ctrl->val;
1839 case VPFE_ISIF_CID_CRGAIN:
1840 config->isif_gain_params.cr_gain = ctrl->val;
1843 case VPFE_ISIF_CID_CGRGAIN:
1844 config->isif_gain_params.cgr_gain = ctrl->val;
1847 case VPFE_ISIF_CID_CGBGAIN:
1848 config->isif_gain_params.cgb_gain = ctrl->val;
1851 case VPFE_ISIF_CID_CBGAIN:
1852 config->isif_gain_params.cb_gain = ctrl->val;
1855 case VPFE_ISIF_CID_GAIN_OFFSET:
1856 config->isif_gain_params.offset = ctrl->val;
1865 static const struct v4l2_ctrl_ops vpfe_isif_ctrl_ops = {
1866 .s_ctrl = vpfe_isif_s_ctrl,
1869 static const struct v4l2_ctrl_config vpfe_isif_dpcm_pred = {
1870 .ops = &vpfe_isif_ctrl_ops,
1871 .id = VPFE_CID_DPCM_PREDICTOR,
1872 .name = "DPCM Predictor",
1873 .type = V4L2_CTRL_TYPE_INTEGER,
1880 static const struct v4l2_ctrl_config vpfe_isif_crgain = {
1881 .ops = &vpfe_isif_ctrl_ops,
1882 .id = VPFE_ISIF_CID_CRGAIN,
1884 .type = V4L2_CTRL_TYPE_INTEGER,
1886 .max = (1 << 12) - 1,
1891 static const struct v4l2_ctrl_config vpfe_isif_cgrgain = {
1892 .ops = &vpfe_isif_ctrl_ops,
1893 .id = VPFE_ISIF_CID_CGRGAIN,
1895 .type = V4L2_CTRL_TYPE_INTEGER,
1897 .max = (1 << 12) - 1,
1902 static const struct v4l2_ctrl_config vpfe_isif_cgbgain = {
1903 .ops = &vpfe_isif_ctrl_ops,
1904 .id = VPFE_ISIF_CID_CGBGAIN,
1906 .type = V4L2_CTRL_TYPE_INTEGER,
1908 .max = (1 << 12) - 1,
1913 static const struct v4l2_ctrl_config vpfe_isif_cbgain = {
1914 .ops = &vpfe_isif_ctrl_ops,
1915 .id = VPFE_ISIF_CID_CBGAIN,
1917 .type = V4L2_CTRL_TYPE_INTEGER,
1919 .max = (1 << 12) - 1,
1924 static const struct v4l2_ctrl_config vpfe_isif_gain_offset = {
1925 .ops = &vpfe_isif_ctrl_ops,
1926 .id = VPFE_ISIF_CID_GAIN_OFFSET,
1927 .name = "Gain Offset",
1928 .type = V4L2_CTRL_TYPE_INTEGER,
1930 .max = (1 << 12) - 1,
1935 static void isif_remove(struct vpfe_isif_device *isif,
1936 struct platform_device *pdev)
1938 struct resource *res;
1941 iounmap(isif->isif_cfg.base_addr);
1942 iounmap(isif->isif_cfg.linear_tbl0_addr);
1943 iounmap(isif->isif_cfg.linear_tbl1_addr);
1946 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1948 release_mem_region(res->start,
1949 resource_size(res));
1954 static void isif_config_defaults(struct vpfe_isif_device *isif)
1956 isif->isif_cfg.ycbcr.v4l2_pix_fmt = V4L2_PIX_FMT_UYVY;
1957 isif->isif_cfg.ycbcr.pix_fmt = ISIF_PIXFMT_YCBCR_8BIT;
1958 isif->isif_cfg.ycbcr.frm_fmt = ISIF_FRMFMT_INTERLACED;
1959 isif->isif_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE;
1960 isif->isif_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE;
1961 isif->isif_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE;
1962 isif->isif_cfg.ycbcr.pix_order = ISIF_PIXORDER_CBYCRY;
1963 isif->isif_cfg.ycbcr.buf_type = ISIF_BUFTYPE_FLD_INTERLEAVED;
1965 isif->isif_cfg.bayer.v4l2_pix_fmt = V4L2_PIX_FMT_SGRBG10ALAW8;
1966 isif->isif_cfg.bayer.pix_fmt = ISIF_PIXFMT_RAW;
1967 isif->isif_cfg.bayer.frm_fmt = ISIF_FRMFMT_PROGRESSIVE;
1968 isif->isif_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE;
1969 isif->isif_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE;
1970 isif->isif_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE;
1971 isif->isif_cfg.bayer.cfa_pat = ISIF_CFA_PAT_MOSAIC;
1972 isif->isif_cfg.bayer.data_msb = ISIF_BIT_MSB_11;
1973 isif->isif_cfg.data_pack = ISIF_PACK_8BIT;
1976 * vpfe_isif_init() - Initialize V4L2 subdev and media entity
1977 * @isif: VPFE isif module
1978 * @pdev: Pointer to platform device structure.
1979 * Return 0 on success and a negative error code on failure.
1981 int vpfe_isif_init(struct vpfe_isif_device *isif, struct platform_device *pdev)
1983 struct v4l2_subdev *sd = &isif->subdev;
1984 struct media_pad *pads = &isif->pads[0];
1985 struct media_entity *me = &sd->entity;
1986 static resource_size_t res_len;
1987 struct resource *res;
1992 /* Get the ISIF base address, linearization table0 and table1 addr. */
1994 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1997 goto fail_nobase_res;
1999 res_len = resource_size(res);
2000 res = request_mem_region(res->start, res_len, res->name);
2003 goto fail_nobase_res;
2005 addr = ioremap_nocache(res->start, res_len);
2008 goto fail_base_iomap;
2012 /* ISIF base address */
2013 isif->isif_cfg.base_addr = addr;
2016 /* ISIF linear tbl0 address */
2017 isif->isif_cfg.linear_tbl0_addr = addr;
2020 /* ISIF linear tbl0 address */
2021 isif->isif_cfg.linear_tbl1_addr = addr;
2026 davinci_cfg_reg(DM365_VIN_CAM_WEN);
2027 davinci_cfg_reg(DM365_VIN_CAM_VD);
2028 davinci_cfg_reg(DM365_VIN_CAM_HD);
2029 davinci_cfg_reg(DM365_VIN_YIN4_7_EN);
2030 davinci_cfg_reg(DM365_VIN_YIN0_3_EN);
2033 isif->video_out.ops = &isif_video_ops;
2034 v4l2_subdev_init(sd, &isif_v4l2_ops);
2035 sd->internal_ops = &isif_v4l2_internal_ops;
2036 strscpy(sd->name, "DAVINCI ISIF", sizeof(sd->name));
2037 sd->grp_id = 1 << 16; /* group ID for davinci subdevs */
2038 v4l2_set_subdevdata(sd, isif);
2039 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2040 pads[ISIF_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2041 pads[ISIF_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
2043 isif->input = ISIF_INPUT_NONE;
2044 isif->output = ISIF_OUTPUT_NONE;
2045 me->ops = &isif_media_ops;
2046 status = media_entity_pads_init(me, ISIF_PADS_NUM, pads);
2049 isif->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2050 status = vpfe_video_init(&isif->video_out, "ISIF");
2052 pr_err("Failed to init isif-out video device\n");
2055 v4l2_ctrl_handler_init(&isif->ctrls, 6);
2056 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_crgain, NULL);
2057 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_cgrgain, NULL);
2058 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_cgbgain, NULL);
2059 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_cbgain, NULL);
2060 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_gain_offset, NULL);
2061 v4l2_ctrl_new_custom(&isif->ctrls, &vpfe_isif_dpcm_pred, NULL);
2063 v4l2_ctrl_handler_setup(&isif->ctrls);
2064 sd->ctrl_handler = &isif->ctrls;
2065 isif_config_defaults(isif);
2068 release_mem_region(res->start, res_len);
2071 if (isif->isif_cfg.base_addr)
2072 iounmap(isif->isif_cfg.base_addr);
2073 if (isif->isif_cfg.linear_tbl0_addr)
2074 iounmap(isif->isif_cfg.linear_tbl0_addr);
2077 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
2078 release_mem_region(res->start, res_len);
2083 v4l2_ctrl_handler_free(&isif->ctrls);
2084 isif_remove(isif, pdev);
2089 * vpfe_isif_cleanup - isif module cleanup
2090 * @isif: pointer to isif subdevice
2091 * @dev: pointer to platform device structure
2094 vpfe_isif_cleanup(struct vpfe_isif_device *isif, struct platform_device *pdev)
2096 isif_remove(isif, pdev);