2 * Copyright (c) 2010-2011 NVIDIA Corporation
3 * With help from the mpc8xxx SPI driver
4 * With more help from omap3_spi SPI driver
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/clk_rst.h>
32 #include <asm/arch/clock.h>
33 #include <asm/arch/pinmux.h>
34 #include <asm/arch/tegra2_spi.h>
36 struct tegra_spi_slave {
37 struct spi_slave slave;
38 struct spi_tegra *regs;
43 static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
45 return container_of(slave, struct tegra_spi_slave, slave);
48 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
50 /* Tegra2 SPI-Flash - only 1 device ('bus/cs') */
51 if (bus != 0 || cs != 0)
57 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
58 unsigned int max_hz, unsigned int mode)
60 struct tegra_spi_slave *spi;
62 if (!spi_cs_is_valid(bus, cs)) {
63 printf("SPI error: unsupported bus %d / chip select %d\n",
68 if (max_hz > TEGRA2_SPI_MAX_FREQ) {
69 printf("SPI error: unsupported frequency %d Hz. Max frequency"
70 " is %d Hz\n", max_hz, TEGRA2_SPI_MAX_FREQ);
74 spi = malloc(sizeof(struct tegra_spi_slave));
76 printf("SPI error: malloc of SPI structure failed\n");
82 spi->regs = (struct spi_tegra *)TEGRA2_SPI_BASE;
88 void spi_free_slave(struct spi_slave *slave)
90 struct tegra_spi_slave *spi = to_tegra_spi(slave);
100 int spi_claim_bus(struct spi_slave *slave)
102 struct tegra_spi_slave *spi = to_tegra_spi(slave);
103 struct spi_tegra *regs = spi->regs;
106 /* Change SPI clock to correct frequency, PLLP_OUT0 source */
107 clock_start_periph_pll(PERIPH_ID_SPI1, CLOCK_ID_PERIPH, spi->freq);
109 /* Clear stale status here */
110 reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \
111 SPI_STAT_RXF_UNR | SPI_STAT_TXF_OVF;
112 writel(reg, ®s->status);
113 debug("spi_init: STATUS = %08x\n", readl(®s->status));
116 * Use sw-controlled CS, so we can clock in data after ReadID, etc.
118 reg = (spi->mode & 1) << SPI_CMD_ACTIVE_SDA_SHIFT;
120 reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT;
121 clrsetbits_le32(®s->command, SPI_CMD_ACTIVE_SCLK_MASK |
122 SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg);
123 debug("spi_init: COMMAND = %08x\n", readl(®s->command));
126 * SPI pins on Tegra2 are muxed - change pinmux later due to UART
129 pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);
130 pinmux_tristate_disable(PINGRP_LSPI);
134 void spi_release_bus(struct spi_slave *slave)
137 * We can't release UART_DISABLE and set pinmux to UART4 here since
138 * some code (e,g, spi_flash_probe) uses printf() while the SPI
139 * bus is held. That is arguably bad, but it has the advantage of
140 * already being in the source tree.
144 void spi_cs_activate(struct spi_slave *slave)
146 struct tegra_spi_slave *spi = to_tegra_spi(slave);
148 /* CS is negated on Tegra, so drive a 1 to get a 0 */
149 setbits_le32(&spi->regs->command, SPI_CMD_CS_VAL);
152 void spi_cs_deactivate(struct spi_slave *slave)
154 struct tegra_spi_slave *spi = to_tegra_spi(slave);
156 /* CS is negated on Tegra, so drive a 0 to get a 1 */
157 clrbits_le32(&spi->regs->command, SPI_CMD_CS_VAL);
160 int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
161 const void *data_out, void *data_in, unsigned long flags)
163 struct tegra_spi_slave *spi = to_tegra_spi(slave);
164 struct spi_tegra *regs = spi->regs;
165 u32 reg, tmpdout, tmpdin = 0;
166 const u8 *dout = data_out;
171 debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
172 slave->bus, slave->cs, *(u8 *)dout, *(u8 *)din, bitlen);
175 num_bytes = bitlen / 8;
179 reg = readl(®s->status);
180 writel(reg, ®s->status); /* Clear all SPI events via R/W */
181 debug("spi_xfer entry: STATUS = %08x\n", reg);
183 reg = readl(®s->command);
184 reg |= SPI_CMD_TXEN | SPI_CMD_RXEN;
185 writel(reg, ®s->command);
186 debug("spi_xfer: COMMAND = %08x\n", readl(®s->command));
188 if (flags & SPI_XFER_BEGIN)
189 spi_cs_activate(slave);
191 /* handle data in 32-bit chunks */
192 while (num_bytes > 0) {
198 bytes = (num_bytes > 4) ? 4 : num_bytes;
201 for (i = 0; i < bytes; ++i)
202 tmpdout = (tmpdout << 8) | dout[i];
209 clrsetbits_le32(®s->command, SPI_CMD_BIT_LENGTH_MASK,
211 writel(tmpdout, ®s->tx_fifo);
212 setbits_le32(®s->command, SPI_CMD_GO);
215 * Wait for SPI transmit FIFO to empty, or to time out.
216 * The RX FIFO status will be read and cleared last
218 for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
221 status = readl(®s->status);
223 /* We can exit when we've had both RX and TX activity */
224 if (is_read && (status & SPI_STAT_TXF_EMPTY))
227 if ((status & (SPI_STAT_BSY | SPI_STAT_RDY)) !=
231 else if (!(status & SPI_STAT_RXF_EMPTY)) {
232 tmpdin = readl(®s->rx_fifo);
235 /* swap bytes read in */
237 for (i = bytes - 1; i >= 0; --i) {
238 din[i] = tmpdin & 0xff;
246 if (tm >= SPI_TIMEOUT)
249 /* clear ACK RDY, etc. bits */
250 writel(readl(®s->status), ®s->status);
253 if (flags & SPI_XFER_END)
254 spi_cs_deactivate(slave);
256 debug("spi_xfer: transfer ended. Value=%08x, status = %08x\n",
257 tmpdin, readl(®s->status));
260 printf("spi_xfer: timeout during SPI transfer, tm %d\n", ret);