2 * max98095.c -- MAX98095 ALSA SoC Audio driver
4 * Copyright 2011 Maxim Integrated Products
6 * Modified for uboot by R. Chandrasekar (rcsekar@samsung.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <asm/arch/clk.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/power.h>
27 struct max98095_priv {
34 static struct sound_codec_info g_codec_info;
35 struct max98095_priv g_max98095_info;
37 /* Index 0 is reserved. */
38 int rate_table[] = {0, 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
42 * Writes value to a device register through i2c
44 * @param priv Private data for driver
45 * @param reg reg number to be write
46 * @param data data to be writen to the above registor
48 * @return int value 1 for change, 0 for no change or negative error code.
50 static int max98095_i2c_write(struct max98095_priv *priv, unsigned int reg,
53 debug("%s: Write Addr : 0x%02X, Data : 0x%02X\n",
55 return i2c_write(priv->i2c_addr, reg, 1, &data, 1);
59 * Read a value from a device register through i2c
61 * @param priv Private data for driver
62 * @param reg reg number to be read
63 * @param data address of read data to be stored
65 * @return int value 0 for success, -1 in case of error.
67 static unsigned int max98095_i2c_read(struct max98095_priv *priv,
68 unsigned int reg, unsigned char *data)
72 ret = i2c_read(priv->i2c_addr, reg, 1, data, 1);
74 debug("%s: Error while reading register %#04x\n",
83 * update device register bits through i2c
85 * @param priv Private data for driver
86 * @param reg codec register
87 * @param mask register mask
88 * @param value new value
90 * @return int value 0 for success, non-zero error code.
92 static int max98095_bic_or(struct max98095_priv *priv, unsigned int reg,
93 unsigned char mask, unsigned char value)
96 unsigned char old, new;
98 if (max98095_i2c_read(priv, reg, &old) != 0)
100 new = (old & ~mask) | (value & mask);
101 change = (old != new) ? 1 : 0;
103 ret = max98095_i2c_write(priv, reg, new);
111 * codec mclk clock divider coefficients based on sampling rate
113 * @param rate sampling rate
114 * @param value address of indexvalue to be stored
116 * @return 0 for success or negative error code.
118 static int rate_value(int rate, u8 *value)
122 for (i = 1; i < ARRAY_SIZE(rate_table); i++) {
123 if (rate_table[i] >= rate) {
134 * Sets hw params for max98095
136 * @param priv max98095 information pointer
137 * @param rate Sampling rate
138 * @param bits_per_sample Bits per sample
140 * @return -1 for error and 0 Success.
142 static int max98095_hw_params(struct max98095_priv *priv,
143 enum en_max_audio_interface aif_id,
144 unsigned int rate, unsigned int bits_per_sample)
148 unsigned short M98095_DAI_CLKMODE;
149 unsigned short M98095_DAI_FORMAT;
150 unsigned short M98095_DAI_FILTERS;
152 if (aif_id == AIF1) {
153 M98095_DAI_CLKMODE = M98095_027_DAI1_CLKMODE;
154 M98095_DAI_FORMAT = M98095_02A_DAI1_FORMAT;
155 M98095_DAI_FILTERS = M98095_02E_DAI1_FILTERS;
157 M98095_DAI_CLKMODE = M98095_031_DAI2_CLKMODE;
158 M98095_DAI_FORMAT = M98095_034_DAI2_FORMAT;
159 M98095_DAI_FILTERS = M98095_038_DAI2_FILTERS;
162 switch (bits_per_sample) {
164 error = max98095_bic_or(priv, M98095_DAI_FORMAT, M98095_DAI_WS,
168 error = max98095_bic_or(priv, M98095_DAI_FORMAT, M98095_DAI_WS,
172 debug("%s: Illegal bits per sample %d.\n",
173 __func__, bits_per_sample);
177 if (rate_value(rate, ®val)) {
178 debug("%s: Failed to set sample rate to %d.\n",
184 error |= max98095_bic_or(priv, M98095_DAI_CLKMODE, M98095_CLKMODE_MASK,
187 /* Update sample rate mode */
189 error |= max98095_bic_or(priv, M98095_DAI_FILTERS,
192 error |= max98095_bic_or(priv, M98095_DAI_FILTERS,
193 M98095_DAI_DHF, M98095_DAI_DHF);
196 debug("%s: Error setting hardware params.\n", __func__);
204 * Configures Audio interface system clock for the given frequency
206 * @param priv max98095 information
207 * @param freq Sampling frequency in Hz
209 * @return -1 for error and 0 success.
211 static int max98095_set_sysclk(struct max98095_priv *priv, unsigned int freq)
215 /* Requested clock frequency is already setup */
216 if (freq == priv->sysclk)
219 /* Setup clocks for slave mode, and using the PLL
220 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
221 * 0x02 (when master clk is 20MHz to 40MHz)..
222 * 0x03 (when master clk is 40MHz to 60MHz)..
224 if ((freq >= 10000000) && (freq < 20000000)) {
225 error = max98095_i2c_write(priv, M98095_026_SYS_CLK, 0x10);
226 } else if ((freq >= 20000000) && (freq < 40000000)) {
227 error = max98095_i2c_write(priv, M98095_026_SYS_CLK, 0x20);
228 } else if ((freq >= 40000000) && (freq < 60000000)) {
229 error = max98095_i2c_write(priv, M98095_026_SYS_CLK, 0x30);
231 debug("%s: Invalid master clock frequency\n", __func__);
235 debug("%s: Clock at %uHz\n", __func__, freq);
245 * Sets Max98095 I2S format
247 * @param priv max98095 information
248 * @param fmt i2S format - supports a subset of the options defined
251 * @return -1 for error and 0 Success.
253 static int max98095_set_fmt(struct max98095_priv *priv, int fmt,
254 enum en_max_audio_interface aif_id)
258 unsigned short M98095_DAI_CLKCFG_HI;
259 unsigned short M98095_DAI_CLKCFG_LO;
260 unsigned short M98095_DAI_FORMAT;
261 unsigned short M98095_DAI_CLOCK;
263 if (fmt == priv->fmt)
268 if (aif_id == AIF1) {
269 M98095_DAI_CLKCFG_HI = M98095_028_DAI1_CLKCFG_HI;
270 M98095_DAI_CLKCFG_LO = M98095_029_DAI1_CLKCFG_LO;
271 M98095_DAI_FORMAT = M98095_02A_DAI1_FORMAT;
272 M98095_DAI_CLOCK = M98095_02B_DAI1_CLOCK;
274 M98095_DAI_CLKCFG_HI = M98095_032_DAI2_CLKCFG_HI;
275 M98095_DAI_CLKCFG_LO = M98095_033_DAI2_CLKCFG_LO;
276 M98095_DAI_FORMAT = M98095_034_DAI2_FORMAT;
277 M98095_DAI_CLOCK = M98095_035_DAI2_CLOCK;
280 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
281 case SND_SOC_DAIFMT_CBS_CFS:
283 error |= max98095_i2c_write(priv, M98095_DAI_CLKCFG_HI, 0x80);
284 error |= max98095_i2c_write(priv, M98095_DAI_CLKCFG_LO, 0x00);
286 case SND_SOC_DAIFMT_CBM_CFM:
287 /* Set to master mode */
288 regval |= M98095_DAI_MAS;
290 case SND_SOC_DAIFMT_CBS_CFM:
291 case SND_SOC_DAIFMT_CBM_CFS:
293 debug("%s: Clock mode unsupported\n", __func__);
297 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
298 case SND_SOC_DAIFMT_I2S:
299 regval |= M98095_DAI_DLY;
301 case SND_SOC_DAIFMT_LEFT_J:
304 debug("%s: Unrecognized format.\n", __func__);
308 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
309 case SND_SOC_DAIFMT_NB_NF:
311 case SND_SOC_DAIFMT_NB_IF:
312 regval |= M98095_DAI_WCI;
314 case SND_SOC_DAIFMT_IB_NF:
315 regval |= M98095_DAI_BCI;
317 case SND_SOC_DAIFMT_IB_IF:
318 regval |= M98095_DAI_BCI | M98095_DAI_WCI;
321 debug("%s: Unrecognized inversion settings.\n", __func__);
325 error |= max98095_bic_or(priv, M98095_DAI_FORMAT,
326 M98095_DAI_MAS | M98095_DAI_DLY |
327 M98095_DAI_BCI | M98095_DAI_WCI, regval);
329 error |= max98095_i2c_write(priv, M98095_DAI_CLOCK, M98095_DAI_BSEL64);
332 debug("%s: Error setting i2s format.\n", __func__);
340 * resets the audio codec
342 * @param priv Private data for driver
343 * @return -1 for error and 0 success.
345 static int max98095_reset(struct max98095_priv *priv)
350 * Gracefully reset the DSP core and the codec hardware in a proper
353 ret = max98095_i2c_write(priv, M98095_00F_HOST_CFG, 0);
355 debug("%s: Failed to reset DSP: %d\n", __func__, ret);
359 ret = max98095_i2c_write(priv, M98095_097_PWR_SYS, 0);
361 debug("%s: Failed to reset codec: %d\n", __func__, ret);
366 * Reset to hardware default for registers, as there is not a soft
367 * reset hardware control register.
369 for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) {
370 ret = max98095_i2c_write(priv, i, 0);
372 debug("%s: Failed to reset: %d\n", __func__, ret);
381 * Intialise max98095 codec device
383 * @param priv max98095 information
385 * @returns -1 for error and 0 Success.
387 static int max98095_device_init(struct max98095_priv *priv)
392 /* Enable codec clock */
395 /* reset the codec, the DSP core, and disable all interrupts */
396 error = max98095_reset(priv);
402 /* initialize private data */
407 error = max98095_i2c_read(priv, M98095_0FF_REV_ID, &id);
409 debug("%s: Failure reading hardware revision: %d\n",
413 debug("%s: Hardware revision: %c\n", __func__, (id - 0x40) + 'A');
418 static int max98095_setup_interface(struct max98095_priv *priv,
419 enum en_max_audio_interface aif_id)
423 error = max98095_i2c_write(priv, M98095_097_PWR_SYS, M98095_PWRSV);
426 * initialize registers to hardware default configuring audio
430 error |= max98095_i2c_write(priv, M98095_048_MIX_DAC_LR,
431 M98095_DAI1L_TO_DACL |
432 M98095_DAI1R_TO_DACR);
434 error |= max98095_i2c_write(priv, M98095_048_MIX_DAC_LR,
435 M98095_DAI2M_TO_DACL |
436 M98095_DAI2M_TO_DACR);
438 error |= max98095_i2c_write(priv, M98095_092_PWR_EN_OUT,
439 M98095_SPK_SPREADSPECTRUM);
440 error |= max98095_i2c_write(priv, M98095_04E_CFG_HP, M98095_HPNORMAL);
442 error |= max98095_i2c_write(priv, M98095_02C_DAI1_IOCFG,
443 M98095_S1NORMAL | M98095_SDATA);
445 error |= max98095_i2c_write(priv, M98095_036_DAI2_IOCFG,
446 M98095_S2NORMAL | M98095_SDATA);
448 /* take the codec out of the shut down */
449 error |= max98095_bic_or(priv, M98095_097_PWR_SYS, M98095_SHDNRUN,
452 * route DACL and DACR output to HO and Speakers
453 * Ordering: DACL, DACR, DACL, DACR
455 error |= max98095_i2c_write(priv, M98095_050_MIX_SPK_LEFT, 0x01);
456 error |= max98095_i2c_write(priv, M98095_051_MIX_SPK_RIGHT, 0x01);
457 error |= max98095_i2c_write(priv, M98095_04C_MIX_HP_LEFT, 0x01);
458 error |= max98095_i2c_write(priv, M98095_04D_MIX_HP_RIGHT, 0x01);
461 error |= max98095_i2c_write(priv, M98095_091_PWR_EN_OUT, 0xF3);
464 error |= max98095_i2c_write(priv, M98095_064_LVL_HP_L, 15);
465 error |= max98095_i2c_write(priv, M98095_065_LVL_HP_R, 15);
466 error |= max98095_i2c_write(priv, M98095_067_LVL_SPK_L, 16);
467 error |= max98095_i2c_write(priv, M98095_068_LVL_SPK_R, 16);
470 error |= max98095_i2c_write(priv, M98095_093_BIAS_CTRL, 0x30);
472 error |= max98095_i2c_write(priv, M98095_096_PWR_DAC_CK, 0x01);
474 error |= max98095_i2c_write(priv, M98095_096_PWR_DAC_CK, 0x07);
482 static int max98095_do_init(struct sound_codec_info *pcodec_info,
483 enum en_max_audio_interface aif_id,
484 int sampling_rate, int mclk_freq,
489 ret = max98095_setup_interface(&g_max98095_info, aif_id);
491 debug("%s: max98095 codec chip init failed\n", __func__);
495 ret = max98095_set_sysclk(&g_max98095_info, mclk_freq);
497 debug("%s: max98095 codec set sys clock failed\n", __func__);
501 ret = max98095_hw_params(&g_max98095_info, aif_id, sampling_rate,
505 ret = max98095_set_fmt(&g_max98095_info,
507 SND_SOC_DAIFMT_NB_NF |
508 SND_SOC_DAIFMT_CBS_CFS,
515 static int get_max98095_codec_values(struct sound_codec_info *pcodec_info,
519 enum fdt_compat_id compat;
523 /* Get the node from FDT for codec */
524 node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_98095_CODEC);
526 debug("EXYNOS_SOUND: No node for codec in device tree\n");
527 debug("node = %d\n", node);
531 parent = fdt_parent_offset(blob, node);
533 debug("%s: Cannot find node parent\n", __func__);
537 compat = fdtdec_lookup(blob, parent);
539 case COMPAT_SAMSUNG_S3C2440_I2C:
540 pcodec_info->i2c_bus = i2c_get_bus_num_fdt(parent);
541 error |= pcodec_info->i2c_bus;
542 debug("i2c bus = %d\n", pcodec_info->i2c_bus);
543 pcodec_info->i2c_dev_addr = fdtdec_get_int(blob, node,
545 error |= pcodec_info->i2c_dev_addr;
546 debug("i2c dev addr = %x\n", pcodec_info->i2c_dev_addr);
549 debug("%s: Unknown compat id %d\n", __func__, compat);
553 debug("fail to get max98095 codec node properties\n");
560 /* max98095 Device Initialisation */
561 int max98095_init(const void *blob, enum en_max_audio_interface aif_id,
562 int sampling_rate, int mclk_freq,
566 int old_bus = i2c_get_bus_num();
567 struct sound_codec_info *pcodec_info = &g_codec_info;
569 if (get_max98095_codec_values(pcodec_info, blob) < 0) {
570 debug("FDT Codec values failed\n");
574 i2c_set_bus_num(pcodec_info->i2c_bus);
576 /* shift the device address by 1 for 7 bit addressing */
577 g_max98095_info.i2c_addr = pcodec_info->i2c_dev_addr >> 1;
578 ret = max98095_device_init(&g_max98095_info);
580 debug("%s: max98095 codec chip init failed\n", __func__);
584 ret = max98095_do_init(pcodec_info, aif_id, sampling_rate, mclk_freq,
586 i2c_set_bus_num(old_bus);