1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Anup Patel <anup@brainfault.org>
8 #include <debug_uart.h>
14 #include <linux/compiler.h>
16 #include <linux/err.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 #define UART_TXFIFO_FULL 0x80000000
21 #define UART_RXFIFO_EMPTY 0x80000000
22 #define UART_RXFIFO_DATA 0x000000ff
23 #define UART_TXCTRL_TXEN 0x1
24 #define UART_RXCTRL_RXEN 0x1
27 #define UART_IP_RXWM 0x2
39 struct sifive_uart_platdata {
41 struct uart_sifive *regs;
45 * Find minimum divisor divides in_freq to max_target_hz;
46 * Based on uart driver n SiFive FSBL.
48 * f_baud = f_in / (div + 1) => div = (f_in / f_baud) - 1
49 * The nearest integer solution requires rounding up as to not exceed
51 * div = ceil(f_in / f_baud) - 1
52 * = floor((f_in - 1 + f_baud) / f_baud) - 1
53 * This should not overflow as long as (f_in - 1 + f_baud) does not exceed
54 * 2^32 - 1, which is unlikely since we represent frequencies in kHz.
56 static inline unsigned int uart_min_clk_divisor(unsigned long in_freq,
57 unsigned long max_target_hz)
59 unsigned long quotient =
60 (in_freq + max_target_hz - 1) / (max_target_hz);
68 /* Set up the baud rate in gd struct */
69 static void _sifive_serial_setbrg(struct uart_sifive *regs,
70 unsigned long clock, unsigned long baud)
72 writel((uart_min_clk_divisor(clock, baud)), ®s->div);
75 static void _sifive_serial_init(struct uart_sifive *regs)
77 writel(UART_TXCTRL_TXEN, ®s->txctrl);
78 writel(UART_RXCTRL_RXEN, ®s->rxctrl);
82 static int _sifive_serial_putc(struct uart_sifive *regs, const char c)
84 if (readl(®s->txfifo) & UART_TXFIFO_FULL)
87 writel(c, ®s->txfifo);
92 static int _sifive_serial_getc(struct uart_sifive *regs)
94 int ch = readl(®s->rxfifo);
96 if (ch & UART_RXFIFO_EMPTY)
98 ch &= UART_RXFIFO_DATA;
103 static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
107 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
110 ret = clk_get_by_index(dev, 0, &clk);
111 if (IS_ERR_VALUE(ret)) {
112 debug("SiFive UART failed to get clock\n");
113 ret = dev_read_u32(dev, "clock-frequency", &clock);
114 if (IS_ERR_VALUE(ret)) {
115 debug("SiFive UART clock not defined\n");
119 clock = clk_get_rate(&clk);
120 if (IS_ERR_VALUE(clock)) {
121 debug("SiFive UART clock get rate failed\n");
125 platdata->clock = clock;
126 _sifive_serial_setbrg(platdata->regs, platdata->clock, baudrate);
131 static int sifive_serial_probe(struct udevice *dev)
133 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
135 /* No need to reinitialize the UART after relocation */
136 if (gd->flags & GD_FLG_RELOC)
139 _sifive_serial_init(platdata->regs);
144 static int sifive_serial_getc(struct udevice *dev)
147 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
148 struct uart_sifive *regs = platdata->regs;
150 while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
155 static int sifive_serial_putc(struct udevice *dev, const char ch)
158 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
160 while ((rc = _sifive_serial_putc(platdata->regs, ch)) == -EAGAIN) ;
165 static int sifive_serial_pending(struct udevice *dev, bool input)
167 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
168 struct uart_sifive *regs = platdata->regs;
171 return (readl(®s->ip) & UART_IP_RXWM);
173 return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
176 static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
178 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
180 platdata->regs = (struct uart_sifive *)dev_read_addr(dev);
181 if (IS_ERR(platdata->regs))
182 return PTR_ERR(platdata->regs);
187 static const struct dm_serial_ops sifive_serial_ops = {
188 .putc = sifive_serial_putc,
189 .getc = sifive_serial_getc,
190 .pending = sifive_serial_pending,
191 .setbrg = sifive_serial_setbrg,
194 static const struct udevice_id sifive_serial_ids[] = {
195 { .compatible = "sifive,uart0" },
199 U_BOOT_DRIVER(serial_sifive) = {
200 .name = "serial_sifive",
202 .of_match = sifive_serial_ids,
203 .ofdata_to_platdata = sifive_serial_ofdata_to_platdata,
204 .platdata_auto_alloc_size = sizeof(struct sifive_uart_platdata),
205 .probe = sifive_serial_probe,
206 .ops = &sifive_serial_ops,
209 #ifdef CONFIG_DEBUG_UART_SIFIVE
210 static inline void _debug_uart_init(void)
212 struct uart_sifive *regs =
213 (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
215 _sifive_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK,
217 _sifive_serial_init(regs);
220 static inline void _debug_uart_putc(int ch)
222 struct uart_sifive *regs =
223 (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
225 while (_sifive_serial_putc(regs, ch) == -EAGAIN)