1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Anup Patel <anup@brainfault.org>
8 #include <debug_uart.h>
14 #include <linux/compiler.h>
17 DECLARE_GLOBAL_DATA_PTR;
19 #define UART_TXFIFO_FULL 0x80000000
20 #define UART_RXFIFO_EMPTY 0x80000000
21 #define UART_RXFIFO_DATA 0x000000ff
22 #define UART_TXCTRL_TXEN 0x1
23 #define UART_RXCTRL_RXEN 0x1
35 struct sifive_uart_platdata {
38 struct uart_sifive *regs;
42 * Find minimum divisor divides in_freq to max_target_hz;
43 * Based on uart driver n SiFive FSBL.
45 * f_baud = f_in / (div + 1) => div = (f_in / f_baud) - 1
46 * The nearest integer solution requires rounding up as to not exceed
48 * div = ceil(f_in / f_baud) - 1
49 * = floor((f_in - 1 + f_baud) / f_baud) - 1
50 * This should not overflow as long as (f_in - 1 + f_baud) does not exceed
51 * 2^32 - 1, which is unlikely since we represent frequencies in kHz.
53 static inline unsigned int uart_min_clk_divisor(unsigned long in_freq,
54 unsigned long max_target_hz)
56 unsigned long quotient =
57 (in_freq + max_target_hz - 1) / (max_target_hz);
65 /* Set up the baud rate in gd struct */
66 static void _sifive_serial_setbrg(struct uart_sifive *regs,
67 unsigned long clock, unsigned long baud)
69 writel((uart_min_clk_divisor(clock, baud)), ®s->div);
72 static void _sifive_serial_init(struct uart_sifive *regs)
74 writel(UART_TXCTRL_TXEN, ®s->txctrl);
75 writel(UART_RXCTRL_RXEN, ®s->rxctrl);
79 static int _sifive_serial_putc(struct uart_sifive *regs, const char c)
81 if (readl(®s->txfifo) & UART_TXFIFO_FULL)
84 writel(c, ®s->txfifo);
89 static int _sifive_serial_getc(struct uart_sifive *regs)
91 int ch = readl(®s->rxfifo);
93 if (ch & UART_RXFIFO_EMPTY)
95 ch &= UART_RXFIFO_DATA;
97 return (!ch) ? -EAGAIN : ch;
100 static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
104 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
107 ret = clk_get_by_index(dev, 0, &clk);
108 if (IS_ERR_VALUE(ret)) {
109 debug("SiFive UART failed to get clock\n");
110 ret = dev_read_u32(dev, "clock-frequency", &clock);
111 if (IS_ERR_VALUE(ret)) {
112 debug("SiFive UART clock not defined\n");
116 clock = clk_get_rate(&clk);
117 if (IS_ERR_VALUE(clock)) {
118 debug("SiFive UART clock get rate failed\n");
122 platdata->clock = clock;
123 _sifive_serial_setbrg(platdata->regs, platdata->clock, baudrate);
128 static int sifive_serial_probe(struct udevice *dev)
130 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
132 /* No need to reinitialize the UART after relocation */
133 if (gd->flags & GD_FLG_RELOC)
136 platdata->saved_input_char = 0;
137 _sifive_serial_init(platdata->regs);
142 static int sifive_serial_getc(struct udevice *dev)
145 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
146 struct uart_sifive *regs = platdata->regs;
148 if (platdata->saved_input_char > 0) {
149 c = platdata->saved_input_char;
150 platdata->saved_input_char = 0;
154 while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
159 static int sifive_serial_putc(struct udevice *dev, const char ch)
162 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
164 while ((rc = _sifive_serial_putc(platdata->regs, ch)) == -EAGAIN) ;
169 static int sifive_serial_pending(struct udevice *dev, bool input)
171 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
172 struct uart_sifive *regs = platdata->regs;
175 if (platdata->saved_input_char > 0)
177 platdata->saved_input_char = _sifive_serial_getc(regs);
178 return (platdata->saved_input_char > 0) ? 1 : 0;
180 return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
184 static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
186 struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
188 platdata->regs = (struct uart_sifive *)dev_read_addr(dev);
189 if (IS_ERR(platdata->regs))
190 return PTR_ERR(platdata->regs);
195 static const struct dm_serial_ops sifive_serial_ops = {
196 .putc = sifive_serial_putc,
197 .getc = sifive_serial_getc,
198 .pending = sifive_serial_pending,
199 .setbrg = sifive_serial_setbrg,
202 static const struct udevice_id sifive_serial_ids[] = {
203 { .compatible = "sifive,uart0" },
207 U_BOOT_DRIVER(serial_sifive) = {
208 .name = "serial_sifive",
210 .of_match = sifive_serial_ids,
211 .ofdata_to_platdata = sifive_serial_ofdata_to_platdata,
212 .platdata_auto_alloc_size = sizeof(struct sifive_uart_platdata),
213 .probe = sifive_serial_probe,
214 .ops = &sifive_serial_ops,
217 #ifdef CONFIG_DEBUG_UART_SIFIVE
218 static inline void _debug_uart_init(void)
220 struct uart_sifive *regs =
221 (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
223 _sifive_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK,
225 _sifive_serial_init(regs);
228 static inline void _debug_uart_putc(int ch)
230 struct uart_sifive *regs =
231 (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
233 while (_sifive_serial_putc(regs, ch) == -EAGAIN)