1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek High-speed UART driver
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Weijie Gao <weijie.gao@mediatek.com>
17 #include <asm/types.h>
18 #include <linux/err.h>
20 struct mtk_serial_regs {
45 #define UART_LCR_WLS_8 0x03 /* 8 bit character length */
46 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
48 #define UART_LSR_DR 0x01 /* Data ready */
49 #define UART_LSR_THRE 0x20 /* Xmit holding register empty */
50 #define UART_LSR_TEMT 0x40 /* Xmitter empty */
52 #define UART_MCR_DTR 0x01 /* DTR */
53 #define UART_MCR_RTS 0x02 /* RTS */
55 #define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
56 #define UART_FCR_RXSR 0x02 /* Receiver soft reset */
57 #define UART_FCR_TXSR 0x04 /* Transmitter soft reset */
59 #define UART_MCRVAL (UART_MCR_DTR | \
62 /* Clear & enable FIFOs */
63 #define UART_FCRVAL (UART_FCR_FIFO_EN | \
67 /* the data is correct if the real baud is within 3%. */
68 #define BAUD_ALLOW_MAX(baud) ((baud) + (baud) * 3 / 100)
69 #define BAUD_ALLOW_MIX(baud) ((baud) - (baud) * 3 / 100)
71 struct mtk_serial_priv {
72 struct mtk_serial_regs __iomem *regs;
76 static void _mtk_serial_setbrg(struct mtk_serial_priv *priv, int baud)
78 bool support_clk12m_baud115200;
79 u32 quot, samplecount, realbaud;
81 if ((baud <= 115200) && (priv->clock == 12000000))
82 support_clk12m_baud115200 = true;
84 support_clk12m_baud115200 = false;
87 writel(0, &priv->regs->highspeed);
88 quot = DIV_ROUND_CLOSEST(priv->clock, 16 * baud);
90 if (support_clk12m_baud115200) {
91 writel(3, &priv->regs->highspeed);
92 quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
96 samplecount = DIV_ROUND_CLOSEST(priv->clock,
98 if (samplecount != 0) {
99 realbaud = priv->clock / samplecount / quot;
100 if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
101 (realbaud < BAUD_ALLOW_MIX(baud))) {
102 pr_info("baud %d can't be handled\n",
106 pr_info("samplecount is 0\n");
109 } else if (baud <= 576000) {
110 writel(2, &priv->regs->highspeed);
112 /* Set to next lower baudrate supported */
113 if ((baud == 500000) || (baud == 576000))
115 quot = DIV_ROUND_UP(priv->clock, 4 * baud);
117 writel(3, &priv->regs->highspeed);
118 quot = DIV_ROUND_UP(priv->clock, 256 * baud);
122 writel(UART_LCR_WLS_8 | UART_LCR_DLAB, &priv->regs->lcr);
123 writel(quot & 0xff, &priv->regs->dll);
124 writel((quot >> 8) & 0xff, &priv->regs->dlm);
125 writel(UART_LCR_WLS_8, &priv->regs->lcr);
130 tmp = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
131 writel(tmp - 1, &priv->regs->sample_count);
132 writel((tmp - 2) >> 1, &priv->regs->sample_point);
134 writel(0, &priv->regs->sample_count);
135 writel(0xff, &priv->regs->sample_point);
138 if (support_clk12m_baud115200) {
139 writel(samplecount - 1, &priv->regs->sample_count);
140 writel((samplecount - 2) >> 1, &priv->regs->sample_point);
144 static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch)
146 if (!(readl(&priv->regs->lsr) & UART_LSR_THRE))
149 writel(ch, &priv->regs->thr);
157 static int _mtk_serial_getc(struct mtk_serial_priv *priv)
159 if (!(readl(&priv->regs->lsr) & UART_LSR_DR))
162 return readl(&priv->regs->rbr);
165 static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input)
168 return (readl(&priv->regs->lsr) & UART_LSR_DR) ? 1 : 0;
170 return (readl(&priv->regs->lsr) & UART_LSR_THRE) ? 0 : 1;
173 #if defined(CONFIG_DM_SERIAL) && \
174 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_DM))
175 static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
177 struct mtk_serial_priv *priv = dev_get_priv(dev);
179 _mtk_serial_setbrg(priv, baudrate);
184 static int mtk_serial_putc(struct udevice *dev, const char ch)
186 struct mtk_serial_priv *priv = dev_get_priv(dev);
188 return _mtk_serial_putc(priv, ch);
191 static int mtk_serial_getc(struct udevice *dev)
193 struct mtk_serial_priv *priv = dev_get_priv(dev);
195 return _mtk_serial_getc(priv);
198 static int mtk_serial_pending(struct udevice *dev, bool input)
200 struct mtk_serial_priv *priv = dev_get_priv(dev);
202 return _mtk_serial_pending(priv, input);
205 static int mtk_serial_probe(struct udevice *dev)
207 struct mtk_serial_priv *priv = dev_get_priv(dev);
209 /* Disable interrupt */
210 writel(0, &priv->regs->ier);
212 writel(UART_MCRVAL, &priv->regs->mcr);
213 writel(UART_FCRVAL, &priv->regs->fcr);
218 static int mtk_serial_ofdata_to_platdata(struct udevice *dev)
220 struct mtk_serial_priv *priv = dev_get_priv(dev);
225 addr = dev_read_addr(dev);
226 if (addr == FDT_ADDR_T_NONE)
229 priv->regs = map_physmem(addr, 0, MAP_NOCACHE);
231 err = clk_get_by_index(dev, 0, &clk);
233 err = clk_get_rate(&clk);
234 if (!IS_ERR_VALUE(err))
236 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
237 debug("mtk_serial: failed to get clock\n");
242 priv->clock = dev_read_u32_default(dev, "clock-frequency", 0);
245 debug("mtk_serial: clock not defined\n");
252 static const struct dm_serial_ops mtk_serial_ops = {
253 .putc = mtk_serial_putc,
254 .pending = mtk_serial_pending,
255 .getc = mtk_serial_getc,
256 .setbrg = mtk_serial_setbrg,
259 static const struct udevice_id mtk_serial_ids[] = {
260 { .compatible = "mediatek,hsuart" },
261 { .compatible = "mediatek,mt6577-uart" },
265 U_BOOT_DRIVER(serial_mtk) = {
266 .name = "serial_mtk",
268 .of_match = mtk_serial_ids,
269 .ofdata_to_platdata = mtk_serial_ofdata_to_platdata,
270 .priv_auto_alloc_size = sizeof(struct mtk_serial_priv),
271 .probe = mtk_serial_probe,
272 .ops = &mtk_serial_ops,
273 .flags = DM_FLAG_PRE_RELOC,
277 DECLARE_GLOBAL_DATA_PTR;
279 #define DECLARE_HSUART_PRIV(port) \
280 static struct mtk_serial_priv mtk_hsuart##port = { \
281 .regs = (struct mtk_serial_regs *)CONFIG_SYS_NS16550_COM##port, \
282 .clock = CONFIG_SYS_NS16550_CLK \
285 #define DECLARE_HSUART_FUNCTIONS(port) \
286 static int mtk_serial##port##_init(void) \
288 writel(0, &mtk_hsuart##port.regs->ier); \
289 writel(UART_MCRVAL, &mtk_hsuart##port.regs->mcr); \
290 writel(UART_FCRVAL, &mtk_hsuart##port.regs->fcr); \
291 _mtk_serial_setbrg(&mtk_hsuart##port, gd->baudrate); \
294 static void mtk_serial##port##_setbrg(void) \
296 _mtk_serial_setbrg(&mtk_hsuart##port, gd->baudrate); \
298 static int mtk_serial##port##_getc(void) \
302 err = _mtk_serial_getc(&mtk_hsuart##port); \
303 if (err == -EAGAIN) \
305 } while (err == -EAGAIN); \
306 return err >= 0 ? err : 0; \
308 static int mtk_serial##port##_tstc(void) \
310 return _mtk_serial_pending(&mtk_hsuart##port, true); \
312 static void mtk_serial##port##_putc(const char c) \
316 mtk_serial##port##_putc('\r'); \
318 err = _mtk_serial_putc(&mtk_hsuart##port, c); \
319 } while (err == -EAGAIN); \
321 static void mtk_serial##port##_puts(const char *s) \
324 mtk_serial##port##_putc(*s++); \
328 /* Serial device descriptor */
329 #define INIT_HSUART_STRUCTURE(port, __name) { \
331 .start = mtk_serial##port##_init, \
333 .setbrg = mtk_serial##port##_setbrg, \
334 .getc = mtk_serial##port##_getc, \
335 .tstc = mtk_serial##port##_tstc, \
336 .putc = mtk_serial##port##_putc, \
337 .puts = mtk_serial##port##_puts, \
340 #define DECLARE_HSUART(port, __name) \
341 DECLARE_HSUART_PRIV(port); \
342 DECLARE_HSUART_FUNCTIONS(port); \
343 struct serial_device mtk_hsuart##port##_device = \
344 INIT_HSUART_STRUCTURE(port, __name);
346 #if !defined(CONFIG_CONS_INDEX)
347 #elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 6)
348 #error "Invalid console index value."
351 #if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1)
352 #error "Console port 1 defined but not configured."
353 #elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2)
354 #error "Console port 2 defined but not configured."
355 #elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3)
356 #error "Console port 3 defined but not configured."
357 #elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4)
358 #error "Console port 4 defined but not configured."
359 #elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5)
360 #error "Console port 5 defined but not configured."
361 #elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6)
362 #error "Console port 6 defined but not configured."
365 #if defined(CONFIG_SYS_NS16550_COM1)
366 DECLARE_HSUART(1, "mtk-hsuart0");
368 #if defined(CONFIG_SYS_NS16550_COM2)
369 DECLARE_HSUART(2, "mtk-hsuart1");
371 #if defined(CONFIG_SYS_NS16550_COM3)
372 DECLARE_HSUART(3, "mtk-hsuart2");
374 #if defined(CONFIG_SYS_NS16550_COM4)
375 DECLARE_HSUART(4, "mtk-hsuart3");
377 #if defined(CONFIG_SYS_NS16550_COM5)
378 DECLARE_HSUART(5, "mtk-hsuart4");
380 #if defined(CONFIG_SYS_NS16550_COM6)
381 DECLARE_HSUART(6, "mtk-hsuart5");
384 __weak struct serial_device *default_serial_console(void)
386 #if CONFIG_CONS_INDEX == 1
387 return &mtk_hsuart1_device;
388 #elif CONFIG_CONS_INDEX == 2
389 return &mtk_hsuart2_device;
390 #elif CONFIG_CONS_INDEX == 3
391 return &mtk_hsuart3_device;
392 #elif CONFIG_CONS_INDEX == 4
393 return &mtk_hsuart4_device;
394 #elif CONFIG_CONS_INDEX == 5
395 return &mtk_hsuart5_device;
396 #elif CONFIG_CONS_INDEX == 6
397 return &mtk_hsuart6_device;
399 #error "Bad CONFIG_CONS_INDEX."
403 void mtk_serial_initialize(void)
405 #if defined(CONFIG_SYS_NS16550_COM1)
406 serial_register(&mtk_hsuart1_device);
408 #if defined(CONFIG_SYS_NS16550_COM2)
409 serial_register(&mtk_hsuart2_device);
411 #if defined(CONFIG_SYS_NS16550_COM3)
412 serial_register(&mtk_hsuart3_device);
414 #if defined(CONFIG_SYS_NS16550_COM4)
415 serial_register(&mtk_hsuart4_device);
417 #if defined(CONFIG_SYS_NS16550_COM5)
418 serial_register(&mtk_hsuart5_device);
420 #if defined(CONFIG_SYS_NS16550_COM6)
421 serial_register(&mtk_hsuart6_device);
427 #ifdef CONFIG_DEBUG_UART_MTK
429 #include <debug_uart.h>
431 static inline void _debug_uart_init(void)
433 struct mtk_serial_priv priv;
435 priv.regs = (void *) CONFIG_DEBUG_UART_BASE;
436 priv.clock = CONFIG_DEBUG_UART_CLOCK;
438 writel(0, &priv.regs->ier);
439 writel(UART_MCRVAL, &priv.regs->mcr);
440 writel(UART_FCRVAL, &priv.regs->fcr);
442 _mtk_serial_setbrg(&priv, CONFIG_BAUDRATE);
445 static inline void _debug_uart_putc(int ch)
447 struct mtk_serial_regs __iomem *regs =
448 (void *) CONFIG_DEBUG_UART_BASE;
450 while (!(readl(®s->lsr) & UART_LSR_THRE))
453 writel(ch, ®s->thr);