2 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/compiler.h>
14 DECLARE_GLOBAL_DATA_PTR;
24 struct meson_serial_platdata {
25 struct meson_uart *reg;
28 /* AML_UART_STATUS bits */
29 #define AML_UART_PARITY_ERR BIT(16)
30 #define AML_UART_FRAME_ERR BIT(17)
31 #define AML_UART_TX_FIFO_WERR BIT(18)
32 #define AML_UART_RX_EMPTY BIT(20)
33 #define AML_UART_TX_FULL BIT(21)
34 #define AML_UART_TX_EMPTY BIT(22)
35 #define AML_UART_XMIT_BUSY BIT(25)
36 #define AML_UART_ERR (AML_UART_PARITY_ERR | \
37 AML_UART_FRAME_ERR | \
38 AML_UART_TX_FIFO_WERR)
40 /* AML_UART_CONTROL bits */
41 #define AML_UART_TX_EN BIT(12)
42 #define AML_UART_RX_EN BIT(13)
43 #define AML_UART_TX_RST BIT(22)
44 #define AML_UART_RX_RST BIT(23)
45 #define AML_UART_CLR_ERR BIT(24)
47 static void meson_serial_init(struct meson_uart *uart)
51 val = readl(&uart->control);
52 val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
53 writel(val, &uart->control);
54 val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
55 writel(val, &uart->control);
56 val |= (AML_UART_RX_EN | AML_UART_TX_EN);
57 writel(val, &uart->control);
60 static int meson_serial_probe(struct udevice *dev)
62 struct meson_serial_platdata *plat = dev->platdata;
63 struct meson_uart *const uart = plat->reg;
65 meson_serial_init(uart);
70 static int meson_serial_getc(struct udevice *dev)
72 struct meson_serial_platdata *plat = dev->platdata;
73 struct meson_uart *const uart = plat->reg;
75 if (readl(&uart->status) & AML_UART_RX_EMPTY)
78 return readl(&uart->rfifo) & 0xff;
81 static int meson_serial_putc(struct udevice *dev, const char ch)
83 struct meson_serial_platdata *plat = dev->platdata;
84 struct meson_uart *const uart = plat->reg;
86 if (readl(&uart->status) & AML_UART_TX_FULL)
89 writel(ch, &uart->wfifo);
94 static int meson_serial_pending(struct udevice *dev, bool input)
96 struct meson_serial_platdata *plat = dev->platdata;
97 struct meson_uart *const uart = plat->reg;
98 uint32_t status = readl(&uart->status);
101 return !(status & AML_UART_RX_EMPTY);
103 return !(status & AML_UART_TX_FULL);
106 static int meson_serial_ofdata_to_platdata(struct udevice *dev)
108 struct meson_serial_platdata *plat = dev->platdata;
111 addr = dev_get_addr(dev);
112 if (addr == FDT_ADDR_T_NONE)
115 plat->reg = (struct meson_uart *)addr;
120 static const struct dm_serial_ops meson_serial_ops = {
121 .putc = meson_serial_putc,
122 .pending = meson_serial_pending,
123 .getc = meson_serial_getc,
126 static const struct udevice_id meson_serial_ids[] = {
127 { .compatible = "amlogic,meson-uart" },
131 U_BOOT_DRIVER(serial_meson) = {
132 .name = "serial_meson",
134 .of_match = meson_serial_ids,
135 .probe = meson_serial_probe,
136 .ops = &meson_serial_ops,
137 .flags = DM_FLAG_PRE_RELOC,
138 .ofdata_to_platdata = meson_serial_ofdata_to_platdata,
139 .platdata_auto_alloc_size = sizeof(struct meson_serial_platdata),
142 #ifdef CONFIG_DEBUG_UART_MESON
144 #include <debug_uart.h>
146 static inline void _debug_uart_init(void)
150 static inline void _debug_uart_putc(int ch)
152 struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE;
154 while (readl(®s->status) & AML_UART_TX_FULL)
157 writel(ch, ®s->wfifo);