2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/compiler.h>
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/clock.h>
15 #define US1_TDRE (1 << 7)
16 #define US1_RDRF (1 << 5)
17 #define US1_OR (1 << 3)
18 #define UC2_TE (1 << 3)
19 #define UC2_RE (1 << 2)
20 #define CFIFO_TXFLUSH (1 << 7)
21 #define CFIFO_RXFLUSH (1 << 6)
22 #define SFIFO_RXOF (1 << 2)
23 #define SFIFO_RXUF (1 << 0)
25 #define STAT_LBKDIF (1 << 31)
26 #define STAT_RXEDGIF (1 << 30)
27 #define STAT_TDRE (1 << 23)
28 #define STAT_RDRF (1 << 21)
29 #define STAT_IDLE (1 << 20)
30 #define STAT_OR (1 << 19)
31 #define STAT_NF (1 << 18)
32 #define STAT_FE (1 << 17)
33 #define STAT_PF (1 << 16)
34 #define STAT_MA1F (1 << 15)
35 #define STAT_MA2F (1 << 14)
36 #define STAT_FLAGS (STAT_LBKDIF | STAT_RXEDGIF | STAT_IDLE | STAT_OR | \
37 STAT_NF | STAT_FE | STAT_PF | STAT_MA1F | STAT_MA2F)
39 #define CTRL_TE (1 << 19)
40 #define CTRL_RE (1 << 18)
42 #define FIFO_TXFE 0x80
43 #define FIFO_RXFE 0x40
45 #define WATER_TXWATER_OFF 1
46 #define WATER_RXWATER_OFF 16
48 DECLARE_GLOBAL_DATA_PTR;
50 struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
52 #ifndef CONFIG_LPUART_32B_REG
53 static void _lpuart_serial_setbrg(struct lpuart_fsl *base, int baudrate)
55 u32 clk = mxc_get_clock(MXC_UART_CLK);
58 sbr = (u16)(clk / (16 * baudrate));
60 /* place adjustment later - n/32 BRFA */
61 __raw_writeb(sbr >> 8, &base->ubdh);
62 __raw_writeb(sbr & 0xff, &base->ubdl);
65 static int _lpuart_serial_getc(struct lpuart_fsl *base)
67 while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR)))
72 return __raw_readb(&base->ud);
75 static void _lpuart_serial_putc(struct lpuart_fsl *base, const char c)
78 _lpuart_serial_putc(base, '\r');
80 while (!(__raw_readb(&base->us1) & US1_TDRE))
83 __raw_writeb(c, &base->ud);
86 /* Test whether a character is in the RX buffer */
87 static int _lpuart_serial_tstc(struct lpuart_fsl *base)
89 if (__raw_readb(&base->urcfifo) == 0)
96 * Initialise the serial port with the given baudrate. The settings
97 * are always 8 data bits, no parity, 1 stop bit, no start bits.
99 static int _lpuart_serial_init(struct lpuart_fsl *base)
103 ctrl = __raw_readb(&base->uc2);
106 __raw_writeb(ctrl, &base->uc2);
108 __raw_writeb(0, &base->umodem);
109 __raw_writeb(0, &base->uc1);
111 /* Disable FIFO and flush buffer */
112 __raw_writeb(0x0, &base->upfifo);
113 __raw_writeb(0x0, &base->utwfifo);
114 __raw_writeb(0x1, &base->urwfifo);
115 __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo);
117 /* provide data bits, parity, stop bit, etc */
118 _lpuart_serial_setbrg(base, gd->baudrate);
120 __raw_writeb(UC2_RE | UC2_TE, &base->uc2);
125 static void lpuart_serial_setbrg(void)
127 _lpuart_serial_setbrg(base, gd->baudrate);
130 static int lpuart_serial_getc(void)
132 return _lpuart_serial_getc(base);
135 static void lpuart_serial_putc(const char c)
137 _lpuart_serial_putc(base, c);
140 static int lpuart_serial_tstc(void)
142 return _lpuart_serial_tstc(base);
145 static int lpuart_serial_init(void)
147 return _lpuart_serial_init(base);
150 static struct serial_device lpuart_serial_drv = {
151 .name = "lpuart_serial",
152 .start = lpuart_serial_init,
154 .setbrg = lpuart_serial_setbrg,
155 .putc = lpuart_serial_putc,
156 .puts = default_serial_puts,
157 .getc = lpuart_serial_getc,
158 .tstc = lpuart_serial_tstc,
161 static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate)
163 u32 clk = CONFIG_SYS_CLK_FREQ;
166 sbr = (clk / (16 * baudrate));
168 /* place adjustment later - n/32 BRFA */
169 out_be32(&base->baud, sbr);
172 static int _lpuart32_serial_getc(struct lpuart_fsl *base)
176 while (((stat = in_be32(&base->stat)) & STAT_RDRF) == 0) {
177 out_be32(&base->stat, STAT_FLAGS);
181 return in_be32(&base->data) & 0x3ff;
184 static void _lpuart32_serial_putc(struct lpuart_fsl *base, const char c)
187 _lpuart32_serial_putc(base, '\r');
189 while (!(in_be32(&base->stat) & STAT_TDRE))
192 out_be32(&base->data, c);
195 /* Test whether a character is in the RX buffer */
196 static int _lpuart32_serial_tstc(struct lpuart_fsl *base)
198 if ((in_be32(&base->water) >> 24) == 0)
205 * Initialise the serial port with the given baudrate. The settings
206 * are always 8 data bits, no parity, 1 stop bit, no start bits.
208 static int _lpuart32_serial_init(struct lpuart_fsl *base)
212 ctrl = in_be32(&base->ctrl);
215 out_be32(&base->ctrl, ctrl);
217 out_be32(&base->modir, 0);
218 out_be32(&base->fifo, ~(FIFO_TXFE | FIFO_RXFE));
220 out_be32(&base->match, 0);
222 /* provide data bits, parity, stop bit, etc */
223 _lpuart32_serial_setbrg(base, gd->baudrate);
225 out_be32(&base->ctrl, CTRL_RE | CTRL_TE);
230 static void lpuart32_serial_setbrg(void)
232 _lpuart32_serial_setbrg(base, gd->baudrate);
235 static int lpuart32_serial_getc(void)
237 return _lpuart32_serial_getc(base);
240 static void lpuart32_serial_putc(const char c)
242 _lpuart32_serial_putc(base, c);
245 static int lpuart32_serial_tstc(void)
247 return _lpuart32_serial_tstc(base);
250 static int lpuart32_serial_init(void)
252 return _lpuart32_serial_init(base);
255 static struct serial_device lpuart32_serial_drv = {
256 .name = "lpuart32_serial",
257 .start = lpuart32_serial_init,
259 .setbrg = lpuart32_serial_setbrg,
260 .putc = lpuart32_serial_putc,
261 .puts = default_serial_puts,
262 .getc = lpuart32_serial_getc,
263 .tstc = lpuart32_serial_tstc,
267 void lpuart_serial_initialize(void)
269 #ifdef CONFIG_LPUART_32B_REG
270 serial_register(&lpuart32_serial_drv);
272 serial_register(&lpuart_serial_drv);
276 __weak struct serial_device *default_serial_console(void)
278 #ifdef CONFIG_LPUART_32B_REG
279 return &lpuart32_serial_drv;
281 return &lpuart_serial_drv;