3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
14 #include <linux/types.h>
17 DECLARE_GLOBAL_DATA_PTR;
19 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
20 #define UART_MCRVAL (UART_MCR_DTR | \
21 UART_MCR_RTS) /* RTS/DTR */
22 #define UART_FCRVAL (UART_FCR_FIFO_EN | \
24 UART_FCR_TXSR) /* Clear & enable FIFOs */
26 #ifndef CONFIG_DM_SERIAL
27 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
28 #define serial_out(x, y) outb(x, (ulong)y)
29 #define serial_in(y) inb((ulong)y)
30 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
31 #define serial_out(x, y) out_be32(y, x)
32 #define serial_in(y) in_be32(y)
33 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
34 #define serial_out(x, y) out_le32(y, x)
35 #define serial_in(y) in_le32(y)
37 #define serial_out(x, y) writeb(x, y)
38 #define serial_in(y) readb(y)
40 #endif /* !CONFIG_DM_SERIAL */
42 #if defined(CONFIG_SOC_KEYSTONE)
43 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
44 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
46 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
47 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
49 #define UART_MCRVAL (UART_MCR_RTS)
53 #ifndef CONFIG_SYS_NS16550_IER
54 #define CONFIG_SYS_NS16550_IER 0x00
55 #endif /* CONFIG_SYS_NS16550_IER */
57 #ifdef CONFIG_DM_SERIAL
58 static void ns16550_writeb(NS16550_t port, int offset, int value)
60 struct ns16550_platdata *plat = port->plat;
63 offset *= 1 << plat->reg_shift;
64 addr = map_sysmem(plat->base, 0) + offset;
66 * As far as we know it doesn't make sense to support selection of
67 * these options at run-time, so use the existing CONFIG options.
69 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
70 outb(value, (ulong)addr);
71 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
72 out_le32(addr, value);
73 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
74 out_be32(addr, value);
75 #elif defined(CONFIG_SYS_BIG_ENDIAN)
76 writeb(value, addr + (1 << plat->reg_shift) - 1);
82 static int ns16550_readb(NS16550_t port, int offset)
84 struct ns16550_platdata *plat = port->plat;
87 offset *= 1 << plat->reg_shift;
88 addr = map_sysmem(plat->base, 0) + offset;
89 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
90 return inb((ulong)addr);
91 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
93 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
95 #elif defined(CONFIG_SYS_BIG_ENDIAN)
96 return readb(addr + (1 << plat->reg_shift) - 1);
102 /* We can clean these up once everything is moved to driver model */
103 #define serial_out(value, addr) \
104 ns16550_writeb(com_port, addr - (unsigned char *)com_port, value)
105 #define serial_in(addr) \
106 ns16550_readb(com_port, addr - (unsigned char *)com_port)
109 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
111 const unsigned int mode_x_div = 16;
113 #ifdef CONFIG_OMAP1510
114 /* If can't cleanly clock 115200 set div to 1 */
115 if ((clock == 12000000) && (baudrate == 115200)) {
116 port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
117 return 1; /* return 1 for base divisor */
119 port->osc_12m_sel = 0; /* clear if previsouly set */
122 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
125 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
127 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
128 serial_out(baud_divisor & 0xff, &com_port->dll);
129 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
130 serial_out(UART_LCRVAL, &com_port->lcr);
133 void NS16550_init(NS16550_t com_port, int baud_divisor)
135 #if (defined(CONFIG_SPL_BUILD) && \
136 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
138 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
139 * before SPL starts only THRE bit is set. We have to empty the
140 * transmitter before initialization starts.
142 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
144 if (baud_divisor != -1)
145 NS16550_setbrg(com_port, baud_divisor);
146 serial_out(0, &com_port->mdr1);
150 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
153 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
154 #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
155 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
156 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
158 NS16550_setbrg(com_port, 0);
159 serial_out(UART_MCRVAL, &com_port->mcr);
160 serial_out(UART_FCRVAL, &com_port->fcr);
161 if (baud_divisor != -1)
162 NS16550_setbrg(com_port, baud_divisor);
163 #if defined(CONFIG_OMAP) || \
164 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
165 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
167 /* /16 is proper to hit 115200 with 48MHz */
168 serial_out(0, &com_port->mdr1);
169 #endif /* CONFIG_OMAP */
170 #if defined(CONFIG_SOC_KEYSTONE)
171 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
175 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
176 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
178 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
179 NS16550_setbrg(com_port, 0);
180 serial_out(UART_MCRVAL, &com_port->mcr);
181 serial_out(UART_FCRVAL, &com_port->fcr);
182 NS16550_setbrg(com_port, baud_divisor);
184 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
186 void NS16550_putc(NS16550_t com_port, char c)
188 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
190 serial_out(c, &com_port->thr);
193 * Call watchdog_reset() upon newline. This is done here in putc
194 * since the environment code uses a single puts() to print the complete
195 * environment upon "printenv". So we can't put this watchdog call
202 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
203 char NS16550_getc(NS16550_t com_port)
205 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
206 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
207 extern void usbtty_poll(void);
212 return serial_in(&com_port->rbr);
215 int NS16550_tstc(NS16550_t com_port)
217 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
220 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
222 #ifdef CONFIG_DM_SERIAL
223 static int ns16550_serial_putc(struct udevice *dev, const char ch)
225 struct NS16550 *const com_port = dev_get_priv(dev);
227 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
229 serial_out(ch, &com_port->thr);
232 * Call watchdog_reset() upon newline. This is done here in putc
233 * since the environment code uses a single puts() to print the complete
234 * environment upon "printenv". So we can't put this watchdog call
243 static int ns16550_serial_pending(struct udevice *dev, bool input)
245 struct NS16550 *const com_port = dev_get_priv(dev);
248 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
250 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
253 static int ns16550_serial_getc(struct udevice *dev)
255 struct NS16550 *const com_port = dev_get_priv(dev);
257 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
260 return serial_in(&com_port->rbr);
263 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
265 struct NS16550 *const com_port = dev_get_priv(dev);
266 struct ns16550_platdata *plat = com_port->plat;
269 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
271 NS16550_setbrg(com_port, clock_divisor);
276 int ns16550_serial_probe(struct udevice *dev)
278 struct NS16550 *const com_port = dev_get_priv(dev);
280 com_port->plat = dev_get_platdata(dev);
281 NS16550_init(com_port, -1);
286 #ifdef CONFIG_OF_CONTROL
287 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
289 struct ns16550_platdata *plat = dev->platdata;
292 /* try Processor Local Bus device first */
293 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
295 if (addr == FDT_ADDR_T_NONE) {
296 /* then try pci device */
297 struct fdt_pci_addr pci_addr;
301 /* we prefer to use a memory-mapped register */
302 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
303 FDT_PCI_SPACE_MEM32, "reg",
306 /* try if there is any i/o-mapped register */
307 ret = fdtdec_get_pci_addr(gd->fdt_blob,
315 ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
324 if (addr == FDT_ADDR_T_NONE)
328 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
335 const struct dm_serial_ops ns16550_serial_ops = {
336 .putc = ns16550_serial_putc,
337 .pending = ns16550_serial_pending,
338 .getc = ns16550_serial_getc,
339 .setbrg = ns16550_serial_setbrg,
341 #endif /* CONFIG_DM_SERIAL */