2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/arch/clock.h>
12 #include <asm/arch/grf_rk3328.h>
13 #include <asm/arch/sdram_common.h>
17 struct rk3328_grf_regs *grf;
20 static int rk3328_dmc_probe(struct udevice *dev)
22 struct dram_info *priv = dev_get_priv(dev);
24 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
25 debug("%s: grf=%p\n", __func__, priv->grf);
26 priv->info.base = CONFIG_SYS_SDRAM_BASE;
27 priv->info.size = rockchip_sdram_size(
28 (phys_addr_t)&priv->grf->os_reg[2]);
33 static int rk3328_dmc_get_info(struct udevice *dev, struct ram_info *info)
35 struct dram_info *priv = dev_get_priv(dev);
42 static struct ram_ops rk3328_dmc_ops = {
43 .get_info = rk3328_dmc_get_info,
47 static const struct udevice_id rk3328_dmc_ids[] = {
48 { .compatible = "rockchip,rk3328-dmc" },
52 U_BOOT_DRIVER(dmc_rk3328) = {
53 .name = "rockchip_rk3328_dmc",
55 .of_match = rk3328_dmc_ids,
56 .ops = &rk3328_dmc_ops,
57 .probe = rk3328_dmc_probe,
58 .priv_auto_alloc_size = sizeof(struct dram_info),