1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2009 Wind River Systems, Inc.
4 * Tom Rix <Tom.Rix at windriver.com>
6 * twl4030_power_reset_init is derived from code on omapzoom,
7 * git://git.omapzoom.com/repo/u-boot.git
9 * Copyright (C) 2007-2009 Texas Instruments, Inc.
11 * twl4030_power_init is from cpu/omap3/common.c, power_init_r
13 * (C) Copyright 2004-2008
14 * Texas Instruments, <www.ti.com>
17 * Sunil Kumar <sunilsaini05 at gmail.com>
18 * Shashi Ranjan <shashiranjanmca05 at gmail.com>
20 * Derived from Beagle Board and 3430 SDP code by
21 * Richard Woodruff <r-woodruff2 at ti.com>
22 * Syed Mohammed Khasim <khasim at ti.com>
27 #include <linux/delay.h>
32 void twl4030_power_reset_init(void)
35 if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
36 TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
37 printf("Error:TWL4030: failed to read the power register\n");
38 printf("Could not initialize hardware reset\n");
40 val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
41 if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
42 TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
43 printf("Error:TWL4030: failed to write the power register\n");
44 printf("Could not initialize hardware reset\n");
52 void twl4030_power_off(void)
56 /* PM master unlock (CFG and TST keys) */
59 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
60 TWL4030_PM_MASTER_PROTECT_KEY, data);
62 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
63 TWL4030_PM_MASTER_PROTECT_KEY, data);
65 /* VBAT start disable */
67 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
68 TWL4030_PM_MASTER_CFG_P1_TRANSITION, &data);
69 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
70 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
71 TWL4030_PM_MASTER_CFG_P1_TRANSITION, data);
73 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
74 TWL4030_PM_MASTER_CFG_P2_TRANSITION, &data);
75 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
76 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
77 TWL4030_PM_MASTER_CFG_P2_TRANSITION, data);
79 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
80 TWL4030_PM_MASTER_CFG_P3_TRANSITION, &data);
81 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
82 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
83 TWL4030_PM_MASTER_CFG_P3_TRANSITION, data);
85 /* High jitter for PWRANA2 */
87 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
88 TWL4030_PM_MASTER_CFG_PWRANA2, &data);
89 data &= ~(TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV |
90 TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV);
91 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
92 TWL4030_PM_MASTER_CFG_PWRANA2, data);
97 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
98 TWL4030_PM_MASTER_PROTECT_KEY, data);
102 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
103 TWL4030_PM_MASTER_P1_SW_EVENTS, &data);
104 data |= TWL4030_PM_MASTER_SW_EVENTS_DEVOFF;
105 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
106 TWL4030_PM_MASTER_P1_SW_EVENTS, data);
110 * Set Device Group and Voltage
112 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
113 u8 dev_grp, u8 dev_grp_sel)
117 /* Select the Voltage */
118 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
121 printf("Could not write vsel to reg %02x (%d)\n",
126 /* Select the Device Group (enable the supply if dev_grp_sel != 0) */
127 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
130 printf("Could not write grp_sel to reg %02x (%d)\n",
134 void twl4030_power_init(void)
136 /* set VAUX3 to 2.8V */
137 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
138 TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
139 TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
140 TWL4030_PM_RECEIVER_DEV_GRP_P1);
142 /* set VPLL2 to 1.8V */
143 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
144 TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
145 TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
146 TWL4030_PM_RECEIVER_DEV_GRP_ALL);
148 /* set VDAC to 1.8V */
149 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
150 TWL4030_PM_RECEIVER_VDAC_VSEL_18,
151 TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
152 TWL4030_PM_RECEIVER_DEV_GRP_P1);
155 void twl4030_power_mmc_init(int dev_index)
157 if (dev_index == 0) {
158 /* Set VMMC1 to 3.15 Volts */
159 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
160 TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
161 TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
162 TWL4030_PM_RECEIVER_DEV_GRP_P1);
164 mdelay(100); /* ramp-up delay from Linux code */
165 } else if (dev_index == 1) {
166 /* Set VMMC2 to 3.15 Volts */
167 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
168 TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
169 TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
170 TWL4030_PM_RECEIVER_DEV_GRP_P1);
172 mdelay(100); /* ramp-up delay from Linux code */
176 #ifdef CONFIG_CMD_POWEROFF
177 int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
186 int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
191 ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
193 pr_err("unable to get I2C bus. ret %d\n", ret);
196 ret = dm_i2c_reg_write(dev, reg, val);
198 pr_err("writing to twl4030 failed. ret %d\n", ret);
204 int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *valp)
209 ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
211 pr_err("unable to get I2C bus. ret %d\n", ret);
214 ret = dm_i2c_reg_read(dev, reg);
216 pr_err("reading from twl4030 failed. ret %d\n", ret);