drivers/power/regulator/stm32-vrefbuf.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
   4  * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
   5  *
   6  * Originally based on the Linux kernel v4.16 drivers/regulator/stm32-vrefbuf.c
   7  */
   8
   9 #include <common.h>
  10 #include <clk.h>
  11 #include <dm.h>
  12 #include <asm/io.h>
  13 #include <dm/device_compat.h>
  14 #include <linux/iopoll.h>
  15 #include <linux/kernel.h>
  16 #include <power/regulator.h>
  17
  18 /* STM32 VREFBUF registers */
  19 #define STM32_VREFBUF_CSR               0x00
  20
  21 /* STM32 VREFBUF CSR bitfields */
  22 #define STM32_VRS                       GENMASK(6, 4)
  23 #define STM32_VRS_SHIFT                 4
  24 #define STM32_VRR                       BIT(3)
  25 #define STM32_HIZ                       BIT(1)
  26 #define STM32_ENVR                      BIT(0)
  27
  28 struct stm32_vrefbuf {
  29         void __iomem *base;
  30         struct clk clk;
  31         struct udevice *vdda_supply;
  32 };
  33
  34 static const int stm32_vrefbuf_voltages[] = {
  35         /* Matches resp. VRS = 000b, 001b, 010b, 011b */
  36         2500000, 2048000, 1800000, 1500000,
  37 };
  38
  39 static int stm32_vrefbuf_set_enable(struct udevice *dev, bool enable)
  40 {
  41         struct stm32_vrefbuf *priv = dev_get_priv(dev);
  42         u32 val;
  43         int ret;
  44
  45         clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ | STM32_ENVR,
  46                         enable ? STM32_ENVR : STM32_HIZ);
  47         if (!enable)
  48                 return 0;
  49
  50         /*
  51          * Vrefbuf startup time depends on external capacitor: wait here for
  52          * VRR to be set. That means output has reached expected value.
  53          * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
  54          * arbitrary timeout.
  55          */
  56         ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
  57                                  val & STM32_VRR, 10000);
  58         if (ret < 0) {
  59                 dev_err(dev, "stm32 vrefbuf timed out: %d\n", ret);
  60                 clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
  61                                 STM32_HIZ);
  62                 return ret;
  63         }
  64
  65         return 0;
  66 }
  67
  68 static int stm32_vrefbuf_get_enable(struct udevice *dev)
  69 {
  70         struct stm32_vrefbuf *priv = dev_get_priv(dev);
  71
  72         return readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
  73 }
  74
  75 static int stm32_vrefbuf_set_value(struct udevice *dev, int uV)
  76 {
  77         struct stm32_vrefbuf *priv = dev_get_priv(dev);
  78         unsigned int i;
  79
  80         for (i = 0; i < ARRAY_SIZE(stm32_vrefbuf_voltages); i++) {
  81                 if (uV == stm32_vrefbuf_voltages[i]) {
  82                         clrsetbits_le32(priv->base + STM32_VREFBUF_CSR,
  83                                         STM32_VRS, i << STM32_VRS_SHIFT);
  84                         return 0;
  85                 }
  86         }
  87
  88         return -EINVAL;
  89 }
  90
  91 static int stm32_vrefbuf_get_value(struct udevice *dev)
  92 {
  93         struct stm32_vrefbuf *priv = dev_get_priv(dev);
  94         u32 val;
  95
  96         val = readl(priv->base + STM32_VREFBUF_CSR) & STM32_VRS;
  97         val >>= STM32_VRS_SHIFT;
  98
  99         return stm32_vrefbuf_voltages[val];
 100 }
 101
 102 static const struct dm_regulator_ops stm32_vrefbuf_ops = {
 103         .get_value  = stm32_vrefbuf_get_value,
 104         .set_value  = stm32_vrefbuf_set_value,
 105         .get_enable = stm32_vrefbuf_get_enable,
 106         .set_enable = stm32_vrefbuf_set_enable,
 107 };
 108
 109 static int stm32_vrefbuf_probe(struct udevice *dev)
 110 {
 111         struct stm32_vrefbuf *priv = dev_get_priv(dev);
 112         int ret;
 113
 114         priv->base = dev_read_addr_ptr(dev);
 115
 116         ret = clk_get_by_index(dev, 0, &priv->clk);
 117         if (ret) {
 118                 dev_err(dev, "Can't get clock: %d\n", ret);
 119                 return ret;
 120         }
 121
 122         ret = clk_enable(&priv->clk);
 123         if (ret) {
 124                 dev_err(dev, "Can't enable clock: %d\n", ret);
 125                 return ret;
 126         }
 127
 128         ret = device_get_supply_regulator(dev, "vdda-supply",
 129                                           &priv->vdda_supply);
 130         if (ret) {
 131                 dev_dbg(dev, "No vdda-supply: %d\n", ret);
 132                 return 0;
 133         }
 134
 135         ret = regulator_set_enable(priv->vdda_supply, true);
 136         if (ret) {
 137                 dev_err(dev, "Can't enable vdda-supply: %d\n", ret);
 138                 clk_disable(&priv->clk);
 139         }
 140
 141         return ret;
 142 }
 143
 144 static const struct udevice_id stm32_vrefbuf_ids[] = {
 145         { .compatible = "st,stm32-vrefbuf" },
 146         { }
 147 };
 148
 149 U_BOOT_DRIVER(stm32_vrefbuf) = {
 150         .name  = "stm32-vrefbuf",
 151         .id = UCLASS_REGULATOR,
 152         .of_match = stm32_vrefbuf_ids,
 153         .probe = stm32_vrefbuf_probe,
 154         .ops = &stm32_vrefbuf_ops,
 155         .priv_auto_alloc_size = sizeof(struct stm32_vrefbuf),
 156 };