drivers/power/acpi_pmc/sandbox.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Sandbox PMC for testing
   4  *
   5  * Copyright 2019 Google LLC
   6  */
   7
   8 #define LOG_CATEGORY UCLASS_ACPI_PMC
   9
  10 #include <common.h>
  11 #include <dm.h>
  12 #include <log.h>
  13 #include <asm/io.h>
  14 #include <power/acpi_pmc.h>
  15
  16 #define GPIO_GPE_CFG            0x1050
  17
  18 /* Memory mapped IO registers behind PMC_BASE_ADDRESS */
  19 #define PRSTS                   0x1000
  20 #define GEN_PMCON1              0x1020
  21 #define GEN_PMCON2              0x1024
  22 #define GEN_PMCON3              0x1028
  23
  24 /* Offset of TCO registers from ACPI base I/O address */
  25 #define TCO_REG_OFFSET          0x60
  26 #define TCO1_STS        0x64
  27 #define TCO2_STS        0x66
  28 #define TCO1_CNT        0x68
  29 #define TCO2_CNT        0x6a
  30
  31 struct sandbox_pmc_priv {
  32         ulong base;
  33 };
  34
  35 static int sandbox_pmc_fill_power_state(struct udevice *dev)
  36 {
  37         struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
  38
  39         upriv->tco1_sts = inw(upriv->acpi_base + TCO1_STS);
  40         upriv->tco2_sts = inw(upriv->acpi_base + TCO2_STS);
  41
  42         upriv->prsts = readl(upriv->pmc_bar0 + PRSTS);
  43         upriv->gen_pmcon1 = readl(upriv->pmc_bar0 + GEN_PMCON1);
  44         upriv->gen_pmcon2 = readl(upriv->pmc_bar0 + GEN_PMCON2);
  45         upriv->gen_pmcon3 = readl(upriv->pmc_bar0 + GEN_PMCON3);
  46
  47         return 0;
  48 }
  49
  50 static int sandbox_prev_sleep_state(struct udevice *dev, int prev_sleep_state)
  51 {
  52         return prev_sleep_state;
  53 }
  54
  55 static int sandbox_disable_tco(struct udevice *dev)
  56 {
  57         struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
  58
  59         pmc_disable_tco_base(upriv->acpi_base + TCO_REG_OFFSET);
  60
  61         return 0;
  62 }
  63
  64 static int sandbox_pmc_probe(struct udevice *dev)
  65 {
  66         struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
  67         struct udevice *bus;
  68         ulong base;
  69
  70         uclass_first_device(UCLASS_PCI, &bus);
  71         base = dm_pci_read_bar32(dev, 0);
  72         if (base == FDT_ADDR_T_NONE)
  73                 return log_msg_ret("No base address", -EINVAL);
  74         upriv->pmc_bar0 = map_sysmem(base, 0x2000);
  75         upriv->gpe_cfg = (u32 *)(upriv->pmc_bar0 + GPIO_GPE_CFG);
  76
  77         return pmc_ofdata_to_uc_platdata(dev);
  78 }
  79
  80 static struct acpi_pmc_ops sandbox_pmc_ops = {
  81         .init                   = sandbox_pmc_fill_power_state,
  82         .prev_sleep_state       = sandbox_prev_sleep_state,
  83         .disable_tco            = sandbox_disable_tco,
  84 };
  85
  86 static const struct udevice_id sandbox_pmc_ids[] = {
  87         { .compatible = "sandbox,pmc" },
  88         { }
  89 };
  90
  91 U_BOOT_DRIVER(pmc_sandbox) = {
  92         .name = "pmc_sandbox",
  93         .id = UCLASS_ACPI_PMC,
  94         .of_match = sandbox_pmc_ids,
  95         .probe = sandbox_pmc_probe,
  96         .ops = &sandbox_pmc_ops,
  97         .priv_auto_alloc_size = sizeof(struct sandbox_pmc_priv),
  98 };