drivers/pinctrl/sh-pfc/pinctrl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SuperH Pin Function Controller pinmux support.
   4  *
   5  * Copyright (C) 2012  Paul Mundt
   6  */
   7
   8 #define DRV_NAME "sh-pfc"
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/of.h>
  15 #include <linux/pinctrl/consumer.h>
  16 #include <linux/pinctrl/machine.h>
  17 #include <linux/pinctrl/pinconf.h>
  18 #include <linux/pinctrl/pinconf-generic.h>
  19 #include <linux/pinctrl/pinctrl.h>
  20 #include <linux/pinctrl/pinmux.h>
  21 #include <linux/slab.h>
  22 #include <linux/spinlock.h>
  23
  24 #include "core.h"
  25 #include "../core.h"
  26 #include "../pinconf.h"
  27
  28 struct sh_pfc_pin_config {
  29         u32 type;
  30 };
  31
  32 struct sh_pfc_pinctrl {
  33         struct pinctrl_dev *pctl;
  34         struct pinctrl_desc pctl_desc;
  35
  36         struct sh_pfc *pfc;
  37
  38         struct pinctrl_pin_desc *pins;
  39         struct sh_pfc_pin_config *configs;
  40
  41         const char *func_prop_name;
  42         const char *groups_prop_name;
  43         const char *pins_prop_name;
  44 };
  45
  46 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
  47 {
  48         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  49
  50         return pmx->pfc->info->nr_groups;
  51 }
  52
  53 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
  54                                          unsigned selector)
  55 {
  56         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  57
  58         return pmx->pfc->info->groups[selector].name;
  59 }
  60
  61 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
  62                                  const unsigned **pins, unsigned *num_pins)
  63 {
  64         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  65
  66         *pins = pmx->pfc->info->groups[selector].pins;
  67         *num_pins = pmx->pfc->info->groups[selector].nr_pins;
  68
  69         return 0;
  70 }
  71
  72 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  73                                 unsigned offset)
  74 {
  75         seq_puts(s, DRV_NAME);
  76 }
  77
  78 #ifdef CONFIG_OF
  79 static int sh_pfc_map_add_config(struct pinctrl_map *map,
  80                                  const char *group_or_pin,
  81                                  enum pinctrl_map_type type,
  82                                  unsigned long *configs,
  83                                  unsigned int num_configs)
  84 {
  85         unsigned long *cfgs;
  86
  87         cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
  88                        GFP_KERNEL);
  89         if (cfgs == NULL)
  90                 return -ENOMEM;
  91
  92         map->type = type;
  93         map->data.configs.group_or_pin = group_or_pin;
  94         map->data.configs.configs = cfgs;
  95         map->data.configs.num_configs = num_configs;
  96
  97         return 0;
  98 }
  99
 100 static int sh_pfc_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 101                                     struct device_node *np,
 102                                     struct pinctrl_map **map,
 103                                     unsigned int *num_maps, unsigned int *index)
 104 {
 105         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 106         struct device *dev = pmx->pfc->dev;
 107         struct pinctrl_map *maps = *map;
 108         unsigned int nmaps = *num_maps;
 109         unsigned int idx = *index;
 110         unsigned int num_configs;
 111         const char *function = NULL;
 112         unsigned long *configs;
 113         struct property *prop;
 114         unsigned int num_groups;
 115         unsigned int num_pins;
 116         const char *group;
 117         const char *pin;
 118         int ret;
 119
 120         /* Support both the old Renesas-specific properties and the new standard
 121          * properties. Mixing old and new properties isn't allowed, neither
 122          * inside a subnode nor across subnodes.
 123          */
 124         if (!pmx->func_prop_name) {
 125                 if (of_find_property(np, "groups", NULL) ||
 126                     of_find_property(np, "pins", NULL)) {
 127                         pmx->func_prop_name = "function";
 128                         pmx->groups_prop_name = "groups";
 129                         pmx->pins_prop_name = "pins";
 130                 } else {
 131                         pmx->func_prop_name = "renesas,function";
 132                         pmx->groups_prop_name = "renesas,groups";
 133                         pmx->pins_prop_name = "renesas,pins";
 134                 }
 135         }
 136
 137         /* Parse the function and configuration properties. At least a function
 138          * or one configuration must be specified.
 139          */
 140         ret = of_property_read_string(np, pmx->func_prop_name, &function);
 141         if (ret < 0 && ret != -EINVAL) {
 142                 dev_err(dev, "Invalid function in DT\n");
 143                 return ret;
 144         }
 145
 146         ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs);
 147         if (ret < 0)
 148                 return ret;
 149
 150         if (!function && num_configs == 0) {
 151                 dev_err(dev,
 152                         "DT node must contain at least a function or config\n");
 153                 ret = -ENODEV;
 154                 goto done;
 155         }
 156
 157         /* Count the number of pins and groups and reallocate mappings. */
 158         ret = of_property_count_strings(np, pmx->pins_prop_name);
 159         if (ret == -EINVAL) {
 160                 num_pins = 0;
 161         } else if (ret < 0) {
 162                 dev_err(dev, "Invalid pins list in DT\n");
 163                 goto done;
 164         } else {
 165                 num_pins = ret;
 166         }
 167
 168         ret = of_property_count_strings(np, pmx->groups_prop_name);
 169         if (ret == -EINVAL) {
 170                 num_groups = 0;
 171         } else if (ret < 0) {
 172                 dev_err(dev, "Invalid pin groups list in DT\n");
 173                 goto done;
 174         } else {
 175                 num_groups = ret;
 176         }
 177
 178         if (!num_pins && !num_groups) {
 179                 dev_err(dev, "No pin or group provided in DT node\n");
 180                 ret = -ENODEV;
 181                 goto done;
 182         }
 183
 184         if (function)
 185                 nmaps += num_groups;
 186         if (configs)
 187                 nmaps += num_pins + num_groups;
 188
 189         maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
 190         if (maps == NULL) {
 191                 ret = -ENOMEM;
 192                 goto done;
 193         }
 194
 195         *map = maps;
 196         *num_maps = nmaps;
 197
 198         /* Iterate over pins and groups and create the mappings. */
 199         of_property_for_each_string(np, pmx->groups_prop_name, prop, group) {
 200                 if (function) {
 201                         maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
 202                         maps[idx].data.mux.group = group;
 203                         maps[idx].data.mux.function = function;
 204                         idx++;
 205                 }
 206
 207                 if (configs) {
 208                         ret = sh_pfc_map_add_config(&maps[idx], group,
 209                                                     PIN_MAP_TYPE_CONFIGS_GROUP,
 210                                                     configs, num_configs);
 211                         if (ret < 0)
 212                                 goto done;
 213
 214                         idx++;
 215                 }
 216         }
 217
 218         if (!configs) {
 219                 ret = 0;
 220                 goto done;
 221         }
 222
 223         of_property_for_each_string(np, pmx->pins_prop_name, prop, pin) {
 224                 ret = sh_pfc_map_add_config(&maps[idx], pin,
 225                                             PIN_MAP_TYPE_CONFIGS_PIN,
 226                                             configs, num_configs);
 227                 if (ret < 0)
 228                         goto done;
 229
 230                 idx++;
 231         }
 232
 233 done:
 234         *index = idx;
 235         kfree(configs);
 236         return ret;
 237 }
 238
 239 static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
 240                                struct pinctrl_map *map, unsigned num_maps)
 241 {
 242         unsigned int i;
 243
 244         if (map == NULL)
 245                 return;
 246
 247         for (i = 0; i < num_maps; ++i) {
 248                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
 249                     map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
 250                         kfree(map[i].data.configs.configs);
 251         }
 252
 253         kfree(map);
 254 }
 255
 256 static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
 257                                  struct device_node *np,
 258                                  struct pinctrl_map **map, unsigned *num_maps)
 259 {
 260         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 261         struct device *dev = pmx->pfc->dev;
 262         struct device_node *child;
 263         unsigned int index;
 264         int ret;
 265
 266         *map = NULL;
 267         *num_maps = 0;
 268         index = 0;
 269
 270         for_each_child_of_node(np, child) {
 271                 ret = sh_pfc_dt_subnode_to_map(pctldev, child, map, num_maps,
 272                                                &index);
 273                 if (ret < 0) {
 274                         of_node_put(child);
 275                         goto done;
 276                 }
 277         }
 278
 279         /* If no mapping has been found in child nodes try the config node. */
 280         if (*num_maps == 0) {
 281                 ret = sh_pfc_dt_subnode_to_map(pctldev, np, map, num_maps,
 282                                                &index);
 283                 if (ret < 0)
 284                         goto done;
 285         }
 286
 287         if (*num_maps)
 288                 return 0;
 289
 290         dev_err(dev, "no mapping found in node %pOF\n", np);
 291         ret = -EINVAL;
 292
 293 done:
 294         if (ret < 0)
 295                 sh_pfc_dt_free_map(pctldev, *map, *num_maps);
 296
 297         return ret;
 298 }
 299 #endif /* CONFIG_OF */
 300
 301 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
 302         .get_groups_count       = sh_pfc_get_groups_count,
 303         .get_group_name         = sh_pfc_get_group_name,
 304         .get_group_pins         = sh_pfc_get_group_pins,
 305         .pin_dbg_show           = sh_pfc_pin_dbg_show,
 306 #ifdef CONFIG_OF
 307         .dt_node_to_map         = sh_pfc_dt_node_to_map,
 308         .dt_free_map            = sh_pfc_dt_free_map,
 309 #endif
 310 };
 311
 312 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
 313 {
 314         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 315
 316         return pmx->pfc->info->nr_functions;
 317 }
 318
 319 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
 320                                             unsigned selector)
 321 {
 322         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 323
 324         return pmx->pfc->info->functions[selector].name;
 325 }
 326
 327 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
 328                                       unsigned selector,
 329                                       const char * const **groups,
 330                                       unsigned * const num_groups)
 331 {
 332         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 333
 334         *groups = pmx->pfc->info->functions[selector].groups;
 335         *num_groups = pmx->pfc->info->functions[selector].nr_groups;
 336
 337         return 0;
 338 }
 339
 340 static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
 341                                unsigned group)
 342 {
 343         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 344         struct sh_pfc *pfc = pmx->pfc;
 345         const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
 346         unsigned long flags;
 347         unsigned int i;
 348         int ret = 0;
 349
 350         dev_dbg(pctldev->dev, "Configuring pin group %s\n", grp->name);
 351
 352         spin_lock_irqsave(&pfc->lock, flags);
 353
 354         for (i = 0; i < grp->nr_pins; ++i) {
 355                 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
 356                 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 357
 358                 if (cfg->type != PINMUX_TYPE_NONE) {
 359                         ret = -EBUSY;
 360                         goto done;
 361                 }
 362         }
 363
 364         for (i = 0; i < grp->nr_pins; ++i) {
 365                 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
 366                 if (ret < 0)
 367                         break;
 368         }
 369
 370 done:
 371         spin_unlock_irqrestore(&pfc->lock, flags);
 372         return ret;
 373 }
 374
 375 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
 376                                       struct pinctrl_gpio_range *range,
 377                                       unsigned offset)
 378 {
 379         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 380         struct sh_pfc *pfc = pmx->pfc;
 381         int idx = sh_pfc_get_pin_index(pfc, offset);
 382         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 383         unsigned long flags;
 384         int ret;
 385
 386         spin_lock_irqsave(&pfc->lock, flags);
 387
 388         if (cfg->type != PINMUX_TYPE_NONE) {
 389                 dev_err(pfc->dev,
 390                         "Pin %u is busy, can't configure it as GPIO.\n",
 391                         offset);
 392                 ret = -EBUSY;
 393                 goto done;
 394         }
 395
 396         if (!pfc->gpio) {
 397                 /* If GPIOs are handled externally the pin mux type need to be
 398                  * set to GPIO here.
 399                  */
 400                 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 401
 402                 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
 403                 if (ret < 0)
 404                         goto done;
 405         }
 406
 407         cfg->type = PINMUX_TYPE_GPIO;
 408
 409         ret = 0;
 410
 411 done:
 412         spin_unlock_irqrestore(&pfc->lock, flags);
 413
 414         return ret;
 415 }
 416
 417 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
 418                                      struct pinctrl_gpio_range *range,
 419                                      unsigned offset)
 420 {
 421         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 422         struct sh_pfc *pfc = pmx->pfc;
 423         int idx = sh_pfc_get_pin_index(pfc, offset);
 424         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 425         unsigned long flags;
 426
 427         spin_lock_irqsave(&pfc->lock, flags);
 428         cfg->type = PINMUX_TYPE_NONE;
 429         spin_unlock_irqrestore(&pfc->lock, flags);
 430 }
 431
 432 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
 433                                      struct pinctrl_gpio_range *range,
 434                                      unsigned offset, bool input)
 435 {
 436         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 437         struct sh_pfc *pfc = pmx->pfc;
 438         int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
 439         int idx = sh_pfc_get_pin_index(pfc, offset);
 440         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 441         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 442         unsigned long flags;
 443         unsigned int dir;
 444         int ret;
 445
 446         /* Check if the requested direction is supported by the pin. Not all SoC
 447          * provide pin config data, so perform the check conditionally.
 448          */
 449         if (pin->configs) {
 450                 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;
 451                 if (!(pin->configs & dir))
 452                         return -EINVAL;
 453         }
 454
 455         spin_lock_irqsave(&pfc->lock, flags);
 456
 457         ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
 458         if (ret < 0)
 459                 goto done;
 460
 461         cfg->type = new_type;
 462
 463 done:
 464         spin_unlock_irqrestore(&pfc->lock, flags);
 465         return ret;
 466 }
 467
 468 static const struct pinmux_ops sh_pfc_pinmux_ops = {
 469         .get_functions_count    = sh_pfc_get_functions_count,
 470         .get_function_name      = sh_pfc_get_function_name,
 471         .get_function_groups    = sh_pfc_get_function_groups,
 472         .set_mux                = sh_pfc_func_set_mux,
 473         .gpio_request_enable    = sh_pfc_gpio_request_enable,
 474         .gpio_disable_free      = sh_pfc_gpio_disable_free,
 475         .gpio_set_direction     = sh_pfc_gpio_set_direction,
 476 };
 477
 478 static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,
 479                 unsigned int pin, unsigned int *offset, unsigned int *size)
 480 {
 481         const struct pinmux_drive_reg_field *field;
 482         const struct pinmux_drive_reg *reg;
 483         unsigned int i;
 484
 485         for (reg = pfc->info->drive_regs; reg->reg; ++reg) {
 486                 for (i = 0; i < ARRAY_SIZE(reg->fields); ++i) {
 487                         field = &reg->fields[i];
 488
 489                         if (field->size && field->pin == pin) {
 490                                 *offset = field->offset;
 491                                 *size = field->size;
 492
 493                                 return reg->reg;
 494                         }
 495                 }
 496         }
 497
 498         return 0;
 499 }
 500
 501 static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
 502                                              unsigned int pin)
 503 {
 504         unsigned long flags;
 505         unsigned int offset;
 506         unsigned int size;
 507         u32 reg;
 508         u32 val;
 509
 510         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 511         if (!reg)
 512                 return -EINVAL;
 513
 514         spin_lock_irqsave(&pfc->lock, flags);
 515         val = sh_pfc_read(pfc, reg);
 516         spin_unlock_irqrestore(&pfc->lock, flags);
 517
 518         val = (val >> offset) & GENMASK(size - 1, 0);
 519
 520         /* Convert the value to mA based on a full drive strength value of 24mA.
 521          * We can make the full value configurable later if needed.
 522          */
 523         return (val + 1) * (size == 2 ? 6 : 3);
 524 }
 525
 526 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
 527                                              unsigned int pin, u16 strength)
 528 {
 529         unsigned long flags;
 530         unsigned int offset;
 531         unsigned int size;
 532         unsigned int step;
 533         u32 reg;
 534         u32 val;
 535
 536         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 537         if (!reg)
 538                 return -EINVAL;
 539
 540         step = size == 2 ? 6 : 3;
 541
 542         if (strength < step || strength > 24)
 543                 return -EINVAL;
 544
 545         /* Convert the value from mA based on a full drive strength value of
 546          * 24mA. We can make the full value configurable later if needed.
 547          */
 548         strength = strength / step - 1;
 549
 550         spin_lock_irqsave(&pfc->lock, flags);
 551
 552         val = sh_pfc_read(pfc, reg);
 553         val &= ~GENMASK(offset + size - 1, offset);
 554         val |= strength << offset;
 555
 556         sh_pfc_write(pfc, reg, val);
 557
 558         spin_unlock_irqrestore(&pfc->lock, flags);
 559
 560         return 0;
 561 }
 562
 563 /* Check whether the requested parameter is supported for a pin. */
 564 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
 565                                     enum pin_config_param param)
 566 {
 567         int idx = sh_pfc_get_pin_index(pfc, _pin);
 568         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 569
 570         switch (param) {
 571         case PIN_CONFIG_BIAS_DISABLE:
 572                 return pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN;
 573
 574         case PIN_CONFIG_BIAS_PULL_UP:
 575                 return pin->configs & SH_PFC_PIN_CFG_PULL_UP;
 576
 577         case PIN_CONFIG_BIAS_PULL_DOWN:
 578                 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN;
 579
 580         case PIN_CONFIG_DRIVE_STRENGTH:
 581                 return pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH;
 582
 583         case PIN_CONFIG_POWER_SOURCE:
 584                 return pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE;
 585
 586         default:
 587                 return false;
 588         }
 589 }
 590
 591 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
 592                               unsigned long *config)
 593 {
 594         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 595         struct sh_pfc *pfc = pmx->pfc;
 596         enum pin_config_param param = pinconf_to_config_param(*config);
 597         unsigned long flags;
 598         unsigned int arg;
 599
 600         if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 601                 return -ENOTSUPP;
 602
 603         switch (param) {
 604         case PIN_CONFIG_BIAS_DISABLE:
 605         case PIN_CONFIG_BIAS_PULL_UP:
 606         case PIN_CONFIG_BIAS_PULL_DOWN: {
 607                 unsigned int bias;
 608
 609                 if (!pfc->info->ops || !pfc->info->ops->get_bias)
 610                         return -ENOTSUPP;
 611
 612                 spin_lock_irqsave(&pfc->lock, flags);
 613                 bias = pfc->info->ops->get_bias(pfc, _pin);
 614                 spin_unlock_irqrestore(&pfc->lock, flags);
 615
 616                 if (bias != param)
 617                         return -EINVAL;
 618
 619                 arg = 0;
 620                 break;
 621         }
 622
 623         case PIN_CONFIG_DRIVE_STRENGTH: {
 624                 int ret;
 625
 626                 ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin);
 627                 if (ret < 0)
 628                         return ret;
 629
 630                 arg = ret;
 631                 break;
 632         }
 633
 634         case PIN_CONFIG_POWER_SOURCE: {
 635                 u32 pocctrl, val;
 636                 int bit;
 637
 638                 if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 639                         return -ENOTSUPP;
 640
 641                 bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 642                 if (WARN(bit < 0, "invalid pin %#x", _pin))
 643                         return bit;
 644
 645                 spin_lock_irqsave(&pfc->lock, flags);
 646                 val = sh_pfc_read(pfc, pocctrl);
 647                 spin_unlock_irqrestore(&pfc->lock, flags);
 648
 649                 arg = (val & BIT(bit)) ? 3300 : 1800;
 650                 break;
 651         }
 652
 653         default:
 654                 return -ENOTSUPP;
 655         }
 656
 657         *config = pinconf_to_config_packed(param, arg);
 658         return 0;
 659 }
 660
 661 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
 662                               unsigned long *configs, unsigned num_configs)
 663 {
 664         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 665         struct sh_pfc *pfc = pmx->pfc;
 666         enum pin_config_param param;
 667         unsigned long flags;
 668         unsigned int i;
 669
 670         for (i = 0; i < num_configs; i++) {
 671                 param = pinconf_to_config_param(configs[i]);
 672
 673                 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 674                         return -ENOTSUPP;
 675
 676                 switch (param) {
 677                 case PIN_CONFIG_BIAS_PULL_UP:
 678                 case PIN_CONFIG_BIAS_PULL_DOWN:
 679                 case PIN_CONFIG_BIAS_DISABLE:
 680                         if (!pfc->info->ops || !pfc->info->ops->set_bias)
 681                                 return -ENOTSUPP;
 682
 683                         spin_lock_irqsave(&pfc->lock, flags);
 684                         pfc->info->ops->set_bias(pfc, _pin, param);
 685                         spin_unlock_irqrestore(&pfc->lock, flags);
 686
 687                         break;
 688
 689                 case PIN_CONFIG_DRIVE_STRENGTH: {
 690                         unsigned int arg =
 691                                 pinconf_to_config_argument(configs[i]);
 692                         int ret;
 693
 694                         ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);
 695                         if (ret < 0)
 696                                 return ret;
 697
 698                         break;
 699                 }
 700
 701                 case PIN_CONFIG_POWER_SOURCE: {
 702                         unsigned int mV = pinconf_to_config_argument(configs[i]);
 703                         u32 pocctrl, val;
 704                         int bit;
 705
 706                         if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 707                                 return -ENOTSUPP;
 708
 709                         bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 710                         if (WARN(bit < 0, "invalid pin %#x", _pin))
 711                                 return bit;
 712
 713                         if (mV != 1800 && mV != 3300)
 714                                 return -EINVAL;
 715
 716                         spin_lock_irqsave(&pfc->lock, flags);
 717                         val = sh_pfc_read(pfc, pocctrl);
 718                         if (mV == 3300)
 719                                 val |= BIT(bit);
 720                         else
 721                                 val &= ~BIT(bit);
 722                         sh_pfc_write(pfc, pocctrl, val);
 723                         spin_unlock_irqrestore(&pfc->lock, flags);
 724
 725                         break;
 726                 }
 727
 728                 default:
 729                         return -ENOTSUPP;
 730                 }
 731         } /* for each config */
 732
 733         return 0;
 734 }
 735
 736 static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
 737                                     unsigned long *configs,
 738                                     unsigned num_configs)
 739 {
 740         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 741         const unsigned int *pins;
 742         unsigned int num_pins;
 743         unsigned int i, ret;
 744
 745         pins = pmx->pfc->info->groups[group].pins;
 746         num_pins = pmx->pfc->info->groups[group].nr_pins;
 747
 748         for (i = 0; i < num_pins; ++i) {
 749                 ret = sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs);
 750                 if (ret)
 751                         return ret;
 752         }
 753
 754         return 0;
 755 }
 756
 757 static const struct pinconf_ops sh_pfc_pinconf_ops = {
 758         .is_generic                     = true,
 759         .pin_config_get                 = sh_pfc_pinconf_get,
 760         .pin_config_set                 = sh_pfc_pinconf_set,
 761         .pin_config_group_set           = sh_pfc_pinconf_group_set,
 762         .pin_config_config_dbg_show     = pinconf_generic_dump_config,
 763 };
 764
 765 /* PFC ranges -> pinctrl pin descs */
 766 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
 767 {
 768         unsigned int i;
 769
 770         /* Allocate and initialize the pins and configs arrays. */
 771         pmx->pins = devm_kcalloc(pfc->dev,
 772                                  pfc->info->nr_pins, sizeof(*pmx->pins),
 773                                  GFP_KERNEL);
 774         if (unlikely(!pmx->pins))
 775                 return -ENOMEM;
 776
 777         pmx->configs = devm_kcalloc(pfc->dev,
 778                                     pfc->info->nr_pins, sizeof(*pmx->configs),
 779                                     GFP_KERNEL);
 780         if (unlikely(!pmx->configs))
 781                 return -ENOMEM;
 782
 783         for (i = 0; i < pfc->info->nr_pins; ++i) {
 784                 const struct sh_pfc_pin *info = &pfc->info->pins[i];
 785                 struct sh_pfc_pin_config *cfg = &pmx->configs[i];
 786                 struct pinctrl_pin_desc *pin = &pmx->pins[i];
 787
 788                 /* If the pin number is equal to -1 all pins are considered */
 789                 pin->number = info->pin != (u16)-1 ? info->pin : i;
 790                 pin->name = info->name;
 791                 cfg->type = PINMUX_TYPE_NONE;
 792         }
 793
 794         return 0;
 795 }
 796
 797 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
 798 {
 799         struct sh_pfc_pinctrl *pmx;
 800         int ret;
 801
 802         pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
 803         if (unlikely(!pmx))
 804                 return -ENOMEM;
 805
 806         pmx->pfc = pfc;
 807
 808         ret = sh_pfc_map_pins(pfc, pmx);
 809         if (ret < 0)
 810                 return ret;
 811
 812         pmx->pctl_desc.name = DRV_NAME;
 813         pmx->pctl_desc.owner = THIS_MODULE;
 814         pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
 815         pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
 816         pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
 817         pmx->pctl_desc.pins = pmx->pins;
 818         pmx->pctl_desc.npins = pfc->info->nr_pins;
 819
 820         ret = devm_pinctrl_register_and_init(pfc->dev, &pmx->pctl_desc, pmx,
 821                                              &pmx->pctl);
 822         if (ret) {
 823                 dev_err(pfc->dev, "could not register: %i\n", ret);
 824
 825                 return ret;
 826         }
 827
 828         return pinctrl_enable(pmx->pctl);
 829 }