1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
6 #ifndef __DRIVERS_PINCTRL_ROCKCHIP_H
7 #define __DRIVERS_PINCTRL_ROCKCHIP_H
9 #include <linux/bitops.h>
10 #include <linux/types.h>
13 * Encode variants of iomux registers into a type variable
15 #define IOMUX_GPIO_ONLY BIT(0)
16 #define IOMUX_WIDTH_4BIT BIT(1)
17 #define IOMUX_SOURCE_PMU BIT(2)
18 #define IOMUX_UNROUTED BIT(3)
19 #define IOMUX_WIDTH_3BIT BIT(4)
20 #define IOMUX_8WIDTH_2BIT BIT(5)
23 * Defined some common pins constants
25 #define ROCKCHIP_PULL_BITS_PER_PIN 2
26 #define ROCKCHIP_PULL_PINS_PER_REG 8
27 #define ROCKCHIP_PULL_BANK_STRIDE 16
28 #define ROCKCHIP_DRV_BITS_PER_PIN 2
29 #define ROCKCHIP_DRV_PINS_PER_REG 8
30 #define ROCKCHIP_DRV_BANK_STRIDE 16
31 #define ROCKCHIP_DRV_3BITS_PER_PIN 3
34 * @type: iomux variant using IOMUX_* constants
35 * @offset: if initialized to -1 it will be autocalculated, by specifying
36 * an initial offset value the relevant source offset can be reset
37 * to a new value for autocalculating the following iomux registers.
39 struct rockchip_iomux {
45 * enum type index corresponding to rockchip_perpin_drv_list arrays index.
47 enum rockchip_pin_drv_type {
48 DRV_TYPE_IO_DEFAULT = 0,
49 DRV_TYPE_IO_1V8_OR_3V0,
51 DRV_TYPE_IO_1V8_3V0_AUTO,
57 * enum type index corresponding to rockchip_pull_list arrays index.
59 enum rockchip_pin_pull_type {
60 PULL_TYPE_IO_DEFAULT = 0,
61 PULL_TYPE_IO_1V8_ONLY,
66 * @drv_type: drive strength variant using rockchip_perpin_drv_type
67 * @offset: if initialized to -1 it will be autocalculated, by specifying
68 * an initial offset value the relevant source offset can be reset
69 * to a new value for autocalculating the following drive strength
70 * registers. if used chips own cal_drv func instead to calculate
71 * registers offset, the variant could be ignored.
74 enum rockchip_pin_drv_type drv_type;
79 * @priv: common pinctrl private basedata
80 * @pin_base: first pin number
81 * @nr_pins: number of pins in this bank
82 * @name: name of the bank
83 * @bank_num: number of the bank, to account for holes
84 * @iomux: array describing the 4 iomux sources of the bank
85 * @drv: array describing the 4 drive strength sources of the bank
86 * @pull_type: array describing the 4 pull type sources of the bank
87 * @recalced_mask: bits describing the mux recalced pins of per bank
88 * @route_mask: bits describing the routing pins of per bank
90 struct rockchip_pin_bank {
91 struct rockchip_pinctrl_priv *priv;
96 struct rockchip_iomux iomux[4];
97 struct rockchip_drv drv[4];
98 enum rockchip_pin_pull_type pull_type[4];
103 #define PIN_BANK(id, pins, label) \
116 #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \
122 { .type = iom0, .offset = -1 }, \
123 { .type = iom1, .offset = -1 }, \
124 { .type = iom2, .offset = -1 }, \
125 { .type = iom3, .offset = -1 }, \
129 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
141 { .drv_type = type0, .offset = -1 }, \
142 { .drv_type = type1, .offset = -1 }, \
143 { .drv_type = type2, .offset = -1 }, \
144 { .drv_type = type3, .offset = -1 }, \
148 #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1, \
149 drv2, drv3, pull0, pull1, \
162 { .drv_type = drv0, .offset = -1 }, \
163 { .drv_type = drv1, .offset = -1 }, \
164 { .drv_type = drv2, .offset = -1 }, \
165 { .drv_type = drv3, .offset = -1 }, \
167 .pull_type[0] = pull0, \
168 .pull_type[1] = pull1, \
169 .pull_type[2] = pull2, \
170 .pull_type[3] = pull3, \
173 #define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1, \
174 iom2, iom3, drv0, drv1, drv2, \
175 drv3, offset0, offset1, \
182 { .type = iom0, .offset = -1 }, \
183 { .type = iom1, .offset = -1 }, \
184 { .type = iom2, .offset = -1 }, \
185 { .type = iom3, .offset = -1 }, \
188 { .drv_type = drv0, .offset = offset0 }, \
189 { .drv_type = drv1, .offset = offset1 }, \
190 { .drv_type = drv2, .offset = offset2 }, \
191 { .drv_type = drv3, .offset = offset3 }, \
195 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins, \
196 label, iom0, iom1, iom2, \
197 iom3, drv0, drv1, drv2, \
198 drv3, offset0, offset1, \
199 offset2, offset3, pull0, \
200 pull1, pull2, pull3) \
206 { .type = iom0, .offset = -1 }, \
207 { .type = iom1, .offset = -1 }, \
208 { .type = iom2, .offset = -1 }, \
209 { .type = iom3, .offset = -1 }, \
212 { .drv_type = drv0, .offset = offset0 }, \
213 { .drv_type = drv1, .offset = offset1 }, \
214 { .drv_type = drv2, .offset = offset2 }, \
215 { .drv_type = drv3, .offset = offset3 }, \
217 .pull_type[0] = pull0, \
218 .pull_type[1] = pull1, \
219 .pull_type[2] = pull2, \
220 .pull_type[3] = pull3, \
224 * struct rockchip_mux_recalced_data: recalculate a pin iomux data.
227 * @reg: register offset.
228 * @bit: index at register.
231 struct rockchip_mux_recalced_data {
240 * struct rockchip_mux_route_data: route a pin iomux data.
241 * @bank_num: bank number.
242 * @pin: index at register or used to calc index.
243 * @func: the min pin.
244 * @route_offset: the max pin.
245 * @route_val: the register offset.
247 struct rockchip_mux_route_data {
257 struct rockchip_pin_ctrl {
258 struct rockchip_pin_bank *pin_banks;
265 struct rockchip_mux_recalced_data *iomux_recalced;
267 struct rockchip_mux_route_data *iomux_routes;
270 int (*set_mux)(struct rockchip_pin_bank *bank,
272 int (*set_pull)(struct rockchip_pin_bank *bank,
273 int pin_num, int pull);
274 int (*set_drive)(struct rockchip_pin_bank *bank,
275 int pin_num, int strength);
276 int (*set_schmitt)(struct rockchip_pin_bank *bank,
277 int pin_num, int enable);
282 struct rockchip_pinctrl_priv {
283 struct rockchip_pin_ctrl *ctrl;
284 struct regmap *regmap_base;
285 struct regmap *regmap_pmu;
288 extern const struct pinctrl_ops rockchip_pinctrl_ops;
289 int rockchip_pinctrl_probe(struct udevice *dev);
290 void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
291 int *reg, u8 *bit, int *mask);
292 bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
293 int mux, u32 *reg, u32 *value);
294 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
295 int rockchip_translate_drive_value(int type, int strength);
296 int rockchip_translate_pull_value(int type, int pull);
298 #endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */