drivers/pinctrl/rockchip/pinctrl-rk3328.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <dm.h>
   8 #include <log.h>
   9 #include <dm/pinctrl.h>
  10 #include <regmap.h>
  11 #include <syscon.h>
  12 #include <linux/bitops.h>
  13
  14 #include "pinctrl-rockchip.h"
  15
  16 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
  17         {
  18                 .num = 2,
  19                 .pin = 12,
  20                 .reg = 0x24,
  21                 .bit = 8,
  22                 .mask = 0x3
  23         }, {
  24                 .num = 2,
  25                 .pin = 15,
  26                 .reg = 0x28,
  27                 .bit = 0,
  28                 .mask = 0x7
  29         }, {
  30                 .num = 2,
  31                 .pin = 23,
  32                 .reg = 0x30,
  33                 .bit = 14,
  34                 .mask = 0x3
  35         },
  36 };
  37
  38 static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
  39         {
  40                 /* uart2dbg_rxm0 */
  41                 .bank_num = 1,
  42                 .pin = 1,
  43                 .func = 2,
  44                 .route_offset = 0x50,
  45                 .route_val = BIT(16) | BIT(16 + 1),
  46         }, {
  47                 /* uart2dbg_rxm1 */
  48                 .bank_num = 2,
  49                 .pin = 1,
  50                 .func = 1,
  51                 .route_offset = 0x50,
  52                 .route_val = BIT(16) | BIT(16 + 1) | BIT(0),
  53         }, {
  54                 /* gmac-m1_rxd0 */
  55                 .bank_num = 1,
  56                 .pin = 11,
  57                 .func = 2,
  58                 .route_offset = 0x50,
  59                 .route_val = BIT(16 + 2) | BIT(2),
  60         }, {
  61                 /* gmac-m1-optimized_rxd3 */
  62                 .bank_num = 1,
  63                 .pin = 14,
  64                 .func = 2,
  65                 .route_offset = 0x50,
  66                 .route_val = BIT(16 + 10) | BIT(10),
  67         }, {
  68                 /* pdm_sdi0m0 */
  69                 .bank_num = 2,
  70                 .pin = 19,
  71                 .func = 2,
  72                 .route_offset = 0x50,
  73                 .route_val = BIT(16 + 3),
  74         }, {
  75                 /* pdm_sdi0m1 */
  76                 .bank_num = 1,
  77                 .pin = 23,
  78                 .func = 3,
  79                 .route_offset = 0x50,
  80                 .route_val =  BIT(16 + 3) | BIT(3),
  81         }, {
  82                 /* spi_rxdm2 */
  83                 .bank_num = 3,
  84                 .pin = 2,
  85                 .func = 4,
  86                 .route_offset = 0x50,
  87                 .route_val =  BIT(16 + 4) | BIT(16 + 5) | BIT(5),
  88         }, {
  89                 /* i2s2_sdim0 */
  90                 .bank_num = 1,
  91                 .pin = 24,
  92                 .func = 1,
  93                 .route_offset = 0x50,
  94                 .route_val = BIT(16 + 6),
  95         }, {
  96                 /* i2s2_sdim1 */
  97                 .bank_num = 3,
  98                 .pin = 2,
  99                 .func = 6,
 100                 .route_offset = 0x50,
 101                 .route_val =  BIT(16 + 6) | BIT(6),
 102         }, {
 103                 /* card_iom1 */
 104                 .bank_num = 2,
 105                 .pin = 22,
 106                 .func = 3,
 107                 .route_offset = 0x50,
 108                 .route_val =  BIT(16 + 7) | BIT(7),
 109         }, {
 110                 /* tsp_d5m1 */
 111                 .bank_num = 2,
 112                 .pin = 16,
 113                 .func = 3,
 114                 .route_offset = 0x50,
 115                 .route_val =  BIT(16 + 8) | BIT(8),
 116         }, {
 117                 /* cif_data5m1 */
 118                 .bank_num = 2,
 119                 .pin = 16,
 120                 .func = 4,
 121                 .route_offset = 0x50,
 122                 .route_val =  BIT(16 + 9) | BIT(9),
 123         },
 124 };
 125
 126 static int rk3328_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 127 {
 128         struct rockchip_pinctrl_priv *priv = bank->priv;
 129         int iomux_num = (pin / 8);
 130         struct regmap *regmap;
 131         int reg, ret, mask, mux_type;
 132         u8 bit;
 133         u32 data, route_reg, route_val;
 134
 135         regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 136                                 ? priv->regmap_pmu : priv->regmap_base;
 137
 138         /* get basic quadrupel of mux registers and the correct reg inside */
 139         mux_type = bank->iomux[iomux_num].type;
 140         reg = bank->iomux[iomux_num].offset;
 141         reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
 142
 143         if (bank->recalced_mask & BIT(pin))
 144                 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 145
 146         if (bank->route_mask & BIT(pin)) {
 147                 if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
 148                                            &route_val)) {
 149                         ret = regmap_write(regmap, route_reg, route_val);
 150                         if (ret)
 151                                 return ret;
 152                 }
 153         }
 154
 155         data = (mask << (bit + 16));
 156         data |= (mux & mask) << bit;
 157         ret = regmap_write(regmap, reg, data);
 158
 159         return ret;
 160 }
 161
 162 #define RK3328_PULL_OFFSET              0x100
 163
 164 static void rk3328_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 165                                          int pin_num, struct regmap **regmap,
 166                                          int *reg, u8 *bit)
 167 {
 168         struct rockchip_pinctrl_priv *priv = bank->priv;
 169
 170         *regmap = priv->regmap_base;
 171         *reg = RK3328_PULL_OFFSET;
 172         *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
 173         *reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
 174
 175         *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
 176         *bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 177 }
 178
 179 static int rk3328_set_pull(struct rockchip_pin_bank *bank,
 180                            int pin_num, int pull)
 181 {
 182         struct regmap *regmap;
 183         int reg, ret;
 184         u8 bit, type;
 185         u32 data;
 186
 187         if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
 188                 return -ENOTSUPP;
 189
 190         rk3328_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
 191         type = bank->pull_type[pin_num / 8];
 192         ret = rockchip_translate_pull_value(type, pull);
 193         if (ret < 0) {
 194                 debug("unsupported pull setting %d\n", pull);
 195                 return ret;
 196         }
 197
 198         /* enable the write to the equivalent lower bits */
 199         data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
 200         data |= (ret << bit);
 201         ret = regmap_write(regmap, reg, data);
 202
 203         return ret;
 204 }
 205
 206 #define RK3328_DRV_GRF_OFFSET           0x200
 207
 208 static void rk3328_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 209                                         int pin_num, struct regmap **regmap,
 210                                         int *reg, u8 *bit)
 211 {
 212         struct rockchip_pinctrl_priv *priv = bank->priv;
 213
 214         *regmap = priv->regmap_base;
 215         *reg = RK3328_DRV_GRF_OFFSET;
 216         *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
 217         *reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
 218
 219         *bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
 220         *bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 221 }
 222
 223 static int rk3328_set_drive(struct rockchip_pin_bank *bank,
 224                             int pin_num, int strength)
 225 {
 226         struct regmap *regmap;
 227         int reg, ret;
 228         u32 data;
 229         u8 bit;
 230         int type = bank->drv[pin_num / 8].drv_type;
 231
 232         rk3328_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
 233         ret = rockchip_translate_drive_value(type, strength);
 234         if (ret < 0) {
 235                 debug("unsupported driver strength %d\n", strength);
 236                 return ret;
 237         }
 238
 239         /* enable the write to the equivalent lower bits */
 240         data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
 241         data |= (ret << bit);
 242         ret = regmap_write(regmap, reg, data);
 243
 244         return ret;
 245 }
 246
 247 #define RK3328_SCHMITT_BITS_PER_PIN             1
 248 #define RK3328_SCHMITT_PINS_PER_REG             16
 249 #define RK3328_SCHMITT_BANK_STRIDE              8
 250 #define RK3328_SCHMITT_GRF_OFFSET               0x380
 251
 252 static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 253                                            int pin_num,
 254                                            struct regmap **regmap,
 255                                            int *reg, u8 *bit)
 256 {
 257         struct rockchip_pinctrl_priv *priv = bank->priv;
 258
 259         *regmap = priv->regmap_base;
 260         *reg = RK3328_SCHMITT_GRF_OFFSET;
 261
 262         *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;
 263         *reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4);
 264         *bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;
 265
 266         return 0;
 267 }
 268
 269 static int rk3328_set_schmitt(struct rockchip_pin_bank *bank,
 270                               int pin_num, int enable)
 271 {
 272         struct regmap *regmap;
 273         int reg;
 274         u8 bit;
 275         u32 data;
 276
 277         rk3328_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
 278         /* enable the write to the equivalent lower bits */
 279         data = BIT(bit + 16) | (enable << bit);
 280
 281         return regmap_write(regmap, reg, data);
 282 }
 283
 284 static struct rockchip_pin_bank rk3328_pin_banks[] = {
 285         PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
 286         PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
 287         PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
 288                              IOMUX_WIDTH_3BIT,
 289                              IOMUX_WIDTH_3BIT,
 290                              0),
 291         PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
 292                              IOMUX_WIDTH_3BIT,
 293                              IOMUX_WIDTH_3BIT,
 294                              0,
 295                              0),
 296 };
 297
 298 static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 299         .pin_banks              = rk3328_pin_banks,
 300         .nr_banks               = ARRAY_SIZE(rk3328_pin_banks),
 301         .grf_mux_offset         = 0x0,
 302         .iomux_recalced         = rk3328_mux_recalced_data,
 303         .niomux_recalced        = ARRAY_SIZE(rk3328_mux_recalced_data),
 304         .iomux_routes           = rk3328_mux_route_data,
 305         .niomux_routes          = ARRAY_SIZE(rk3328_mux_route_data),
 306         .set_mux                = rk3328_set_mux,
 307         .set_pull               = rk3328_set_pull,
 308         .set_drive              = rk3328_set_drive,
 309         .set_schmitt            = rk3328_set_schmitt,
 310 };
 311
 312 static const struct udevice_id rk3328_pinctrl_ids[] = {
 313         {
 314                 .compatible = "rockchip,rk3328-pinctrl",
 315                 .data = (ulong)&rk3328_pin_ctrl
 316         },
 317         { }
 318 };
 319
 320 U_BOOT_DRIVER(pinctrl_rk3328) = {
 321         .name           = "rockchip_rk3328_pinctrl",
 322         .id             = UCLASS_PINCTRL,
 323         .of_match       = rk3328_pinctrl_ids,
 324         .priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
 325         .ops            = &rockchip_pinctrl_ops,
 326 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 327         .bind           = dm_scan_fdt_dev,
 328 #endif
 329         .probe          = rockchip_pinctrl_probe,
 330 };