2 # PINCTRL infrastructure and drivers
8 bool "Support pin controllers"
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
30 config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
49 This option enables pin multiplexing through the generic pinctrl
50 framework. Most SoCs have their own own multiplexing arrangement
51 where a single pin can be used for several functions. An SoC pinctrl
52 driver allows the required function to be selected for each pin.
53 The driver is typically controlled by the device tree.
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
59 This option enables pin configuration through the generic pinctrl
63 bool "Support pin controlloers in SPL"
64 depends on SPL && SPL_DM
66 This option is an SPL-variant of the PINCTRL option.
67 See the help of PINCTRL for details.
69 config SPL_PINCTRL_FULL
70 bool "Support full pin controllers in SPL"
71 depends on SPL_PINCTRL && SPL_OF_CONTROL
74 This option is an SPL-variant of the PINCTRL_FULL option.
75 See the help of PINCTRL_FULL for details.
77 config SPL_PINCTRL_GENERIC
78 bool "Support generic pin controllers in SPL"
79 depends on SPL_PINCTRL_FULL
82 This option is an SPL-variant of the PINCTRL_GENERIC option.
83 See the help of PINCTRL_GENERIC for details.
86 bool "Support pin multiplexing controllers in SPL"
87 depends on SPL_PINCTRL_GENERIC
90 This option is an SPL-variant of the PINMUX option.
91 See the help of PINMUX for details.
92 The pinctrl subsystem can add a substantial overhead to the SPL
93 image since it typically requires quite a few tables either in the
94 driver or in the device tree. If this is acceptable and you need
95 to adjust pin multiplexing in SPL in order to boot into U-Boot,
96 enable this option. You will need to enable device tree in SPL
100 bool "Support pin configuration controllers in SPL"
101 depends on SPL_PINCTRL_GENERIC
103 This option is an SPL-variant of the PINCONF option.
104 See the help of PINCONF for details.
106 if PINCTRL || SPL_PINCTRL
108 config PINCTRL_AR933X
109 bool "QCA/Athores ar933x pin control driver"
110 depends on DM && SOC_AR933X
112 Support pin multiplexing control on QCA/Athores ar933x SoCs.
113 The driver is controlled by a device tree node which contains
114 both the GPIO definitions and pin control functions for each
115 available multiplex function.
118 bool "AT91 pinctrl driver"
121 This option is to enable the AT91 pinctrl driver for AT91 PIO
124 AT91 PIO controller is a combined gpio-controller, pin-mux and
125 pin-config module. Each I/O pin may be dedicated as a general-purpose
126 I/O or be assigned to a function of an embedded peripheral. Each I/O
127 pin has a glitch filter providing rejection of glitches lower than
128 one-half of peripheral clock cycle and a debouncing filter providing
129 rejection of unwanted pulses from key or push button operations. You
130 can also control the multi-driver capability, pull-up and pull-down
131 feature on each I/O pin.
133 config PINCTRL_AT91PIO4
134 bool "AT91 PIO4 pinctrl driver"
137 This option is to enable the AT91 pinctrl driver for AT91 PIO4
138 controller which is available on SAMA5D2 SoC.
141 bool "Microchip PIC32 pin-control and pin-mux driver"
142 depends on DM && MACH_PIC32
145 Supports individual pin selection and configuration for each
146 remappable peripheral available on Microchip PIC32
147 SoCs. This driver is controlled by a device tree node which
148 contains both GPIO defintion and pin control functions.
150 config PINCTRL_QCA953X
151 bool "QCA/Athores qca953x pin control driver"
152 depends on DM && SOC_QCA953X
154 Support pin multiplexing control on QCA/Athores qca953x SoCs.
156 The driver is controlled by a device tree node which contains both
157 the GPIO definitions and pin control functions for each available
160 config PINCTRL_ROCKCHIP_RK3036
161 bool "Rockchip rk3036 pin control driver"
164 Support pin multiplexing control on Rockchip rk3036 SoCs.
166 The driver is controlled by a device tree node which contains both
167 the GPIO definitions and pin control functions for each available
170 config PINCTRL_ROCKCHIP_RK3188
171 bool "Rockchip rk3188 pin control driver"
174 Support pin multiplexing control on Rockchip rk3188 SoCs.
176 The driver is controlled by a device tree node which contains both
177 the GPIO definitions and pin control functions for each available
180 config PINCTRL_ROCKCHIP_RK3288
181 bool "Rockchip rk3288 pin control driver"
184 Support pin multiplexing control on Rockchip rk3288 SoCs.
186 The driver is controlled by a device tree node which contains both
187 the GPIO definitions and pin control functions for each available
190 config PINCTRL_ROCKCHIP_RK3328
191 bool "Rockchip rk3328 pin control driver"
194 Support pin multiplexing control on Rockchip rk3328 SoCs.
196 The driver is controlled by a device tree node which contains both
197 the GPIO definitions and pin control functions for each available
200 config PINCTRL_ROCKCHIP_RK3368
201 bool "Rockchip RK3368 pin control driver"
204 Support pin multiplexing control on Rockchip rk3368 SoCs.
206 The driver is controlled by a device tree node which contains both
207 the GPIO definitions and pin control functions for each available
210 config PINCTRL_ROCKCHIP_RK3399
211 bool "Rockchip rk3399 pin control driver"
214 Support pin multiplexing control on Rockchip rk3399 SoCs.
216 The driver is controlled by a device tree node which contains both
217 the GPIO definitions and pin control functions for each available
220 config PINCTRL_ROCKCHIP_RV1108
221 bool "Rockchip rv1108 pin control driver"
224 Support pin multiplexing control on Rockchip rv1108 SoC.
226 The driver is controlled by a device tree node which contains
227 both the GPIO definitions and pin control functions for each
228 available multiplex function.
230 config PINCTRL_SANDBOX
231 bool "Sandbox pinctrl driver"
234 This enables pinctrl driver for sandbox.
236 Currently, this driver actually does nothing but print debug
237 messages when pinctrl operations are invoked.
239 config PINCTRL_SINGLE
240 bool "Single register pin-control and pin-multiplex driver"
243 This enables pinctrl driver for systems using a single register for
244 pin configuration and multiplexing. TI's AM335X SoCs are examples of
247 Depending on the platform make sure to also enable OF_TRANSLATE and
248 eventually SPL_OF_TRANSLATE to get correct address translations.
251 bool "STMicroelectronics STi pin-control and pin-mux driver"
252 depends on DM && ARCH_STI
255 Support pin multiplexing control on STMicrolectronics STi SoCs.
257 The driver is controlled by a device tree node which contains both
258 the GPIO definitions and pin control functions for each available
262 bool "ST STM32 pin control driver"
265 Supports pin multiplexing control on stm32 SoCs.
267 The driver is controlled by a device tree node which contains both
268 the GPIO definitions and pin control functions for each available
271 config ASPEED_AST2500_PINCTRL
272 bool "Aspeed AST2500 pin control driver"
273 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
276 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
277 Generic Pinctrl framework and is compatible with the Linux driver,
278 i.e. it uses the same device tree configuration.
282 source "drivers/pinctrl/meson/Kconfig"
283 source "drivers/pinctrl/nxp/Kconfig"
284 source "drivers/pinctrl/uniphier/Kconfig"
285 source "drivers/pinctrl/exynos/Kconfig"
286 source "drivers/pinctrl/mvebu/Kconfig"