drivers/phy/bcm6368-usbh-phy.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
   4  *
   5  * Derived from linux/arch/mips/bcm63xx/usb-common.c:
   6  *      Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
   7  *      Copyright 2013 Florian Fainelli <florian@openwrt.org>
   8  */
   9
  10 #include <common.h>
  11 #include <clk.h>
  12 #include <dm.h>
  13 #include <generic-phy.h>
  14 #include <malloc.h>
  15 #include <power-domain.h>
  16 #include <reset.h>
  17 #include <asm/io.h>
  18 #include <dm/device.h>
  19
  20 /* USBH PLL Control register */
  21 #define USBH_PLL_REG            0x18
  22 #define USBH_PLL_IDDQ_PWRDN     BIT(9)
  23 #define USBH_PLL_PWRDN_DELAY    BIT(10)
  24
  25 /* USBH Swap Control register */
  26 #define USBH_SWAP_REG           0x1c
  27 #define USBH_SWAP_OHCI_DATA     BIT(0)
  28 #define USBH_SWAP_OHCI_ENDIAN   BIT(1)
  29 #define USBH_SWAP_EHCI_DATA     BIT(3)
  30 #define USBH_SWAP_EHCI_ENDIAN   BIT(4)
  31
  32 /* USBH Setup register */
  33 #define USBH_SETUP_REG          0x28
  34 #define USBH_SETUP_IOC          BIT(4)
  35 #define USBH_SETUP_IPP          BIT(5)
  36
  37 struct bcm6368_usbh_hw {
  38         uint32_t setup_clr;
  39         uint32_t pll_clr;
  40 };
  41
  42 struct bcm6368_usbh_priv {
  43         const struct bcm6368_usbh_hw *hw;
  44         void __iomem *regs;
  45 };
  46
  47 static int bcm6368_usbh_init(struct phy *phy)
  48 {
  49         struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
  50         const struct bcm6368_usbh_hw *hw = priv->hw;
  51
  52         /* configure to work in native cpu endian */
  53         clrsetbits_be32(priv->regs + USBH_SWAP_REG,
  54                         USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
  55                         USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
  56
  57         /* setup config */
  58         if (hw->setup_clr)
  59                 clrbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_clr);
  60
  61         setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
  62
  63         /* enable pll control */
  64         if (hw->pll_clr)
  65                 clrbits_be32(priv->regs + USBH_PLL_REG, hw->pll_clr);
  66
  67         return 0;
  68 }
  69
  70 static struct phy_ops bcm6368_usbh_ops = {
  71         .init = bcm6368_usbh_init,
  72 };
  73
  74 static const struct bcm6368_usbh_hw bcm6328_hw = {
  75         .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  76         .setup_clr = 0,
  77 };
  78
  79 static const struct bcm6368_usbh_hw bcm6362_hw = {
  80         .pll_clr = 0,
  81         .setup_clr = 0,
  82 };
  83
  84 static const struct bcm6368_usbh_hw bcm6368_hw = {
  85         .pll_clr = 0,
  86         .setup_clr = 0,
  87 };
  88
  89 static const struct bcm6368_usbh_hw bcm63268_hw = {
  90         .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  91         .setup_clr = USBH_SETUP_IPP,
  92 };
  93
  94 static const struct udevice_id bcm6368_usbh_ids[] = {
  95         {
  96                 .compatible = "brcm,bcm6328-usbh",
  97                 .data = (ulong)&bcm6328_hw,
  98         }, {
  99                 .compatible = "brcm,bcm6362-usbh",
 100                 .data = (ulong)&bcm6362_hw,
 101         }, {
 102                 .compatible = "brcm,bcm6368-usbh",
 103                 .data = (ulong)&bcm6368_hw,
 104         }, {
 105                 .compatible = "brcm,bcm63268-usbh",
 106                 .data = (ulong)&bcm63268_hw,
 107         }, { /* sentinel */ }
 108 };
 109
 110 static int bcm6368_usbh_probe(struct udevice *dev)
 111 {
 112         struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
 113         const struct bcm6368_usbh_hw *hw =
 114                 (const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
 115 #if defined(CONFIG_POWER_DOMAIN)
 116         struct power_domain pwr_dom;
 117 #endif
 118         struct reset_ctl rst_ctl;
 119         struct clk clk;
 120         int ret;
 121
 122         priv->regs = dev_remap_addr(dev);
 123         if (!priv->regs)
 124                 return -EINVAL;
 125
 126         priv->hw = hw;
 127
 128         /* enable usbh clock */
 129         ret = clk_get_by_name(dev, "usbh", &clk);
 130         if (ret < 0)
 131                 return ret;
 132
 133         ret = clk_enable(&clk);
 134         if (ret < 0)
 135                 return ret;
 136
 137         ret = clk_free(&clk);
 138         if (ret < 0)
 139                 return ret;
 140
 141 #if defined(CONFIG_POWER_DOMAIN)
 142         /* enable power domain */
 143         ret = power_domain_get(dev, &pwr_dom);
 144         if (ret < 0)
 145                 return ret;
 146
 147         ret = power_domain_on(&pwr_dom);
 148         if (ret < 0)
 149                 return ret;
 150
 151         ret = power_domain_free(&pwr_dom);
 152         if (ret < 0)
 153                 return ret;
 154 #endif
 155
 156         /* perform reset */
 157         ret = reset_get_by_index(dev, 0, &rst_ctl);
 158         if (ret < 0)
 159                 return ret;
 160
 161         ret = reset_deassert(&rst_ctl);
 162         if (ret < 0)
 163                 return ret;
 164
 165         ret = reset_free(&rst_ctl);
 166         if (ret < 0)
 167                 return ret;
 168
 169         /* enable usb_ref clock */
 170         ret = clk_get_by_name(dev, "usb_ref", &clk);
 171         if (!ret) {
 172                 ret = clk_enable(&clk);
 173                 if (ret < 0)
 174                         return ret;
 175
 176                 ret = clk_free(&clk);
 177                 if (ret < 0)
 178                         return ret;
 179         }
 180
 181         mdelay(100);
 182
 183         return 0;
 184 }
 185
 186 U_BOOT_DRIVER(bcm6368_usbh) = {
 187         .name = "bcm6368-usbh",
 188         .id = UCLASS_PHY,
 189         .of_match = bcm6368_usbh_ids,
 190         .ops = &bcm6368_usbh_ops,
 191         .priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
 192         .probe = bcm6368_usbh_probe,
 193 };