1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
5 * Derived from linux/arch/mips/bcm63xx/usb-common.c:
6 * Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright 2013 Florian Fainelli <florian@openwrt.org>
13 #include <generic-phy.h>
15 #include <power-domain.h>
18 #include <dm/device.h>
20 /* USBH Setup register */
21 #define USBH_SETUP_REG 0x00
22 #define USBH_SETUP_IOC BIT(4)
24 /* USBH PLL Control register */
25 #define USBH_PLL_REG 0x04
26 #define USBH_PLL_SUSP_EN BIT(27)
27 #define USBH_PLL_IDDQ_PWRDN BIT(31)
29 /* USBH Swap Control register */
30 #define USBH_SWAP_REG 0x0c
31 #define USBH_SWAP_OHCI_DATA BIT(0)
32 #define USBH_SWAP_OHCI_ENDIAN BIT(1)
33 #define USBH_SWAP_EHCI_DATA BIT(3)
34 #define USBH_SWAP_EHCI_ENDIAN BIT(4)
36 /* USBH Sim Control register */
37 #define USBH_SIM_REG 0x20
38 #define USBH_SIM_LADDR BIT(5)
40 struct bcm6318_usbh_priv {
44 static int bcm6318_usbh_init(struct phy *phy)
46 struct bcm6318_usbh_priv *priv = dev_get_priv(phy->dev);
48 /* enable pll control susp */
49 setbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_SUSP_EN);
51 /* configure to work in native cpu endian */
52 clrsetbits_be32(priv->regs + USBH_SWAP_REG,
53 USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
54 USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
57 setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
59 /* disable pll control pwrdn */
60 clrbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_IDDQ_PWRDN);
62 /* sim control config */
63 setbits_be32(priv->regs + USBH_SIM_REG, USBH_SIM_LADDR);
68 static struct phy_ops bcm6318_usbh_ops = {
69 .init = bcm6318_usbh_init,
72 static const struct udevice_id bcm6318_usbh_ids[] = {
73 { .compatible = "brcm,bcm6318-usbh" },
77 static int bcm6318_usbh_probe(struct udevice *dev)
79 struct bcm6318_usbh_priv *priv = dev_get_priv(dev);
80 struct power_domain pwr_dom;
81 struct reset_ctl rst_ctl;
85 priv->regs = dev_remap_addr(dev);
89 /* enable usbh clock */
90 ret = clk_get_by_name(dev, "usbh", &clk);
94 ret = clk_enable(&clk);
102 /* enable power domain */
103 ret = power_domain_get(dev, &pwr_dom);
107 ret = power_domain_on(&pwr_dom);
111 ret = power_domain_free(&pwr_dom);
116 ret = reset_get_by_index(dev, 0, &rst_ctl);
120 ret = reset_deassert(&rst_ctl);
124 ret = reset_free(&rst_ctl);
133 U_BOOT_DRIVER(bcm6318_usbh) = {
134 .name = "bcm6318-usbh",
136 .of_match = bcm6318_usbh_ids,
137 .ops = &bcm6318_usbh_ops,
138 .priv_auto_alloc_size = sizeof(struct bcm6318_usbh_priv),
139 .probe = bcm6318_usbh_probe,