1 // SPDX-License-Identifier: GPL-2.0
3 * Generic PCIE host provided by e.g. QEMU
5 * Heavily based on drivers/pci/pcie_xilinx.c
7 * Copyright (C) 2016 Imagination Technologies
17 * struct generic_ecam_pcie - generic_ecam PCIe controller state
18 * @cfg_base: The base address of memory mapped configuration space
20 struct generic_ecam_pcie {
27 * pci_generic_ecam_conf_address() - Calculate the address of a config access
28 * @bus: Pointer to the PCI bus
29 * @bdf: Identifies the PCIe device to access
30 * @offset: The offset into the device's configuration space
31 * @paddress: Pointer to the pointer to write the calculates address to
33 * Calculates the address that should be accessed to perform a PCIe
34 * configuration space access for a given device identified by the PCIe
35 * controller device @pcie and the bus, device & function numbers in @bdf. If
36 * access to the device is not valid then the function will return an error
37 * code. Otherwise the address to access will be written to the pointer pointed
40 static int pci_generic_ecam_conf_address(const struct udevice *bus,
41 pci_dev_t bdf, uint offset,
44 struct generic_ecam_pcie *pcie = dev_get_priv(bus);
47 addr = pcie->cfg_base;
48 addr += (PCI_BUS(bdf) - pcie->first_busno) << 20;
49 addr += PCI_DEV(bdf) << 15;
50 addr += PCI_FUNC(bdf) << 12;
57 static bool pci_generic_ecam_addr_valid(const struct udevice *bus,
60 struct generic_ecam_pcie *pcie = dev_get_priv(bus);
61 int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
63 return (PCI_BUS(bdf) >= pcie->first_busno &&
64 PCI_BUS(bdf) < pcie->first_busno + num_buses);
68 * pci_generic_ecam_read_config() - Read from configuration space
69 * @bus: Pointer to the PCI bus
70 * @bdf: Identifies the PCIe device to access
71 * @offset: The offset into the device's configuration space
72 * @valuep: A pointer at which to store the read value
73 * @size: Indicates the size of access to perform
75 * Read a value of size @size from offset @offset within the configuration
76 * space of the device identified by the bus, device & function numbers in @bdf
77 * on the PCI bus @bus.
79 static int pci_generic_ecam_read_config(const struct udevice *bus,
80 pci_dev_t bdf, uint offset,
81 ulong *valuep, enum pci_size_t size)
83 if (!pci_generic_ecam_addr_valid(bus, bdf)) {
84 *valuep = pci_get_ff(size);
88 return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
89 bdf, offset, valuep, size);
93 * pci_generic_ecam_write_config() - Write to configuration space
94 * @bus: Pointer to the PCI bus
95 * @bdf: Identifies the PCIe device to access
96 * @offset: The offset into the device's configuration space
97 * @value: The value to write
98 * @size: Indicates the size of access to perform
100 * Write the value @value of size @size from offset @offset within the
101 * configuration space of the device identified by the bus, device & function
102 * numbers in @bdf on the PCI bus @bus.
104 static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
105 uint offset, ulong value,
106 enum pci_size_t size)
108 if (!pci_generic_ecam_addr_valid(bus, bdf))
111 return pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address,
112 bdf, offset, value, size);
116 * pci_generic_ecam_ofdata_to_platdata() - Translate from DT to device state
117 * @dev: A pointer to the device being operated on
119 * Translate relevant data from the device tree pertaining to device @dev into
120 * state that the driver will later make use of. This state is stored in the
121 * device's private data structure.
123 * Return: 0 on success, else -EINVAL
125 static int pci_generic_ecam_ofdata_to_platdata(struct udevice *dev)
127 struct generic_ecam_pcie *pcie = dev_get_priv(dev);
128 struct fdt_resource reg_res;
129 DECLARE_GLOBAL_DATA_PTR;
132 err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
135 pr_err("\"reg\" resource not found\n");
139 pcie->size = fdt_resource_size(®_res);
140 pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE);
145 static int pci_generic_ecam_probe(struct udevice *dev)
147 struct generic_ecam_pcie *pcie = dev_get_priv(dev);
149 pcie->first_busno = dev->seq;
154 static const struct dm_pci_ops pci_generic_ecam_ops = {
155 .read_config = pci_generic_ecam_read_config,
156 .write_config = pci_generic_ecam_write_config,
159 static const struct udevice_id pci_generic_ecam_ids[] = {
160 { .compatible = "pci-host-ecam-generic" },
164 U_BOOT_DRIVER(pci_generic_ecam) = {
165 .name = "pci_generic_ecam",
167 .of_match = pci_generic_ecam_ids,
168 .ops = &pci_generic_ecam_ops,
169 .probe = pci_generic_ecam_probe,
170 .ofdata_to_platdata = pci_generic_ecam_ofdata_to_platdata,
171 .priv_auto_alloc_size = sizeof(struct generic_ecam_pcie),