5 Enable support for PCI (Peripheral Interconnect Bus), a type of bus
6 used on some devices to allow the CPU to communicate with its
12 bool "Enable driver model for PCI"
15 Use driver model for PCI. Driver model is the new method for
16 orgnising devices in U-Boot. For PCI, driver model keeps track of
17 available PCI devices, allows scanning of PCI buses and provides
18 device configuration support.
21 bool "Enable compatible functions for PCI"
24 Enable compatibility functions for PCI so that old code can be used
25 with CONFIG_DM_PCI enabled. This should be used as an interim
26 measure when porting a board to use driver model for PCI. Once the
27 board is fully supported, this option should be disabled.
30 bool "Enable Aardvark PCIe driver"
33 depends on ARMADA_3700
35 Say Y here if you want to enable PCIe controller support on
36 Armada37x0 SoCs. The PCIe controller on Armada37x0 is based on
40 bool "Enable Plug & Play support for PCI"
41 depends on PCI || DM_PCI
44 Enable PCI memory and I/O space resource allocation and assignment.
46 config PCIE_ECAM_GENERIC
47 bool "Generic ECAM-based PCI host controller support"
51 Say Y here if you want to enable support for generic ECAM-based
52 PCIe host controllers, such as the one emulated by QEMU.
55 bool "Enable Armada-8K PCIe driver (DesignWare core)"
59 Say Y here if you want to enable PCIe controller support on
60 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
64 bool "Renesas RCar Gen2 PCIe driver"
68 Say Y here if you want to enable PCIe controller support on
69 Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is
70 also used to access EHCI USB controller on the SoC.
73 bool "Renesas RCar Gen3 PCIe driver"
77 Say Y here if you want to enable PCIe controller support on
78 Renesas RCar Gen3 SoCs.
81 bool "Sandbox PCI support"
82 depends on SANDBOX && DM_PCI
84 Support PCI on sandbox, as an emulated bus. This permits testing of
85 PCI feature such as bus scanning, device configuration and device
86 access. The available (emulated) devices are defined statically in
87 the device tree but the normal PCI scan technique is used to find
91 bool "Tegra PCI support"
93 depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
95 Enable support for the PCIe controller found on some generations of
96 Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
97 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports
98 with a total of 5 lanes. Some boards require this for Ethernet
99 support to work (e.g. beaver, jetson-tk1).
102 bool "Xilinx AXI Bridge for PCI Express"
105 Enable support for the Xilinx AXI bridge for PCI express, an IP block
106 which can be used on some generations of Xilinx FPGAs.
108 config PCIE_LAYERSCAPE
109 bool "Layerscape PCIe support"
112 Support Layerscape PCIe. The Layerscape SoC may have one or several
113 PCIe controllers. The PCIe may works in RC or EP mode according to
114 RCW[HOST_AGT_PEX] setting.
116 config PCIE_LAYERSCAPE_GEN4
117 bool "Layerscape Gen4 PCIe support"
120 Support PCIe Gen4 on NXP Layerscape SoCs, which may have one or
121 several PCIe controllers. The PCIe controller can work in RC or
122 EP mode according to RCW[HOST_AGT_PEX] setting.
124 config PCIE_INTEL_FPGA
125 bool "Intel FPGA PCIe support"
128 Say Y here if you want to enable PCIe controller support on Intel
129 FPGA, example Stratix 10.
132 bool "Enable Armada XP/38x PCIe driver"
133 depends on ARCH_MVEBU
137 Say Y here if you want to enable PCIe controller support on