1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2018 Quantenna Communications, Inc. All rights reserved. */
4 #include <linux/module.h>
5 #include <linux/printk.h>
7 #include <linux/spinlock.h>
8 #include <linux/mutex.h>
9 #include <linux/netdevice.h>
10 #include <linux/seq_file.h>
11 #include <linux/workqueue.h>
12 #include <linux/completion.h>
14 #include "pcie_priv.h"
20 #include "qtn_hw_ids.h"
22 #define QTN_SYSCTL_BAR 0
23 #define QTN_SHMEM_BAR 2
26 #define QTN_PCIE_MAX_FW_BUFSZ (1 * 1024 * 1024)
28 static bool use_msi = true;
29 module_param(use_msi, bool, 0644);
30 MODULE_PARM_DESC(use_msi, "set 0 to use legacy interrupt");
32 static unsigned int tx_bd_size_param;
33 module_param(tx_bd_size_param, uint, 0644);
34 MODULE_PARM_DESC(tx_bd_size_param, "Tx descriptors queue size");
36 static unsigned int rx_bd_size_param = 256;
37 module_param(rx_bd_size_param, uint, 0644);
38 MODULE_PARM_DESC(rx_bd_size_param, "Rx descriptors queue size");
40 static u8 flashboot = 1;
41 module_param(flashboot, byte, 0644);
42 MODULE_PARM_DESC(flashboot, "set to 0 to use FW binary file on FS");
44 static unsigned int fw_blksize_param = QTN_PCIE_MAX_FW_BUFSZ;
45 module_param(fw_blksize_param, uint, 0644);
46 MODULE_PARM_DESC(fw_blksize_param, "firmware loading block size in bytes");
48 #define DRV_NAME "qtnfmac_pcie"
50 int qtnf_pcie_control_tx(struct qtnf_bus *bus, struct sk_buff *skb)
52 struct qtnf_pcie_bus_priv *priv = get_bus_priv(bus);
55 ret = qtnf_shm_ipc_send(&priv->shm_ipc_ep_in, skb->data, skb->len);
57 if (ret == -ETIMEDOUT) {
58 pr_err("EP firmware is dead\n");
59 bus->fw_state = QTNF_FW_STATE_DEAD;
65 int qtnf_pcie_alloc_skb_array(struct qtnf_pcie_bus_priv *priv)
67 struct sk_buff **vaddr;
70 len = priv->tx_bd_num * sizeof(*priv->tx_skb) +
71 priv->rx_bd_num * sizeof(*priv->rx_skb);
72 vaddr = devm_kzalloc(&priv->pdev->dev, len, GFP_KERNEL);
79 vaddr += priv->tx_bd_num;
85 static void qtnf_pcie_bringup_fw_async(struct qtnf_bus *bus)
87 struct qtnf_pcie_bus_priv *priv = get_bus_priv(bus);
88 struct pci_dev *pdev = priv->pdev;
90 get_device(&pdev->dev);
91 schedule_work(&bus->fw_work);
94 static int qtnf_dbg_mps_show(struct seq_file *s, void *data)
96 struct qtnf_bus *bus = dev_get_drvdata(s->private);
97 struct qtnf_pcie_bus_priv *priv = get_bus_priv(bus);
99 seq_printf(s, "%d\n", pcie_get_mps(priv->pdev));
104 static int qtnf_dbg_msi_show(struct seq_file *s, void *data)
106 struct qtnf_bus *bus = dev_get_drvdata(s->private);
107 struct qtnf_pcie_bus_priv *priv = get_bus_priv(bus);
109 seq_printf(s, "%u\n", priv->msi_enabled);
114 static int qtnf_dbg_shm_stats(struct seq_file *s, void *data)
116 struct qtnf_bus *bus = dev_get_drvdata(s->private);
117 struct qtnf_pcie_bus_priv *priv = get_bus_priv(bus);
119 seq_printf(s, "shm_ipc_ep_in.tx_packet_count(%zu)\n",
120 priv->shm_ipc_ep_in.tx_packet_count);
121 seq_printf(s, "shm_ipc_ep_in.rx_packet_count(%zu)\n",
122 priv->shm_ipc_ep_in.rx_packet_count);
123 seq_printf(s, "shm_ipc_ep_out.tx_packet_count(%zu)\n",
124 priv->shm_ipc_ep_out.tx_timeout_count);
125 seq_printf(s, "shm_ipc_ep_out.rx_packet_count(%zu)\n",
126 priv->shm_ipc_ep_out.rx_packet_count);
131 int qtnf_pcie_fw_boot_done(struct qtnf_bus *bus)
135 bus->fw_state = QTNF_FW_STATE_BOOT_DONE;
136 ret = qtnf_core_attach(bus);
138 pr_err("failed to attach core\n");
140 qtnf_debugfs_init(bus, DRV_NAME);
141 qtnf_debugfs_add_entry(bus, "mps", qtnf_dbg_mps_show);
142 qtnf_debugfs_add_entry(bus, "msi_enabled", qtnf_dbg_msi_show);
143 qtnf_debugfs_add_entry(bus, "shm_stats", qtnf_dbg_shm_stats);
149 static void qtnf_tune_pcie_mps(struct pci_dev *pdev)
151 struct pci_dev *parent;
152 int mps_p, mps_o, mps_m, mps;
156 mps_o = pcie_get_mps(pdev);
158 /* maximum supported mps */
159 mps_m = 128 << pdev->pcie_mpss;
161 /* suggested new mps value */
164 if (pdev->bus && pdev->bus->self) {
165 /* parent (bus) mps */
166 parent = pdev->bus->self;
168 if (pci_is_pcie(parent)) {
169 mps_p = pcie_get_mps(parent);
170 mps = min(mps_m, mps_p);
174 ret = pcie_set_mps(pdev, mps);
176 pr_err("failed to set mps to %d, keep using current %d\n",
181 pr_debug("set mps to %d (was %d, max %d)\n", mps, mps_o, mps_m);
184 static void qtnf_pcie_init_irq(struct qtnf_pcie_bus_priv *priv, bool use_msi)
186 struct pci_dev *pdev = priv->pdev;
188 /* fall back to legacy INTx interrupts by default */
189 priv->msi_enabled = 0;
191 /* check if MSI capability is available */
193 if (!pci_enable_msi(pdev)) {
194 pr_debug("enabled MSI interrupt\n");
195 priv->msi_enabled = 1;
197 pr_warn("failed to enable MSI interrupts");
201 if (!priv->msi_enabled) {
202 pr_warn("legacy PCIE interrupts enabled\n");
207 static void __iomem *qtnf_map_bar(struct pci_dev *pdev, u8 index)
214 ret = pcim_iomap_regions(pdev, 1 << index, "qtnfmac_pcie");
216 return IOMEM_ERR_PTR(ret);
218 busaddr = pci_resource_start(pdev, index);
219 len = pci_resource_len(pdev, index);
220 vaddr = pcim_iomap_table(pdev)[index];
222 return IOMEM_ERR_PTR(-ENOMEM);
224 pr_debug("BAR%u vaddr=0x%p busaddr=%pad len=%u\n",
225 index, vaddr, &busaddr, (int)len);
230 static void qtnf_pcie_control_rx_callback(void *arg, const u8 __iomem *buf,
233 struct qtnf_pcie_bus_priv *priv = arg;
234 struct qtnf_bus *bus = pci_get_drvdata(priv->pdev);
237 if (unlikely(len == 0)) {
238 pr_warn("zero length packet received\n");
242 skb = __dev_alloc_skb(len, GFP_KERNEL);
244 if (unlikely(!skb)) {
245 pr_err("failed to allocate skb\n");
249 memcpy_fromio(skb_put(skb, len), buf, len);
251 qtnf_trans_handle_rx_ctl_packet(bus, skb);
254 void qtnf_pcie_init_shm_ipc(struct qtnf_pcie_bus_priv *priv,
255 struct qtnf_shm_ipc_region __iomem *ipc_tx_reg,
256 struct qtnf_shm_ipc_region __iomem *ipc_rx_reg,
257 const struct qtnf_shm_ipc_int *ipc_int)
259 const struct qtnf_shm_ipc_rx_callback rx_callback = {
260 qtnf_pcie_control_rx_callback, priv };
262 qtnf_shm_ipc_init(&priv->shm_ipc_ep_in, QTNF_SHM_IPC_OUTBOUND,
263 ipc_tx_reg, priv->workqueue,
264 ipc_int, &rx_callback);
265 qtnf_shm_ipc_init(&priv->shm_ipc_ep_out, QTNF_SHM_IPC_INBOUND,
266 ipc_rx_reg, priv->workqueue,
267 ipc_int, &rx_callback);
270 static int qtnf_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
272 struct qtnf_pcie_bus_priv *pcie_priv;
273 struct qtnf_bus *bus;
274 void __iomem *sysctl_bar;
275 void __iomem *epmem_bar;
276 void __iomem *dmareg_bar;
280 if (!pci_is_pcie(pdev)) {
281 pr_err("device %s is not PCI Express\n", pci_name(pdev));
285 qtnf_tune_pcie_mps(pdev);
287 ret = pcim_enable_device(pdev);
289 pr_err("failed to init PCI device %x\n", pdev->device);
293 pci_set_master(pdev);
295 sysctl_bar = qtnf_map_bar(pdev, QTN_SYSCTL_BAR);
296 if (IS_ERR(sysctl_bar)) {
297 pr_err("failed to map BAR%u\n", QTN_SYSCTL_BAR);
301 dmareg_bar = qtnf_map_bar(pdev, QTN_DMA_BAR);
302 if (IS_ERR(dmareg_bar)) {
303 pr_err("failed to map BAR%u\n", QTN_DMA_BAR);
307 epmem_bar = qtnf_map_bar(pdev, QTN_SHMEM_BAR);
308 if (IS_ERR(epmem_bar)) {
309 pr_err("failed to map BAR%u\n", QTN_SHMEM_BAR);
313 chipid = qtnf_chip_id_get(sysctl_bar);
315 pr_info("identified device: %s\n", qtnf_chipid_to_string(chipid));
318 case QTN_CHIP_ID_PEARL:
319 case QTN_CHIP_ID_PEARL_B:
320 case QTN_CHIP_ID_PEARL_C:
321 bus = qtnf_pcie_pearl_alloc(pdev);
323 case QTN_CHIP_ID_TOPAZ:
324 bus = qtnf_pcie_topaz_alloc(pdev);
327 pr_err("unsupported chip ID 0x%x\n", chipid);
334 pcie_priv = get_bus_priv(bus);
335 pci_set_drvdata(pdev, bus);
336 bus->dev = &pdev->dev;
337 bus->fw_state = QTNF_FW_STATE_DETACHED;
338 pcie_priv->pdev = pdev;
339 pcie_priv->tx_stopped = 0;
340 pcie_priv->rx_bd_num = rx_bd_size_param;
341 pcie_priv->flashboot = flashboot;
343 if (fw_blksize_param > QTN_PCIE_MAX_FW_BUFSZ)
344 pcie_priv->fw_blksize = QTN_PCIE_MAX_FW_BUFSZ;
346 pcie_priv->fw_blksize = fw_blksize_param;
348 mutex_init(&bus->bus_lock);
349 spin_lock_init(&pcie_priv->tx_lock);
350 spin_lock_init(&pcie_priv->tx_reclaim_lock);
352 pcie_priv->tx_full_count = 0;
353 pcie_priv->tx_done_count = 0;
354 pcie_priv->pcie_irq_count = 0;
355 pcie_priv->tx_reclaim_done = 0;
356 pcie_priv->tx_reclaim_req = 0;
357 pcie_priv->tx_eapol = 0;
359 pcie_priv->workqueue = create_singlethread_workqueue("QTNF_PCIE");
360 if (!pcie_priv->workqueue) {
361 pr_err("failed to alloc bus workqueue\n");
365 ret = dma_set_mask_and_coherent(&pdev->dev,
366 pcie_priv->dma_mask_get_cb());
368 pr_err("PCIE DMA coherent mask init failed 0x%llx\n",
369 pcie_priv->dma_mask_get_cb());
373 init_dummy_netdev(&bus->mux_dev);
374 qtnf_pcie_init_irq(pcie_priv, use_msi);
375 pcie_priv->sysctl_bar = sysctl_bar;
376 pcie_priv->dmareg_bar = dmareg_bar;
377 pcie_priv->epmem_bar = epmem_bar;
378 pci_save_state(pdev);
380 ret = pcie_priv->probe_cb(bus, tx_bd_size_param);
384 qtnf_pcie_bringup_fw_async(bus);
388 flush_workqueue(pcie_priv->workqueue);
389 destroy_workqueue(pcie_priv->workqueue);
390 pci_set_drvdata(pdev, NULL);
394 static void qtnf_pcie_free_shm_ipc(struct qtnf_pcie_bus_priv *priv)
396 qtnf_shm_ipc_free(&priv->shm_ipc_ep_in);
397 qtnf_shm_ipc_free(&priv->shm_ipc_ep_out);
400 static void qtnf_pcie_remove(struct pci_dev *dev)
402 struct qtnf_pcie_bus_priv *priv;
403 struct qtnf_bus *bus;
405 bus = pci_get_drvdata(dev);
409 priv = get_bus_priv(bus);
411 cancel_work_sync(&bus->fw_work);
413 if (qtnf_fw_is_attached(bus))
414 qtnf_core_detach(bus);
416 netif_napi_del(&bus->mux_napi);
417 flush_workqueue(priv->workqueue);
418 destroy_workqueue(priv->workqueue);
419 tasklet_kill(&priv->reclaim_tq);
421 qtnf_pcie_free_shm_ipc(priv);
422 qtnf_debugfs_remove(bus);
423 priv->remove_cb(bus);
424 pci_set_drvdata(priv->pdev, NULL);
427 #ifdef CONFIG_PM_SLEEP
428 static int qtnf_pcie_suspend(struct device *dev)
430 struct qtnf_pcie_bus_priv *priv;
431 struct qtnf_bus *bus;
433 bus = pci_get_drvdata(to_pci_dev(dev));
437 priv = get_bus_priv(bus);
438 return priv->suspend_cb(bus);
441 static int qtnf_pcie_resume(struct device *dev)
443 struct qtnf_pcie_bus_priv *priv;
444 struct qtnf_bus *bus;
446 bus = pci_get_drvdata(to_pci_dev(dev));
450 priv = get_bus_priv(bus);
451 return priv->resume_cb(bus);
454 /* Power Management Hooks */
455 static SIMPLE_DEV_PM_OPS(qtnf_pcie_pm_ops, qtnf_pcie_suspend,
459 static const struct pci_device_id qtnf_pcie_devid_table[] = {
461 PCIE_VENDOR_ID_QUANTENNA, PCIE_DEVICE_ID_QSR,
462 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
467 MODULE_DEVICE_TABLE(pci, qtnf_pcie_devid_table);
469 static struct pci_driver qtnf_pcie_drv_data = {
471 .id_table = qtnf_pcie_devid_table,
472 .probe = qtnf_pcie_probe,
473 .remove = qtnf_pcie_remove,
474 #ifdef CONFIG_PM_SLEEP
476 .pm = &qtnf_pcie_pm_ops,
481 static int __init qtnf_pcie_register(void)
483 return pci_register_driver(&qtnf_pcie_drv_data);
486 static void __exit qtnf_pcie_exit(void)
488 pci_unregister_driver(&qtnf_pcie_drv_data);
491 module_init(qtnf_pcie_register);
492 module_exit(qtnf_pcie_exit);
494 MODULE_AUTHOR("Quantenna Communications");
495 MODULE_DESCRIPTION("Quantenna PCIe bus driver for 802.11 wireless LAN.");
496 MODULE_LICENSE("GPL");