2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/module.h>
18 #include <asm/unaligned.h>
22 #define EE_FIELD(_name, _value) [MT_EE_##_name] = (_value) | 1
25 mt76x2_eeprom_get_macaddr(struct mt76x02_dev *dev)
27 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR;
29 memcpy(dev->mt76.macaddr, src, ETH_ALEN);
34 mt76x2_has_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
36 u16 *efuse_w = (u16 *) efuse;
38 if (efuse_w[MT_EE_NIC_CONF_0] != 0)
41 if (efuse_w[MT_EE_XTAL_TRIM_1] == 0xffff)
44 if (efuse_w[MT_EE_TX_POWER_DELTA_BW40] != 0)
47 if (efuse_w[MT_EE_TX_POWER_0_START_2G] == 0xffff)
50 if (efuse_w[MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA] != 0)
53 if (efuse_w[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE] == 0xffff)
60 mt76x2_apply_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
62 #define GROUP_5G(_id) \
63 MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
64 MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1, \
65 MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
66 MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1
68 static const u8 cal_free_bytes[] = {
70 MT_EE_TX_POWER_EXT_PA_5G + 1,
71 MT_EE_TX_POWER_0_START_2G,
72 MT_EE_TX_POWER_0_START_2G + 1,
73 MT_EE_TX_POWER_1_START_2G,
74 MT_EE_TX_POWER_1_START_2G + 1,
81 MT_EE_RF_2G_TSSI_OFF_TXPOWER,
82 MT_EE_RF_2G_RX_HIGH_GAIN + 1,
83 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN,
84 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN + 1,
85 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN,
86 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN + 1,
87 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN,
88 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN + 1,
90 u8 *eeprom = dev->mt76.eeprom.data;
92 eeprom[MT_EE_TX_POWER_0_START_5G],
93 eeprom[MT_EE_TX_POWER_0_START_5G + 1],
94 eeprom[MT_EE_TX_POWER_1_START_5G],
95 eeprom[MT_EE_TX_POWER_1_START_5G + 1]
100 if (!mt76x2_has_cal_free_data(dev, efuse))
103 for (i = 0; i < ARRAY_SIZE(cal_free_bytes); i++) {
104 int offset = cal_free_bytes[i];
106 eeprom[offset] = efuse[offset];
109 if (!(efuse[MT_EE_TX_POWER_0_START_5G] |
110 efuse[MT_EE_TX_POWER_0_START_5G + 1]))
111 memcpy(eeprom + MT_EE_TX_POWER_0_START_5G, prev_grp0, 2);
112 if (!(efuse[MT_EE_TX_POWER_1_START_5G] |
113 efuse[MT_EE_TX_POWER_1_START_5G + 1]))
114 memcpy(eeprom + MT_EE_TX_POWER_1_START_5G, prev_grp0 + 2, 2);
116 val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT);
118 eeprom[MT_EE_BT_RCAL_RESULT] = val & 0xff;
120 val = get_unaligned_le16(efuse + MT_EE_BT_VCDL_CALIBRATION);
122 eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8;
124 val = get_unaligned_le16(efuse + MT_EE_BT_PMUCFG);
126 eeprom[MT_EE_BT_PMUCFG] = val & 0xff;
129 static int mt76x2_check_eeprom(struct mt76x02_dev *dev)
131 u16 val = get_unaligned_le16(dev->mt76.eeprom.data);
134 val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID);
141 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val);
147 mt76x2_eeprom_load(struct mt76x02_dev *dev)
153 ret = mt76_eeprom_init(&dev->mt76, MT7662_EEPROM_SIZE);
159 found = !mt76x2_check_eeprom(dev);
161 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, MT7662_EEPROM_SIZE,
163 dev->mt76.otp.size = MT7662_EEPROM_SIZE;
164 if (!dev->mt76.otp.data)
167 efuse = dev->mt76.otp.data;
169 if (mt76x02_get_efuse_data(dev, 0, efuse, MT7662_EEPROM_SIZE,
174 mt76x2_apply_cal_free_data(dev, efuse);
176 /* FIXME: check if efuse data is complete */
178 memcpy(dev->mt76.eeprom.data, efuse, MT7662_EEPROM_SIZE);
189 mt76x2_set_rx_gain_group(struct mt76x02_dev *dev, u8 val)
191 s8 *dest = dev->cal.rx.high_gain;
193 if (!mt76x02_field_valid(val)) {
199 dest[0] = mt76x02_sign_extend(val, 4);
200 dest[1] = mt76x02_sign_extend(val >> 4, 4);
204 mt76x2_set_rssi_offset(struct mt76x02_dev *dev, int chain, u8 val)
206 s8 *dest = dev->cal.rx.rssi_offset;
208 if (!mt76x02_field_valid(val)) {
213 dest[chain] = mt76x02_sign_extend_optional(val, 7);
216 static enum mt76x2_cal_channel_group
217 mt76x2_get_cal_channel_group(int channel)
219 if (channel >= 184 && channel <= 196)
220 return MT_CH_5G_JAPAN;
222 return MT_CH_5G_UNII_1;
224 return MT_CH_5G_UNII_2;
226 return MT_CH_5G_UNII_2E_1;
228 return MT_CH_5G_UNII_2E_2;
229 return MT_CH_5G_UNII_3;
233 mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel)
235 enum mt76x2_cal_channel_group group;
237 group = mt76x2_get_cal_channel_group(channel);
240 return mt76x02_eeprom_get(dev,
241 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN);
242 case MT_CH_5G_UNII_1:
243 return mt76x02_eeprom_get(dev,
244 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN) >> 8;
245 case MT_CH_5G_UNII_2:
246 return mt76x02_eeprom_get(dev,
247 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN);
248 case MT_CH_5G_UNII_2E_1:
249 return mt76x02_eeprom_get(dev,
250 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN) >> 8;
251 case MT_CH_5G_UNII_2E_2:
252 return mt76x02_eeprom_get(dev,
253 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN);
255 return mt76x02_eeprom_get(dev,
256 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN) >> 8;
260 void mt76x2_read_rx_gain(struct mt76x02_dev *dev)
262 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
263 int channel = chan->hw_value;
264 s8 lna_5g[3], lna_2g;
268 if (chan->band == NL80211_BAND_2GHZ)
269 val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN) >> 8;
271 val = mt76x2_get_5g_rx_gain(dev, channel);
273 mt76x2_set_rx_gain_group(dev, val);
275 mt76x02_get_rx_gain(dev, chan->band, &val, &lna_2g, lna_5g);
276 mt76x2_set_rssi_offset(dev, 0, val);
277 mt76x2_set_rssi_offset(dev, 1, val >> 8);
279 dev->cal.rx.mcu_gain = (lna_2g & 0xff);
280 dev->cal.rx.mcu_gain |= (lna_5g[0] & 0xff) << 8;
281 dev->cal.rx.mcu_gain |= (lna_5g[1] & 0xff) << 16;
282 dev->cal.rx.mcu_gain |= (lna_5g[2] & 0xff) << 24;
284 lna = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);
285 dev->cal.rx.lna_gain = mt76x02_sign_extend(lna, 8);
287 EXPORT_SYMBOL_GPL(mt76x2_read_rx_gain);
289 void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76_rate_power *t,
290 struct ieee80211_channel *chan)
295 is_5ghz = chan->band == NL80211_BAND_5GHZ;
297 memset(t, 0, sizeof(*t));
299 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_CCK);
300 t->cck[0] = t->cck[1] = mt76x02_rate_power_val(val);
301 t->cck[2] = t->cck[3] = mt76x02_rate_power_val(val >> 8);
304 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_6M);
306 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_6M);
307 t->ofdm[0] = t->ofdm[1] = mt76x02_rate_power_val(val);
308 t->ofdm[2] = t->ofdm[3] = mt76x02_rate_power_val(val >> 8);
311 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_24M);
313 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_24M);
314 t->ofdm[4] = t->ofdm[5] = mt76x02_rate_power_val(val);
315 t->ofdm[6] = t->ofdm[7] = mt76x02_rate_power_val(val >> 8);
317 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS0);
318 t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val);
319 t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8);
321 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS4);
322 t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val);
323 t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8);
325 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS8);
326 t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val);
327 t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8);
329 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS12);
330 t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val);
331 t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8);
333 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS0);
334 t->vht[0] = t->vht[1] = mt76x02_rate_power_val(val);
335 t->vht[2] = t->vht[3] = mt76x02_rate_power_val(val >> 8);
337 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS4);
338 t->vht[4] = t->vht[5] = mt76x02_rate_power_val(val);
339 t->vht[6] = t->vht[7] = mt76x02_rate_power_val(val >> 8);
341 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS8);
344 t->vht[8] = t->vht[9] = mt76x02_rate_power_val(val >> 8);
346 memcpy(t->stbc, t->ht, sizeof(t->stbc[0]) * 8);
347 t->stbc[8] = t->vht[8];
348 t->stbc[9] = t->vht[9];
350 EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
353 mt76x2_get_power_info_2g(struct mt76x02_dev *dev,
354 struct mt76x2_tx_power_info *t,
355 struct ieee80211_channel *chan,
356 int chain, int offset)
358 int channel = chan->hw_value;
365 else if (channel < 11)
370 mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
372 t->chain[chain].tssi_slope = data[0];
373 t->chain[chain].tssi_offset = data[1];
374 t->chain[chain].target_power = data[2];
375 t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
377 val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
378 t->target_power = val >> 8;
382 mt76x2_get_power_info_5g(struct mt76x02_dev *dev,
383 struct mt76x2_tx_power_info *t,
384 struct ieee80211_channel *chan,
385 int chain, int offset)
387 int channel = chan->hw_value;
388 enum mt76x2_cal_channel_group group;
393 group = mt76x2_get_cal_channel_group(channel);
394 offset += group * MT_TX_POWER_GROUP_SIZE_5G;
398 else if (channel >= 184)
400 else if (channel < 44)
402 else if (channel < 52)
404 else if (channel < 58)
406 else if (channel < 98)
408 else if (channel < 106)
410 else if (channel < 116)
412 else if (channel < 130)
414 else if (channel < 149)
416 else if (channel < 157)
421 mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
423 t->chain[chain].tssi_slope = data[0];
424 t->chain[chain].tssi_offset = data[1];
425 t->chain[chain].target_power = data[2];
426 t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
428 val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN);
429 t->target_power = val & 0xff;
432 void mt76x2_get_power_info(struct mt76x02_dev *dev,
433 struct mt76x2_tx_power_info *t,
434 struct ieee80211_channel *chan)
438 memset(t, 0, sizeof(*t));
440 bw40 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
441 bw80 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW80);
443 if (chan->band == NL80211_BAND_5GHZ) {
445 mt76x2_get_power_info_5g(dev, t, chan, 0,
446 MT_EE_TX_POWER_0_START_5G);
447 mt76x2_get_power_info_5g(dev, t, chan, 1,
448 MT_EE_TX_POWER_1_START_5G);
450 mt76x2_get_power_info_2g(dev, t, chan, 0,
451 MT_EE_TX_POWER_0_START_2G);
452 mt76x2_get_power_info_2g(dev, t, chan, 1,
453 MT_EE_TX_POWER_1_START_2G);
456 if (mt76x2_tssi_enabled(dev) ||
457 !mt76x02_field_valid(t->target_power))
458 t->target_power = t->chain[0].target_power;
460 t->delta_bw40 = mt76x02_rate_power_val(bw40);
461 t->delta_bw80 = mt76x02_rate_power_val(bw80);
463 EXPORT_SYMBOL_GPL(mt76x2_get_power_info);
465 int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t)
467 enum nl80211_band band = dev->mt76.chandef.chan->band;
471 memset(t, 0, sizeof(*t));
473 if (!mt76x2_temp_tx_alc_enabled(dev))
476 if (!mt76x02_ext_pa_enabled(dev, band))
479 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G) >> 8;
480 t->temp_25_ref = val & 0x7f;
481 if (band == NL80211_BAND_5GHZ) {
482 slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_5G);
483 bounds = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G);
485 slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_2G);
486 bounds = mt76x02_eeprom_get(dev,
487 MT_EE_TX_POWER_DELTA_BW80) >> 8;
490 t->high_slope = slope & 0xff;
491 t->low_slope = slope >> 8;
492 t->lower_bound = 0 - (bounds & 0xf);
493 t->upper_bound = (bounds >> 4) & 0xf;
497 EXPORT_SYMBOL_GPL(mt76x2_get_temp_comp);
499 int mt76x2_eeprom_init(struct mt76x02_dev *dev)
503 ret = mt76x2_eeprom_load(dev);
507 mt76x02_eeprom_parse_hw_cap(dev);
508 mt76x2_eeprom_get_macaddr(dev);
509 mt76_eeprom_override(&dev->mt76);
510 dev->mt76.macaddr[0] &= ~BIT(1);
514 EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
516 MODULE_LICENSE("Dual BSD/GPL");