2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #include <linux/etherdevice.h>
22 #include <linux/netdevice.h>
23 #include <linux/wireless.h>
24 #include <net/cfg80211.h>
25 #include <linux/timex.h>
26 #include <linux/types.h>
27 #include <linux/irqreturn.h>
29 #include "wil_platform.h"
32 extern bool no_fw_recovery;
33 extern unsigned int mtu_max;
34 extern unsigned short rx_ring_overflow_thrsh;
36 extern bool rx_align_2;
37 extern bool rx_large_buf;
39 extern bool disable_ap_sme;
41 extern bool drop_if_ring_full;
42 extern uint max_assoc_sta;
48 #define WIL_NAME "wil6210"
50 #define WIL_FW_NAME_DEFAULT "/*(DEBLOBBED)*/"
51 #define WIL_FW_NAME_FTM_DEFAULT "/*(DEBLOBBED)*/"
53 #define WIL_FW_NAME_SPARROW_PLUS "/*(DEBLOBBED)*/"
54 #define WIL_FW_NAME_FTM_SPARROW_PLUS "/*(DEBLOBBED)*/"
56 #define WIL_FW_NAME_TALYN "/*(DEBLOBBED)*/"
57 #define WIL_FW_NAME_FTM_TALYN "/*(DEBLOBBED)*/"
58 #define WIL_BRD_NAME_TALYN "wil6436.brd"
60 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
62 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
63 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
65 #define WIL_NUM_LATENCY_BINS 200
67 /* maximum number of virtual interfaces the driver supports
68 * (including the main interface)
70 #define WIL_MAX_VIFS 4
73 * extract bits [@b0:@b1] (inclusive) from the value @x
74 * it should be @b0 <= @b1, or result is incorrect
76 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
78 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
81 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL)
82 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL)
84 #define WIL_TX_Q_LEN_DEFAULT (4000)
85 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
86 #define WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT (11)
87 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
88 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
89 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */
90 /* limit ring size in range [32..32k] */
91 #define WIL_RING_SIZE_ORDER_MIN (5)
92 #define WIL_RING_SIZE_ORDER_MAX (15)
93 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
94 #define WIL6210_MAX_CID (20) /* max number of stations */
95 #define WIL6210_RX_DESC_MAX_CID (8) /* HW limit */
96 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
97 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
98 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
99 #define WIL_MAX_AMPDU_SIZE_128 (128 * 1024) /* FW/HW limit */
100 #define WIL_MAX_AGG_WSIZE_64 (64) /* FW/HW limit */
101 #define WIL6210_MAX_STATUS_RINGS (8)
102 #define WIL_WMI_CALL_GENERAL_TO_MS 100
104 /* Hardware offload block adds the following:
105 * 26 bytes - 3-address QoS data header
106 * 8 bytes - IV + EIV (for GCMP)
108 * 16 bytes - MIC (for GCMP)
111 #define WIL_MAX_MPDU_OVERHEAD (62)
113 struct wil_suspend_count_stats {
114 unsigned long successful_suspends;
115 unsigned long successful_resumes;
116 unsigned long failed_suspends;
117 unsigned long failed_resumes;
120 struct wil_suspend_stats {
121 struct wil_suspend_count_stats r_off;
122 struct wil_suspend_count_stats r_on;
123 unsigned long rejected_by_device; /* only radio on */
124 unsigned long rejected_by_host;
127 /* Calculate MAC buffer size for the firmware. It includes all overhead,
128 * as it will go over the air, and need to be 8 byte aligned
130 static inline u32 wil_mtu2macbuf(u32 mtu)
132 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8);
135 /* MTU for Ethernet need to take into account 8-byte SNAP header
136 * to be added when encapsulating Ethernet frame into 802.11
138 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
139 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
140 #define WIL6210_ITR_TRSH_MAX (5000000)
141 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
142 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
143 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
144 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
145 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
146 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
147 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
148 #define WIL6210_DISCONNECT_TO_MS (2000)
149 #define WIL6210_RX_HIGH_TRSH_INIT (0)
150 #define WIL6210_RX_HIGH_TRSH_DEFAULT \
151 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
152 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see
153 * 802.11REVmc/D5.0, section 9.4.1.8)
155 /* Hardware definitions begin */
159 * RGF File | Host addr | FW addr
161 * user_rgf | 0x000000 | 0x880000
162 * dma_rgf | 0x001000 | 0x881000
163 * pcie_rgf | 0x002000 | 0x882000
167 /* Where various structures placed in host address space */
168 #define WIL6210_FW_HOST_OFF (0x880000UL)
170 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
173 * Interrupt control registers block
175 * each interrupt controlled by the same bit in all registers
178 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
179 u32 ICR; /* Cause, W1C/COR depending on ICC */
180 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
181 u32 ICS; /* Cause Set, WO */
182 u32 IMV; /* Mask, RW+S/C */
183 u32 IMS; /* Mask Set, write 1 to set */
184 u32 IMC; /* Mask Clear, write 1 to clear */
187 /* registers - FW addresses */
188 #define RGF_USER_USAGE_1 (0x880004)
189 #define RGF_USER_USAGE_2 (0x880008)
190 #define RGF_USER_USAGE_6 (0x880018)
191 #define BIT_USER_OOB_MODE BIT(31)
192 #define BIT_USER_OOB_R2_MODE BIT(30)
193 #define RGF_USER_USAGE_8 (0x880020)
194 #define BIT_USER_PREVENT_DEEP_SLEEP BIT(0)
195 #define BIT_USER_SUPPORT_T_POWER_ON_0 BIT(1)
196 #define BIT_USER_EXT_CLK BIT(2)
197 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
198 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
199 #define RGF_USER_USER_CPU_0 (0x8801e0)
200 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
201 #define RGF_USER_CPU_PC (0x8801e8)
202 #define RGF_USER_MAC_CPU_0 (0x8801fc)
203 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
204 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
205 #define RGF_USER_BL (0x880A3C) /* Boot Loader */
206 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
207 #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result
210 #define CALIB_RESULT_SIGNATURE (0x11)
211 #define RGF_USER_CLKS_CTL_0 (0x880abc)
212 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
213 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
214 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
215 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
216 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
217 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
218 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
219 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
220 #define BIT_CAR_PERST_RST BIT(7)
221 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
222 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
223 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
224 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
225 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
226 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
227 #define RGF_USER_OTP_HW_RD_MACHINE_1 (0x880ce0)
228 #define BIT_OTP_SIGNATURE_ERR_TALYN_MB BIT(0)
229 #define BIT_OTP_HW_SECTION_DONE_TALYN_MB BIT(2)
230 #define BIT_NO_FLASH_INDICATION BIT(8)
231 #define RGF_USER_XPM_IFC_RD_TIME1 (0x880cec)
232 #define RGF_USER_XPM_IFC_RD_TIME2 (0x880cf0)
233 #define RGF_USER_XPM_IFC_RD_TIME3 (0x880cf4)
234 #define RGF_USER_XPM_IFC_RD_TIME4 (0x880cf8)
235 #define RGF_USER_XPM_IFC_RD_TIME5 (0x880cfc)
236 #define RGF_USER_XPM_IFC_RD_TIME6 (0x880d00)
237 #define RGF_USER_XPM_IFC_RD_TIME7 (0x880d04)
238 #define RGF_USER_XPM_IFC_RD_TIME8 (0x880d08)
239 #define RGF_USER_XPM_IFC_RD_TIME9 (0x880d0c)
240 #define RGF_USER_XPM_IFC_RD_TIME10 (0x880d10)
241 #define RGF_USER_XPM_RD_DOUT_SAMPLE_TIME (0x880d64)
243 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
244 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
245 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
246 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
247 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
248 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
249 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
250 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
251 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
252 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27)
253 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
255 /* Legacy interrupt moderation control (before Sparrow v2)*/
256 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
257 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
258 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
259 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
260 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
261 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
262 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
263 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
265 /* Offload control (Sparrow B0+) */
266 #define RGF_DMA_OFUL_NID_0 (0x881cd4)
267 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0)
268 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1)
269 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2)
270 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3)
272 /* New (sparrow v2+) interrupt moderation control */
273 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40)
274 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34)
275 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38)
276 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c)
277 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0)
278 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1)
279 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2)
280 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3)
281 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4)
282 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5)
283 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6)
284 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60)
285 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64)
286 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68)
287 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0)
288 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
289 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2)
290 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3)
291 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
292 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50)
293 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44)
294 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48)
295 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c)
296 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0)
297 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1)
298 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2)
299 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3)
300 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4)
301 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5)
302 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6)
303 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54)
304 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58)
305 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c)
306 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0)
307 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
308 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2)
309 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3)
310 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
311 #define RGF_DMA_MISC_CTL (0x881d6c)
312 #define BIT_OFUL34_RDY_VALID_BUG_FIX_EN BIT(7)
314 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
315 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
316 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
317 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
318 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
319 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
321 #define RGF_HP_CTRL (0x88265c)
322 #define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */
323 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
325 /* MAC timer, usec, for packet lifetime */
326 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
328 #define RGF_CAF_ICR_TALYN_MB (0x8893d4) /* struct RGF_ICR */
329 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
330 #define RGF_CAF_OSC_CONTROL (0x88afa4)
331 #define BIT_CAF_OSC_XTAL_EN BIT(0)
332 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
333 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
335 #define RGF_OTP_QC_SECURED (0x8a0038)
336 #define BIT_BOOT_FROM_ROM BIT(31)
339 #define RGF_SCM_PTRS_SUBQ_RD_PTR (0x8b4000)
340 #define RGF_SCM_PTRS_COMPQ_RD_PTR (0x8b4100)
341 #define RGF_DMA_SCM_SUBQ_CONS (0x8b60ec)
342 #define RGF_DMA_SCM_COMPQ_PROD (0x8b616c)
344 #define RGF_INT_COUNT_ON_SPECIAL_EVT (0x8b62d8)
346 #define RGF_INT_CTRL_INT_GEN_CFG_0 (0x8bc000)
347 #define RGF_INT_CTRL_INT_GEN_CFG_1 (0x8bc004)
348 #define RGF_INT_GEN_TIME_UNIT_LIMIT (0x8bc0c8)
350 #define RGF_INT_GEN_CTRL (0x8bc0ec)
351 #define BIT_CONTROL_0 BIT(0)
353 /* eDMA status interrupts */
354 #define RGF_INT_GEN_RX_ICR (0x8bc0f4)
355 #define BIT_RX_STATUS_IRQ BIT(WIL_RX_STATUS_IRQ_IDX)
356 #define RGF_INT_GEN_TX_ICR (0x8bc110)
357 #define BIT_TX_STATUS_IRQ BIT(WIL_TX_STATUS_IRQ_IDX)
358 #define RGF_INT_CTRL_RX_INT_MASK (0x8bc12c)
359 #define RGF_INT_CTRL_TX_INT_MASK (0x8bc130)
361 #define RGF_INT_GEN_IDLE_TIME_LIMIT (0x8bc134)
363 #define USER_EXT_USER_PMU_3 (0x88d00c)
364 #define BIT_PMU_DEVICE_RDY BIT(0)
366 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
367 #define JTAG_DEV_ID_SPARROW (0x2632072f)
368 #define JTAG_DEV_ID_TALYN (0x7e0e1)
369 #define JTAG_DEV_ID_TALYN_MB (0x1007e0e1)
371 #define RGF_USER_REVISION_ID (0x88afe4)
372 #define RGF_USER_REVISION_ID_MASK (3)
373 #define REVISION_ID_SPARROW_B0 (0x0)
374 #define REVISION_ID_SPARROW_D0 (0x3)
376 #define RGF_OTP_MAC_TALYN_MB (0x8a0304)
377 #define RGF_OTP_OEM_MAC (0x8a0334)
378 #define RGF_OTP_MAC (0x8a0620)
381 #define RGF_USER_USER_CPU_0_TALYN_MB (0x8c0138)
382 #define RGF_USER_MAC_CPU_0_TALYN_MB (0x8c0154)
384 /* crash codes for FW/Ucode stored here */
387 #define SPARROW_RGF_FW_ASSERT_CODE (0x91f020)
388 #define SPARROW_RGF_UCODE_ASSERT_CODE (0x91f028)
389 #define TALYN_RGF_FW_ASSERT_CODE (0xa37020)
390 #define TALYN_RGF_UCODE_ASSERT_CODE (0xa37028)
394 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */
395 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */
396 HW_VER_TALYN, /* JTAG_DEV_ID_TALYN */
397 HW_VER_TALYN_MB /* JTAG_DEV_ID_TALYN_MB */
400 /* popular locations */
401 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD
402 #define HOST_MBOX HOSTADDR(RGF_MBOX)
403 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
405 /* ISR register bits */
406 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
407 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
408 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
410 #define WIL_DATA_COMPLETION_TO_MS 200
412 /* Hardware definitions end */
413 #define SPARROW_FW_MAPPING_TABLE_SIZE 10
414 #define TALYN_FW_MAPPING_TABLE_SIZE 13
415 #define TALYN_MB_FW_MAPPING_TABLE_SIZE 19
416 #define MAX_FW_MAPPING_TABLE_SIZE 19
418 /* Common representation of physical address in wil ring */
419 struct wil_ring_dma_addr {
425 u32 from; /* linker address - from, inclusive */
426 u32 to; /* linker address - to, exclusive */
427 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
428 const char *name; /* for debugfs */
429 bool fw; /* true if FW mapping, false if UCODE mapping */
430 bool crash_dump; /* true if should be dumped during crash dump */
433 /* array size should be in sync with actual definition in the wmi.c */
434 extern const struct fw_map sparrow_fw_mapping[SPARROW_FW_MAPPING_TABLE_SIZE];
435 extern const struct fw_map sparrow_d0_mac_rgf_ext;
436 extern const struct fw_map talyn_fw_mapping[TALYN_FW_MAPPING_TABLE_SIZE];
437 extern const struct fw_map talyn_mb_fw_mapping[TALYN_MB_FW_MAPPING_TABLE_SIZE];
438 extern struct fw_map fw_mapping[MAX_FW_MAPPING_TABLE_SIZE];
441 * mk_cidxtid - construct @cidxtid field
445 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
447 static inline u8 mk_cidxtid(u8 cid, u8 tid)
449 return ((tid & 0xf) << 4) | (cid & 0xf);
453 * parse_cidxtid - parse @cidxtid field
454 * @cid: store CID value here
455 * @tid: store TID value here
457 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
459 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
461 *cid = cidxtid & 0xf;
462 *tid = (cidxtid >> 4) & 0xf;
465 struct wil6210_mbox_ring {
467 u16 entry_size; /* max. size of mbox entry, incl. all headers */
473 struct wil6210_mbox_ring_desc {
478 /* at HOST_OFF_WIL6210_MBOX_CTL */
479 struct wil6210_mbox_ctl {
480 struct wil6210_mbox_ring tx;
481 struct wil6210_mbox_ring rx;
484 struct wil6210_mbox_hdr {
486 __le16 len; /* payload, bytes after this header */
492 #define WIL_MBOX_HDR_TYPE_WMI (0)
494 /* max. value for wil6210_mbox_hdr.len */
495 #define MAX_MBOXITEM_SIZE (240)
497 struct pending_wmi_event {
498 struct list_head list;
500 struct wil6210_mbox_hdr hdr;
501 struct wmi_cmd_hdr wmi;
506 enum { /* for wil_ctx.mapped_as */
507 wil_mapped_as_none = 0,
508 wil_mapped_as_single = 1,
509 wil_mapped_as_page = 2,
513 * struct wil_ctx - software context for ring descriptor
521 struct wil_desc_ring_rx_swtail { /* relevant for enhanced DMA only */
527 * A general ring structure, used for RX and TX.
528 * In legacy DMA it represents the vring,
529 * In enahnced DMA it represents the descriptor ring (vrings are handled by FW)
533 volatile union wil_ring_desc *va;
534 u16 size; /* number of wil_ring_desc elements */
537 u32 hwtail; /* write here to inform hw */
538 struct wil_ctx *ctx; /* ctx[size] - software context */
539 struct wil_desc_ring_rx_swtail edma_rx_swtail;
544 * Additional data for Rx ring.
545 * Used for enhanced DMA RX chaining.
547 struct wil_ring_rx_data {
548 /* the skb being assembled */
550 /* true if we are skipping a bad fragmented packet */
556 * Status ring structure, used for enhanced DMA completions for RX and TX.
558 struct wil_status_ring {
560 void *va; /* pointer to ring_[tr]x_status elements */
561 u16 size; /* number of status elements */
562 size_t elem_size; /* status element size in bytes */
564 u32 hwtail; /* write here to inform hw */
566 u8 desc_rdy_pol; /* Expected descriptor ready bit polarity */
567 struct wil_ring_rx_data rx_data;
568 u32 invalid_buff_id_cnt; /* relevant only for RX */
571 #define WIL_STA_TID_NUM (16)
572 #define WIL_MCS_MAX (15) /* Maximum MCS supported */
574 struct wil_net_stats {
575 unsigned long rx_packets;
576 unsigned long tx_packets;
577 unsigned long rx_bytes;
578 unsigned long tx_bytes;
579 unsigned long tx_errors;
580 u32 tx_latency_min_us;
581 u32 tx_latency_max_us;
582 u64 tx_latency_total_us;
583 unsigned long rx_dropped;
584 unsigned long rx_non_data_frame;
585 unsigned long rx_short_frame;
586 unsigned long rx_large_frame;
587 unsigned long rx_replay;
588 unsigned long rx_mic_error;
589 unsigned long rx_key_error; /* eDMA specific */
590 unsigned long rx_amsdu_error; /* eDMA specific */
591 unsigned long rx_csum_err;
593 u64 rx_per_mcs[WIL_MCS_MAX + 1];
594 u32 ft_roams; /* relevant in STA mode */
598 * struct tx_rx_ops - different TX/RX ops for legacy and enhanced
601 struct wil_txrx_ops {
602 void (*configure_interrupt_moderation)(struct wil6210_priv *wil);
604 int (*ring_init_tx)(struct wil6210_vif *vif, int ring_id,
605 int size, int cid, int tid);
606 void (*ring_fini_tx)(struct wil6210_priv *wil, struct wil_ring *ring);
607 int (*ring_init_bcast)(struct wil6210_vif *vif, int id, int size);
608 int (*tx_init)(struct wil6210_priv *wil);
609 void (*tx_fini)(struct wil6210_priv *wil);
610 int (*tx_desc_map)(union wil_tx_desc *desc, dma_addr_t pa,
611 u32 len, int ring_index);
612 void (*tx_desc_unmap)(struct device *dev,
613 union wil_tx_desc *desc,
614 struct wil_ctx *ctx);
615 int (*tx_ring_tso)(struct wil6210_priv *wil, struct wil6210_vif *vif,
616 struct wil_ring *ring, struct sk_buff *skb);
617 int (*tx_ring_modify)(struct wil6210_vif *vif, int ring_id,
619 irqreturn_t (*irq_tx)(int irq, void *cookie);
621 int (*rx_init)(struct wil6210_priv *wil, uint ring_order);
622 void (*rx_fini)(struct wil6210_priv *wil);
623 int (*wmi_addba_rx_resp)(struct wil6210_priv *wil, u8 mid, u8 cid,
624 u8 tid, u8 token, u16 status, bool amsdu,
625 u16 agg_wsize, u16 timeout);
626 void (*get_reorder_params)(struct wil6210_priv *wil,
627 struct sk_buff *skb, int *tid, int *cid,
628 int *mid, u16 *seq, int *mcast, int *retry);
629 void (*get_netif_rx_params)(struct sk_buff *skb,
630 int *cid, int *security);
631 int (*rx_crypto_check)(struct wil6210_priv *wil, struct sk_buff *skb);
632 int (*rx_error_check)(struct wil6210_priv *wil, struct sk_buff *skb,
633 struct wil_net_stats *stats);
634 bool (*is_rx_idle)(struct wil6210_priv *wil);
635 irqreturn_t (*irq_rx)(int irq, void *cookie);
639 * Additional data for Tx ring
641 struct wil_ring_tx_data {
644 cycles_t idle, last_idle, begin;
645 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */
648 bool addba_in_progress; /* if set, agg_xxx is for request in progress */
653 enum { /* for wil6210_priv.status */
654 wil_status_fwready = 0, /* FW operational */
656 wil_status_mbox_ready, /* MBOX structures ready */
657 wil_status_irqen, /* interrupts enabled - for debug */
658 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
659 wil_status_resetting, /* reset in progress */
660 wil_status_suspending, /* suspend in progress */
661 wil_status_suspended, /* suspend completed, device is suspended */
662 wil_status_resuming, /* resume in progress */
663 wil_status_last /* keep last */
669 * struct tid_ampdu_rx - TID aggregation information (Rx).
671 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
672 * @last_rx: jiffies of last rx activity
673 * @head_seq_num: head sequence number in reordering buffer.
674 * @stored_mpdu_num: number of MPDUs in reordering buffer
675 * @ssn: Starting Sequence Number expected to be aggregated.
676 * @buf_size: buffer size for incoming A-MPDUs
677 * @ssn_last_drop: SSN of the last dropped frame
678 * @total: total number of processed incoming frames
679 * @drop_dup: duplicate frames dropped for this reorder buffer
680 * @drop_old: old frames dropped for this reorder buffer
681 * @first_time: true when this buffer used 1-st time
682 * @mcast_last_seq: sequence number (SN) of last received multicast packet
683 * @drop_dup_mcast: duplicate multicast frames dropped for this reorder buffer
685 struct wil_tid_ampdu_rx {
686 struct sk_buff **reorder_buf;
687 unsigned long last_rx;
693 unsigned long long total; /* frames processed */
694 unsigned long long drop_dup;
695 unsigned long long drop_old;
696 bool first_time; /* is it 1-st time this buffer used? */
697 u16 mcast_last_seq; /* multicast dup detection */
698 unsigned long long drop_dup_mcast;
702 * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
704 * @pn: GCMP PN for the session
705 * @key_set: valid key present
707 struct wil_tid_crypto_rx_single {
708 u8 pn[IEEE80211_GCMP_PN_LEN];
712 struct wil_tid_crypto_rx {
713 struct wil_tid_crypto_rx_single key_id[4];
716 struct wil_p2p_info {
717 struct ieee80211_channel listen_chan;
718 u8 discovery_started;
720 struct wireless_dev *pending_listen_wdev;
721 unsigned int listen_duration;
722 struct timer_list discovery_timer; /* listen/search duration */
723 struct work_struct discovery_expired_work; /* listen/search expire */
724 struct work_struct delayed_listen_work; /* listen after scan done */
727 enum wil_sta_status {
729 wil_sta_conn_pending = 1,
730 wil_sta_connected = 2,
734 * struct wil_sta_info - data for peer
736 * Peer identified by its CID (connection ID)
737 * NIC performs beam forming for each peer;
738 * if no beam forming done, frame exchange is not
741 struct wil_sta_info {
744 enum wil_sta_status status;
745 struct wil_net_stats stats;
747 * 20 latency bins. 1st bin counts packets with latency
748 * of 0..tx_latency_res, last bin counts packets with latency
749 * of 19*tx_latency_res and above.
750 * tx_latency_res is configured from "tx_latency" debug-fs.
752 u64 *tx_latency_bins;
753 struct wmi_link_stats_basic fw_stats_basic;
755 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
756 spinlock_t tid_rx_lock; /* guarding tid_rx array */
757 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
758 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
759 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM];
760 struct wil_tid_crypto_rx group_crypto_rx;
761 u8 aid; /* 1-254; 0 if unknown/not reported */
765 fw_recovery_idle = 0,
766 fw_recovery_pending = 1,
767 fw_recovery_running = 2,
775 struct wil_probe_client_req {
776 struct list_head list;
782 /* alloc, free, and read operations must own the lock */
784 struct vring_tx_desc *pring_va;
786 struct desc_alloc_info *descriptors;
793 struct mutex lock; /* protect halp ref_cnt */
794 unsigned int ref_cnt;
795 struct completion comp;
799 struct wil_blob_wrapper {
800 struct wil6210_priv *wil;
801 struct debugfs_blob_wrapper blob;
804 #define WIL_LED_MAX_ID (2)
805 #define WIL_LED_INVALID_ID (0xF)
806 #define WIL_LED_BLINK_ON_SLOW_MS (300)
807 #define WIL_LED_BLINK_OFF_SLOW_MS (300)
808 #define WIL_LED_BLINK_ON_MED_MS (200)
809 #define WIL_LED_BLINK_OFF_MED_MS (200)
810 #define WIL_LED_BLINK_ON_FAST_MS (100)
811 #define WIL_LED_BLINK_OFF_FAST_MS (100)
813 WIL_LED_TIME_SLOW = 0,
819 struct blink_on_off_time {
824 struct wil_debugfs_iomem_data {
826 struct wil6210_priv *wil;
829 struct wil_debugfs_data {
830 struct wil_debugfs_iomem_data *data_arr;
831 int iomem_data_count;
834 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST];
836 extern u8 led_polarity;
838 enum wil6210_vif_status {
839 wil_vif_fwconnecting,
842 wil_vif_status_last /* keep last */
846 struct wireless_dev wdev;
847 struct net_device *ndev;
848 struct wil6210_priv *wil;
850 DECLARE_BITMAP(status, wil_vif_status_last);
851 u32 privacy; /* secure connection? */
852 u16 channel; /* relevant in AP mode */
853 u8 hidden_ssid; /* relevant in AP mode */
854 u32 ap_isolate; /* no intra-BSS communication */
857 u8 *proberesp, *proberesp_ies, *assocresp_ies;
858 size_t proberesp_len, proberesp_ies_len, assocresp_ies_len;
859 u8 ssid[IEEE80211_MAX_SSID_LEN];
862 u8 gtk[WMI_MAX_KEY_LEN];
865 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */
866 int locally_generated_disc; /* relevant in STA mode */
867 struct timer_list connect_timer;
868 struct work_struct disconnect_worker;
870 struct cfg80211_scan_request *scan_request;
871 struct timer_list scan_timer; /* detect scan timeout */
872 struct wil_p2p_info p2p;
874 struct list_head probe_client_pending;
875 struct mutex probe_client_mutex; /* protect @probe_client_pending */
876 struct work_struct probe_client_worker;
877 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */
878 bool fw_stats_ready; /* per-cid statistics are ready inside sta_info */
879 u64 fw_stats_tsf; /* measurement timestamp */
883 * RX buffer allocated for enhanced DMA RX descriptors
887 struct list_head list;
892 * During Rx completion processing, the driver extracts a buffer ID which
893 * is used as an index to the rx_buff_mgmt.buff_arr array and then the SKB
894 * is given to the network stack and the buffer is moved from the 'active'
895 * list to the 'free' list.
896 * During Rx refill, SKBs are attached to free buffers and moved to the
899 struct wil_rx_buff_mgmt {
900 struct wil_rx_buff *buff_arr;
901 size_t size; /* number of items in buff_arr */
902 struct list_head active;
903 struct list_head free;
904 unsigned long free_list_empty_cnt; /* statistics */
907 struct wil_fw_stats_global {
909 u64 tsf; /* measurement timestamp */
910 struct wmi_link_stats_global stats;
913 struct wil_brd_info {
918 struct wil6210_priv {
919 struct pci_dev *pdev;
922 struct net_device *main_ndev;
925 DECLARE_BITMAP(status, wil_status_last);
926 u8 fw_version[ETHTOOL_FWVERS_LEN];
930 const char *wil_fw_name;
932 u32 num_of_brd_entries;
933 struct wil_brd_info *brd_info;
934 DECLARE_BITMAP(hw_capa, hw_capa_last);
935 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX);
936 DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX);
937 u32 recovery_count; /* num of FW recovery attempts in a short time */
938 u32 recovery_state; /* FW recovery state machine */
939 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
940 wait_queue_head_t wq; /* for all wait_event() use */
941 u8 max_vifs; /* maximum number of interfaces, including main */
942 struct wil6210_vif *vifs[WIL_MAX_VIFS];
943 struct mutex vif_mutex; /* protects access to VIF entries */
944 atomic_t connected_vifs;
945 u32 max_assoc_sta; /* max sta's supported by the driver and the FW */
948 struct cfg80211_chan_def monitor_chandef;
951 /* interrupt moderation */
952 u32 tx_max_burst_duration;
953 u32 tx_interframe_timeout;
954 u32 rx_max_burst_duration;
955 u32 rx_interframe_timeout;
956 /* cached ISR registers */
958 /* mailbox related */
959 struct mutex wmi_mutex;
960 struct wil6210_mbox_ctl mbox_ctl;
961 struct completion wmi_ready;
962 struct completion wmi_call;
964 u16 reply_id; /**< wait for this WMI event */
968 struct workqueue_struct *wmi_wq; /* for deferred calls */
969 struct work_struct wmi_event_worker;
970 struct workqueue_struct *wq_service;
971 struct work_struct fw_error_worker; /* for FW error recovery */
972 struct list_head pending_wmi_ev;
974 * protect pending_wmi_ev
975 * - fill in IRQ from wil6210_irq_misc,
976 * - consumed in thread by wmi_event_worker
978 spinlock_t wmi_ev_lock;
979 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */
980 struct napi_struct napi_rx;
981 struct napi_struct napi_tx;
982 struct net_device napi_ndev; /* dummy net_device serving all VIFs */
985 struct wil_ring ring_rx;
986 unsigned int rx_buf_len;
987 struct wil_ring ring_tx[WIL6210_MAX_TX_RINGS];
988 struct wil_ring_tx_data ring_tx_data[WIL6210_MAX_TX_RINGS];
989 struct wil_status_ring srings[WIL6210_MAX_STATUS_RINGS];
990 u8 num_rx_status_rings;
992 u8 ring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
993 struct wil_sta_info sta[WIL6210_MAX_CID];
994 u32 ring_idle_trsh; /* HW fetches up to 16 descriptors at once */
995 u32 dma_addr_size; /* indicates dma addr size */
996 struct wil_rx_buff_mgmt rx_buff_mgmt;
997 bool use_enhanced_dma_hw;
998 struct wil_txrx_ops txrx_ops;
1000 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
1001 /* for synchronizing device memory access while reset or suspend */
1002 struct rw_semaphore mem_lock;
1004 atomic_t isr_count_rx, isr_count_tx;
1006 struct dentry *debug;
1007 struct wil_blob_wrapper blobs[MAX_FW_MAPPING_TABLE_SIZE];
1011 struct wil_suspend_stats suspend_stats;
1012 struct wil_debugfs_data dbg_data;
1013 bool tx_latency; /* collect TX latency measurements */
1014 size_t tx_latency_res; /* bin resolution in usec */
1016 void *platform_handle;
1017 struct wil_platform_ops platform_ops;
1018 bool keep_radio_on_during_sleep;
1024 /* P2P_DEVICE vif */
1025 struct wireless_dev *p2p_wdev;
1026 struct wireless_dev *radio_wdev;
1028 /* High Access Latency Policy voting */
1029 struct wil_halp halp;
1031 enum wmi_ps_profile_type ps_profile;
1033 int fw_calib_result;
1035 struct notifier_block pm_notify;
1037 bool suspend_resp_rcvd;
1038 bool suspend_resp_comp;
1039 u32 bus_request_kbps;
1040 u32 bus_request_kbps_pre_suspend;
1042 u32 rgf_fw_assert_code_addr;
1043 u32 rgf_ucode_assert_code_addr;
1046 /* relevant only for eDMA */
1047 bool use_compressed_rx_status;
1048 u32 rx_status_ring_order;
1049 u32 tx_status_ring_order;
1050 u32 rx_buff_id_count;
1052 bool use_rx_hw_reordering;
1056 struct wil_fw_stats_global fw_stats_global;
1062 #define wil_to_wiphy(i) (i->wiphy)
1063 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
1064 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
1065 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
1066 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
1067 #define ndev_to_vif(n) (struct wil6210_vif *)(netdev_priv(n))
1068 #define vif_to_wil(v) (v->wil)
1069 #define vif_to_ndev(v) (v->ndev)
1070 #define vif_to_wdev(v) (&v->wdev)
1071 #define GET_MAX_VIFS(wil) min_t(int, (wil)->max_vifs, WIL_MAX_VIFS)
1073 static inline struct wil6210_vif *wdev_to_vif(struct wil6210_priv *wil,
1074 struct wireless_dev *wdev)
1076 /* main interface is shared with P2P device */
1077 if (wdev == wil->p2p_wdev)
1078 return ndev_to_vif(wil->main_ndev);
1080 return container_of(wdev, struct wil6210_vif, wdev);
1083 static inline struct wireless_dev *
1084 vif_to_radio_wdev(struct wil6210_priv *wil, struct wil6210_vif *vif)
1086 /* main interface is shared with P2P device */
1088 return vif_to_wdev(vif);
1090 return wil->radio_wdev;
1094 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
1096 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...);
1098 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
1100 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...);
1102 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...);
1103 #define wil_dbg(wil, fmt, arg...) do { \
1104 netdev_dbg(wil->main_ndev, fmt, ##arg); \
1105 wil_dbg_trace(wil, fmt, ##arg); \
1108 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
1109 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
1110 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
1111 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
1112 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
1113 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg)
1114 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg)
1115 #define wil_err_ratelimited(wil, fmt, arg...) \
1116 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg)
1118 /* target operations */
1120 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg)
1122 return readl(wil->csr + HOSTADDR(reg));
1125 /* register write. wmb() to make sure it is completed */
1126 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val)
1128 writel(val, wil->csr + HOSTADDR(reg));
1129 wmb(); /* wait for write to propagate to the HW */
1132 /* register set = read, OR, write */
1133 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val)
1135 wil_w(wil, reg, wil_r(wil, reg) | val);
1138 /* register clear = read, AND with inverted, write */
1139 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val)
1141 wil_w(wil, reg, wil_r(wil, reg) & ~val);
1145 * wil_cid_valid - check cid is valid
1147 static inline bool wil_cid_valid(struct wil6210_priv *wil, u8 cid)
1149 return (cid >= 0 && cid < wil->max_assoc_sta);
1152 void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len);
1154 #if defined(CONFIG_DYNAMIC_DEBUG)
1155 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
1156 groupsize, buf, len, ascii) \
1157 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
1158 prefix_type, rowsize, \
1159 groupsize, buf, len, ascii)
1161 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
1162 groupsize, buf, len, ascii) \
1163 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
1164 prefix_type, rowsize, \
1165 groupsize, buf, len, ascii)
1167 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \
1168 groupsize, buf, len, ascii) \
1169 print_hex_dump_debug("DBG[MISC]" prefix_str,\
1170 prefix_type, rowsize, \
1171 groupsize, buf, len, ascii)
1172 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
1174 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
1175 int groupsize, const void *buf, size_t len, bool ascii)
1180 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
1181 int groupsize, const void *buf, size_t len, bool ascii)
1186 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize,
1187 int groupsize, const void *buf, size_t len, bool ascii)
1190 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
1192 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
1194 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
1196 int wil_mem_access_lock(struct wil6210_priv *wil);
1197 void wil_mem_access_unlock(struct wil6210_priv *wil);
1199 struct wil6210_vif *
1200 wil_vif_alloc(struct wil6210_priv *wil, const char *name,
1201 unsigned char name_assign_type, enum nl80211_iftype iftype);
1202 void wil_vif_free(struct wil6210_vif *vif);
1203 void *wil_if_alloc(struct device *dev);
1204 bool wil_has_other_active_ifaces(struct wil6210_priv *wil,
1205 struct net_device *ndev, bool up, bool ok);
1206 bool wil_has_active_ifaces(struct wil6210_priv *wil, bool up, bool ok);
1207 void wil_if_free(struct wil6210_priv *wil);
1208 int wil_vif_add(struct wil6210_priv *wil, struct wil6210_vif *vif);
1209 int wil_if_add(struct wil6210_priv *wil);
1210 void wil_vif_remove(struct wil6210_priv *wil, u8 mid);
1211 void wil_if_remove(struct wil6210_priv *wil);
1212 int wil_priv_init(struct wil6210_priv *wil);
1213 void wil_priv_deinit(struct wil6210_priv *wil);
1214 int wil_ps_update(struct wil6210_priv *wil,
1215 enum wmi_ps_profile_type ps_profile);
1216 int wil_reset(struct wil6210_priv *wil, bool no_fw);
1217 void wil_fw_error_recovery(struct wil6210_priv *wil);
1218 void wil_set_recovery_state(struct wil6210_priv *wil, int state);
1219 bool wil_is_recovery_blocked(struct wil6210_priv *wil);
1220 int wil_up(struct wil6210_priv *wil);
1221 int __wil_up(struct wil6210_priv *wil);
1222 int wil_down(struct wil6210_priv *wil);
1223 int __wil_down(struct wil6210_priv *wil);
1224 void wil_refresh_fw_capabilities(struct wil6210_priv *wil);
1225 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
1226 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac);
1227 void wil_set_ethtoolops(struct net_device *ndev);
1229 struct fw_map *wil_find_fw_mapping(const char *section);
1230 void __iomem *wmi_buffer_block(struct wil6210_priv *wil, __le32 ptr, u32 size);
1231 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
1232 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
1233 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
1234 struct wil6210_mbox_hdr *hdr);
1235 int wmi_send(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len);
1236 void wmi_recv_cmd(struct wil6210_priv *wil);
1237 int wmi_call(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len,
1238 u16 reply_id, void *reply, u16 reply_size, int to_msec);
1239 void wmi_event_worker(struct work_struct *work);
1240 void wmi_event_flush(struct wil6210_priv *wil);
1241 int wmi_set_ssid(struct wil6210_vif *vif, u8 ssid_len, const void *ssid);
1242 int wmi_get_ssid(struct wil6210_vif *vif, u8 *ssid_len, void *ssid);
1243 int wmi_set_channel(struct wil6210_priv *wil, int channel);
1244 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
1245 int wmi_del_cipher_key(struct wil6210_vif *vif, u8 key_index,
1246 const void *mac_addr, int key_usage);
1247 int wmi_add_cipher_key(struct wil6210_vif *vif, u8 key_index,
1248 const void *mac_addr, int key_len, const void *key,
1250 int wmi_echo(struct wil6210_priv *wil);
1251 int wmi_set_ie(struct wil6210_vif *vif, u8 type, u16 ie_len, const void *ie);
1252 int wmi_rx_chain_add(struct wil6210_priv *wil, struct wil_ring *vring);
1253 int wmi_update_ft_ies(struct wil6210_vif *vif, u16 ie_len, const void *ie);
1254 int wmi_rxon(struct wil6210_priv *wil, bool on);
1255 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
1256 int wmi_get_all_temperatures(struct wil6210_priv *wil,
1257 struct wmi_temp_sense_all_done_event
1259 int wmi_disconnect_sta(struct wil6210_vif *vif, const u8 *mac, u16 reason,
1261 int wmi_addba(struct wil6210_priv *wil, u8 mid,
1262 u8 ringid, u8 size, u16 timeout);
1263 int wmi_delba_tx(struct wil6210_priv *wil, u8 mid, u8 ringid, u16 reason);
1264 int wmi_delba_rx(struct wil6210_priv *wil, u8 mid, u8 cid, u8 tid, u16 reason);
1265 int wmi_addba_rx_resp(struct wil6210_priv *wil,
1266 u8 mid, u8 cid, u8 tid, u8 token,
1267 u16 status, bool amsdu, u16 agg_wsize, u16 timeout);
1268 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil,
1269 enum wmi_ps_profile_type ps_profile);
1270 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short);
1271 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short);
1272 int wmi_new_sta(struct wil6210_vif *vif, const u8 *mac, u8 aid);
1273 int wmi_port_allocate(struct wil6210_priv *wil, u8 mid,
1274 const u8 *mac, enum nl80211_iftype iftype);
1275 int wmi_port_delete(struct wil6210_priv *wil, u8 mid);
1276 int wmi_link_stats_cfg(struct wil6210_vif *vif, u32 type, u8 cid, u32 interval);
1277 int wil_addba_rx_request(struct wil6210_priv *wil, u8 mid, u8 cid, u8 tid,
1278 u8 dialog_token, __le16 ba_param_set,
1279 __le16 ba_timeout, __le16 ba_seq_ctrl);
1280 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize);
1282 void wil6210_clear_irq(struct wil6210_priv *wil);
1283 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
1284 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
1285 void wil_mask_irq(struct wil6210_priv *wil);
1286 void wil_unmask_irq(struct wil6210_priv *wil);
1287 void wil_configure_interrupt_moderation(struct wil6210_priv *wil);
1288 void wil_disable_irq(struct wil6210_priv *wil);
1289 void wil_enable_irq(struct wil6210_priv *wil);
1290 void wil6210_mask_halp(struct wil6210_priv *wil);
1293 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request);
1294 int wil_p2p_search(struct wil6210_vif *vif,
1295 struct cfg80211_scan_request *request);
1296 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev,
1297 unsigned int duration, struct ieee80211_channel *chan,
1299 u8 wil_p2p_stop_discovery(struct wil6210_vif *vif);
1300 int wil_p2p_cancel_listen(struct wil6210_vif *vif, u64 cookie);
1301 void wil_p2p_listen_expired(struct work_struct *work);
1302 void wil_p2p_search_expired(struct work_struct *work);
1303 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil);
1304 void wil_p2p_delayed_listen_work(struct work_struct *work);
1307 int wmi_p2p_cfg(struct wil6210_vif *vif, int channel, int bi);
1308 int wmi_start_listen(struct wil6210_vif *vif);
1309 int wmi_start_search(struct wil6210_vif *vif);
1310 int wmi_stop_discovery(struct wil6210_vif *vif);
1312 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
1313 struct cfg80211_mgmt_tx_params *params,
1315 void wil_cfg80211_ap_recovery(struct wil6210_priv *wil);
1316 int wil_cfg80211_iface_combinations_from_fw(
1317 struct wil6210_priv *wil,
1318 const struct wil_fw_record_concurrency *conc);
1319 int wil_vif_prepare_stop(struct wil6210_vif *vif);
1321 #if defined(CONFIG_WIL6210_DEBUGFS)
1322 int wil6210_debugfs_init(struct wil6210_priv *wil);
1323 void wil6210_debugfs_remove(struct wil6210_priv *wil);
1325 static inline int wil6210_debugfs_init(struct wil6210_priv *wil) { return 0; }
1326 static inline void wil6210_debugfs_remove(struct wil6210_priv *wil) {}
1329 int wil_cid_fill_sinfo(struct wil6210_vif *vif, int cid,
1330 struct station_info *sinfo);
1332 struct wil6210_priv *wil_cfg80211_init(struct device *dev);
1333 void wil_cfg80211_deinit(struct wil6210_priv *wil);
1334 void wil_p2p_wdev_free(struct wil6210_priv *wil);
1336 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
1337 int wmi_pcp_start(struct wil6210_vif *vif, int bi, u8 wmi_nettype, u8 chan,
1338 u8 hidden_ssid, u8 is_go);
1339 int wmi_pcp_stop(struct wil6210_vif *vif);
1340 int wmi_led_cfg(struct wil6210_priv *wil, bool enable);
1341 int wmi_abort_scan(struct wil6210_vif *vif);
1342 void wil_abort_scan(struct wil6210_vif *vif, bool sync);
1343 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync);
1344 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps);
1345 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
1347 void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid,
1349 void wil_probe_client_flush(struct wil6210_vif *vif);
1350 void wil_probe_client_worker(struct work_struct *work);
1351 void wil_disconnect_worker(struct work_struct *work);
1353 void wil_init_txrx_ops(struct wil6210_priv *wil);
1356 int wil_ring_init_tx(struct wil6210_vif *vif, int cid);
1357 int wil_vring_init_bcast(struct wil6210_vif *vif, int id, int size);
1358 int wil_bcast_init(struct wil6210_vif *vif);
1359 void wil_bcast_fini(struct wil6210_vif *vif);
1360 void wil_bcast_fini_all(struct wil6210_priv *wil);
1362 void wil_update_net_queues(struct wil6210_priv *wil, struct wil6210_vif *vif,
1363 struct wil_ring *ring, bool should_stop);
1364 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct wil6210_vif *vif,
1365 struct wil_ring *ring, bool check_stop);
1366 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
1367 int wil_tx_complete(struct wil6210_vif *vif, int ringid);
1368 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
1369 void wil6210_unmask_irq_tx_edma(struct wil6210_priv *wil);
1372 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
1373 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
1374 void wil6210_unmask_irq_rx_edma(struct wil6210_priv *wil);
1375 void wil_set_crypto_rx(u8 key_index, enum wmi_key_usage key_usage,
1376 struct wil_sta_info *cs,
1377 struct key_params *params);
1379 int wil_iftype_nl2wmi(enum nl80211_iftype type);
1381 int wil_request_firmware(struct wil6210_priv *wil, const char *name,
1383 int wil_request_board(struct wil6210_priv *wil, const char *name);
1384 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name);
1386 void wil_pm_runtime_allow(struct wil6210_priv *wil);
1387 void wil_pm_runtime_forbid(struct wil6210_priv *wil);
1388 int wil_pm_runtime_get(struct wil6210_priv *wil);
1389 void wil_pm_runtime_put(struct wil6210_priv *wil);
1391 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime);
1392 int wil_suspend(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
1393 int wil_resume(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
1394 bool wil_is_wmi_idle(struct wil6210_priv *wil);
1395 int wmi_resume(struct wil6210_priv *wil);
1396 int wmi_suspend(struct wil6210_priv *wil);
1397 bool wil_is_tx_idle(struct wil6210_priv *wil);
1399 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size);
1400 void wil_fw_core_dump(struct wil6210_priv *wil);
1402 void wil_halp_vote(struct wil6210_priv *wil);
1403 void wil_halp_unvote(struct wil6210_priv *wil);
1404 void wil6210_set_halp(struct wil6210_priv *wil);
1405 void wil6210_clear_halp(struct wil6210_priv *wil);
1407 int wmi_start_sched_scan(struct wil6210_priv *wil,
1408 struct cfg80211_sched_scan_request *request);
1409 int wmi_stop_sched_scan(struct wil6210_priv *wil);
1410 int wmi_mgmt_tx(struct wil6210_vif *vif, const u8 *buf, size_t len);
1411 int wmi_mgmt_tx_ext(struct wil6210_vif *vif, const u8 *buf, size_t len,
1412 u8 channel, u16 duration_ms);
1413 int wmi_rbufcap_cfg(struct wil6210_priv *wil, bool enable, u16 threshold);
1415 int reverse_memcmp(const void *cs, const void *ct, size_t count);
1417 /* WMI for enhanced DMA */
1418 int wil_wmi_tx_sring_cfg(struct wil6210_priv *wil, int ring_id);
1419 int wil_wmi_cfg_def_rx_offload(struct wil6210_priv *wil,
1420 u16 max_rx_pl_per_desc);
1421 int wil_wmi_rx_sring_add(struct wil6210_priv *wil, u16 ring_id);
1422 int wil_wmi_rx_desc_ring_add(struct wil6210_priv *wil, int status_ring_id);
1423 int wil_wmi_tx_desc_ring_add(struct wil6210_vif *vif, int ring_id, int cid,
1425 int wil_wmi_bcast_desc_ring_add(struct wil6210_vif *vif, int ring_id);
1426 int wmi_addba_rx_resp_edma(struct wil6210_priv *wil, u8 mid, u8 cid,
1427 u8 tid, u8 token, u16 status, bool amsdu,
1428 u16 agg_wsize, u16 timeout);
1430 void update_supported_bands(struct wil6210_priv *wil);
1432 void wil_clear_fw_log_addr(struct wil6210_priv *wil);
1433 #endif /* __WIL6210_H__ */