drivers/net/wireless/ath/wil6210/txrx_edma.c

   1 /*
   2  * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/etherdevice.h>
  18 #include <linux/moduleparam.h>
  19 #include <linux/prefetch.h>
  20 #include <linux/types.h>
  21 #include <linux/list.h>
  22 #include <linux/ip.h>
  23 #include <linux/ipv6.h>
  24 #include "wil6210.h"
  25 #include "txrx_edma.h"
  26 #include "txrx.h"
  27 #include "trace.h"
  28
  29 /* Max number of entries (packets to complete) to update the hwtail of tx
  30  * status ring. Should be power of 2
  31  */
  32 #define WIL_EDMA_TX_SRING_UPDATE_HW_TAIL 128
  33 #define WIL_EDMA_MAX_DATA_OFFSET (2)
  34 /* RX buffer size must be aligned to 4 bytes */
  35 #define WIL_EDMA_RX_BUF_LEN_DEFAULT (2048)
  36 #define MAX_INVALID_BUFF_ID_RETRY (3)
  37
  38 static void wil_tx_desc_unmap_edma(struct device *dev,
  39                                    union wil_tx_desc *desc,
  40                                    struct wil_ctx *ctx)
  41 {
  42         struct wil_tx_enhanced_desc *d = (struct wil_tx_enhanced_desc *)desc;
  43         dma_addr_t pa = wil_tx_desc_get_addr_edma(&d->dma);
  44         u16 dmalen = le16_to_cpu(d->dma.length);
  45
  46         switch (ctx->mapped_as) {
  47         case wil_mapped_as_single:
  48                 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
  49                 break;
  50         case wil_mapped_as_page:
  51                 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
  52                 break;
  53         default:
  54                 break;
  55         }
  56 }
  57
  58 static int wil_find_free_sring(struct wil6210_priv *wil)
  59 {
  60         int i;
  61
  62         for (i = 0; i < WIL6210_MAX_STATUS_RINGS; i++) {
  63                 if (!wil->srings[i].va)
  64                         return i;
  65         }
  66
  67         return -EINVAL;
  68 }
  69
  70 static void wil_sring_free(struct wil6210_priv *wil,
  71                            struct wil_status_ring *sring)
  72 {
  73         struct device *dev = wil_to_dev(wil);
  74         size_t sz;
  75
  76         if (!sring || !sring->va)
  77                 return;
  78
  79         sz = sring->elem_size * sring->size;
  80
  81         wil_dbg_misc(wil, "status_ring_free, size(bytes)=%zu, 0x%p:%pad\n",
  82                      sz, sring->va, &sring->pa);
  83
  84         dma_free_coherent(dev, sz, (void *)sring->va, sring->pa);
  85         sring->pa = 0;
  86         sring->va = NULL;
  87 }
  88
  89 static int wil_sring_alloc(struct wil6210_priv *wil,
  90                            struct wil_status_ring *sring)
  91 {
  92         struct device *dev = wil_to_dev(wil);
  93         size_t sz = sring->elem_size * sring->size;
  94
  95         wil_dbg_misc(wil, "status_ring_alloc: size=%zu\n", sz);
  96
  97         if (sz == 0) {
  98                 wil_err(wil, "Cannot allocate a zero size status ring\n");
  99                 return -EINVAL;
 100         }
 101
 102         sring->swhead = 0;
 103
 104         /* Status messages are allocated and initialized to 0. This is necessary
 105          * since DR bit should be initialized to 0.
 106          */
 107         sring->va = dma_alloc_coherent(dev, sz, &sring->pa, GFP_KERNEL);
 108         if (!sring->va)
 109                 return -ENOMEM;
 110
 111         wil_dbg_misc(wil, "status_ring[%d] 0x%p:%pad\n", sring->size, sring->va,
 112                      &sring->pa);
 113
 114         return 0;
 115 }
 116
 117 static int wil_tx_init_edma(struct wil6210_priv *wil)
 118 {
 119         int ring_id = wil_find_free_sring(wil);
 120         struct wil_status_ring *sring;
 121         int rc;
 122         u16 status_ring_size;
 123
 124         if (wil->tx_status_ring_order < WIL_SRING_SIZE_ORDER_MIN ||
 125             wil->tx_status_ring_order > WIL_SRING_SIZE_ORDER_MAX)
 126                 wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
 127
 128         status_ring_size = 1 << wil->tx_status_ring_order;
 129
 130         wil_dbg_misc(wil, "init TX sring: size=%u, ring_id=%u\n",
 131                      status_ring_size, ring_id);
 132
 133         if (ring_id < 0)
 134                 return ring_id;
 135
 136         /* Allocate Tx status ring. Tx descriptor rings will be
 137          * allocated on WMI connect event
 138          */
 139         sring = &wil->srings[ring_id];
 140
 141         sring->is_rx = false;
 142         sring->size = status_ring_size;
 143         sring->elem_size = sizeof(struct wil_ring_tx_status);
 144         rc = wil_sring_alloc(wil, sring);
 145         if (rc)
 146                 return rc;
 147
 148         rc = wil_wmi_tx_sring_cfg(wil, ring_id);
 149         if (rc)
 150                 goto out_free;
 151
 152         sring->desc_rdy_pol = 1;
 153         wil->tx_sring_idx = ring_id;
 154
 155         return 0;
 156 out_free:
 157         wil_sring_free(wil, sring);
 158         return rc;
 159 }
 160
 161 /**
 162  * Allocate one skb for Rx descriptor RING
 163  */
 164 static int wil_ring_alloc_skb_edma(struct wil6210_priv *wil,
 165                                    struct wil_ring *ring, u32 i)
 166 {
 167         struct device *dev = wil_to_dev(wil);
 168         unsigned int sz = wil->rx_buf_len;
 169         dma_addr_t pa;
 170         u16 buff_id;
 171         struct list_head *active = &wil->rx_buff_mgmt.active;
 172         struct list_head *free = &wil->rx_buff_mgmt.free;
 173         struct wil_rx_buff *rx_buff;
 174         struct wil_rx_buff *buff_arr = wil->rx_buff_mgmt.buff_arr;
 175         struct sk_buff *skb;
 176         struct wil_rx_enhanced_desc dd, *d = &dd;
 177         struct wil_rx_enhanced_desc *_d = (struct wil_rx_enhanced_desc *)
 178                 &ring->va[i].rx.enhanced;
 179
 180         if (unlikely(list_empty(free))) {
 181                 wil->rx_buff_mgmt.free_list_empty_cnt++;
 182                 return -EAGAIN;
 183         }
 184
 185         skb = dev_alloc_skb(sz);
 186         if (unlikely(!skb))
 187                 return -ENOMEM;
 188
 189         skb_put(skb, sz);
 190
 191         /**
 192          * Make sure that the network stack calculates checksum for packets
 193          * which failed the HW checksum calculation
 194          */
 195         skb->ip_summed = CHECKSUM_NONE;
 196
 197         pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE);
 198         if (unlikely(dma_mapping_error(dev, pa))) {
 199                 kfree_skb(skb);
 200                 return -ENOMEM;
 201         }
 202
 203         /* Get the buffer ID - the index of the rx buffer in the buff_arr */
 204         rx_buff = list_first_entry(free, struct wil_rx_buff, list);
 205         buff_id = rx_buff->id;
 206
 207         /* Move a buffer from the free list to the active list */
 208         list_move(&rx_buff->list, active);
 209
 210         buff_arr[buff_id].skb = skb;
 211
 212         wil_desc_set_addr_edma(&d->dma.addr, &d->dma.addr_high_high, pa);
 213         d->dma.length = cpu_to_le16(sz);
 214         d->mac.buff_id = cpu_to_le16(buff_id);
 215         *_d = *d;
 216
 217         /* Save the physical address in skb->cb for later use in dma_unmap */
 218         memcpy(skb->cb, &pa, sizeof(pa));
 219
 220         return 0;
 221 }
 222
 223 static inline
 224 void wil_get_next_rx_status_msg(struct wil_status_ring *sring, void *msg)
 225 {
 226         memcpy(msg, (void *)(sring->va + (sring->elem_size * sring->swhead)),
 227                sring->elem_size);
 228 }
 229
 230 static inline void wil_sring_advance_swhead(struct wil_status_ring *sring)
 231 {
 232         sring->swhead = (sring->swhead + 1) % sring->size;
 233         if (sring->swhead == 0)
 234                 sring->desc_rdy_pol = 1 - sring->desc_rdy_pol;
 235 }
 236
 237 static int wil_rx_refill_edma(struct wil6210_priv *wil)
 238 {
 239         struct wil_ring *ring = &wil->ring_rx;
 240         u32 next_head;
 241         int rc = 0;
 242         ring->swtail = *ring->edma_rx_swtail.va;
 243
 244         for (; next_head = wil_ring_next_head(ring),
 245              (next_head != ring->swtail);
 246              ring->swhead = next_head) {
 247                 rc = wil_ring_alloc_skb_edma(wil, ring, ring->swhead);
 248                 if (unlikely(rc)) {
 249                         if (rc == -EAGAIN)
 250                                 wil_dbg_txrx(wil, "No free buffer ID found\n");
 251                         else
 252                                 wil_err_ratelimited(wil,
 253                                                     "Error %d in refill desc[%d]\n",
 254                                                     rc, ring->swhead);
 255                         break;
 256                 }
 257         }
 258
 259         /* make sure all writes to descriptors (shared memory) are done before
 260          * committing them to HW
 261          */
 262         wmb();
 263
 264         wil_w(wil, ring->hwtail, ring->swhead);
 265
 266         return rc;
 267 }
 268
 269 static void wil_move_all_rx_buff_to_free_list(struct wil6210_priv *wil,
 270                                               struct wil_ring *ring)
 271 {
 272         struct device *dev = wil_to_dev(wil);
 273         struct list_head *active = &wil->rx_buff_mgmt.active;
 274         dma_addr_t pa;
 275
 276         if (!wil->rx_buff_mgmt.buff_arr)
 277                 return;
 278
 279         while (!list_empty(active)) {
 280                 struct wil_rx_buff *rx_buff =
 281                         list_first_entry(active, struct wil_rx_buff, list);
 282                 struct sk_buff *skb = rx_buff->skb;
 283
 284                 if (unlikely(!skb)) {
 285                         wil_err(wil, "No Rx skb at buff_id %d\n", rx_buff->id);
 286                 } else {
 287                         rx_buff->skb = NULL;
 288                         memcpy(&pa, skb->cb, sizeof(pa));
 289                         dma_unmap_single(dev, pa, wil->rx_buf_len,
 290                                          DMA_FROM_DEVICE);
 291                         kfree_skb(skb);
 292                 }
 293
 294                 /* Move the buffer from the active to the free list */
 295                 list_move(&rx_buff->list, &wil->rx_buff_mgmt.free);
 296         }
 297 }
 298
 299 static void wil_free_rx_buff_arr(struct wil6210_priv *wil)
 300 {
 301         struct wil_ring *ring = &wil->ring_rx;
 302
 303         if (!wil->rx_buff_mgmt.buff_arr)
 304                 return;
 305
 306         /* Move all the buffers to the free list in case active list is
 307          * not empty in order to release all SKBs before deleting the array
 308          */
 309         wil_move_all_rx_buff_to_free_list(wil, ring);
 310
 311         kfree(wil->rx_buff_mgmt.buff_arr);
 312         wil->rx_buff_mgmt.buff_arr = NULL;
 313 }
 314
 315 static int wil_init_rx_buff_arr(struct wil6210_priv *wil,
 316                                 size_t size)
 317 {
 318         struct wil_rx_buff *buff_arr;
 319         struct list_head *active = &wil->rx_buff_mgmt.active;
 320         struct list_head *free = &wil->rx_buff_mgmt.free;
 321         int i;
 322
 323         wil->rx_buff_mgmt.buff_arr = kcalloc(size + 1,
 324                                              sizeof(struct wil_rx_buff),
 325                                              GFP_KERNEL);
 326         if (!wil->rx_buff_mgmt.buff_arr)
 327                 return -ENOMEM;
 328
 329         /* Set list heads */
 330         INIT_LIST_HEAD(active);
 331         INIT_LIST_HEAD(free);
 332
 333         /* Linkify the list.
 334          * buffer id 0 should not be used (marks invalid id).
 335          */
 336         buff_arr = wil->rx_buff_mgmt.buff_arr;
 337         for (i = 1; i <= size; i++) {
 338                 list_add(&buff_arr[i].list, free);
 339                 buff_arr[i].id = i;
 340         }
 341
 342         wil->rx_buff_mgmt.size = size + 1;
 343
 344         return 0;
 345 }
 346
 347 static int wil_init_rx_sring(struct wil6210_priv *wil,
 348                              u16 status_ring_size,
 349                              size_t elem_size,
 350                              u16 ring_id)
 351 {
 352         struct wil_status_ring *sring = &wil->srings[ring_id];
 353         int rc;
 354
 355         wil_dbg_misc(wil, "init RX sring: size=%u, ring_id=%u\n",
 356                      status_ring_size, ring_id);
 357
 358         memset(&sring->rx_data, 0, sizeof(sring->rx_data));
 359
 360         sring->is_rx = true;
 361         sring->size = status_ring_size;
 362         sring->elem_size = elem_size;
 363         rc = wil_sring_alloc(wil, sring);
 364         if (rc)
 365                 return rc;
 366
 367         rc = wil_wmi_rx_sring_add(wil, ring_id);
 368         if (rc)
 369                 goto out_free;
 370
 371         sring->desc_rdy_pol = 1;
 372
 373         return 0;
 374 out_free:
 375         wil_sring_free(wil, sring);
 376         return rc;
 377 }
 378
 379 static int wil_ring_alloc_desc_ring(struct wil6210_priv *wil,
 380                                     struct wil_ring *ring)
 381 {
 382         struct device *dev = wil_to_dev(wil);
 383         size_t sz = ring->size * sizeof(ring->va[0]);
 384
 385         wil_dbg_misc(wil, "alloc_desc_ring:\n");
 386
 387         BUILD_BUG_ON(sizeof(ring->va[0]) != 32);
 388
 389         ring->swhead = 0;
 390         ring->swtail = 0;
 391         ring->ctx = kcalloc(ring->size, sizeof(ring->ctx[0]), GFP_KERNEL);
 392         if (!ring->ctx)
 393                 goto err;
 394
 395         ring->va = dma_alloc_coherent(dev, sz, &ring->pa, GFP_KERNEL);
 396         if (!ring->va)
 397                 goto err_free_ctx;
 398
 399         if (ring->is_rx) {
 400                 sz = sizeof(*ring->edma_rx_swtail.va);
 401                 ring->edma_rx_swtail.va =
 402                         dma_alloc_coherent(dev, sz, &ring->edma_rx_swtail.pa,
 403                                            GFP_KERNEL);
 404                 if (!ring->edma_rx_swtail.va)
 405                         goto err_free_va;
 406         }
 407
 408         wil_dbg_misc(wil, "%s ring[%d] 0x%p:%pad 0x%p\n",
 409                      ring->is_rx ? "RX" : "TX",
 410                      ring->size, ring->va, &ring->pa, ring->ctx);
 411
 412         return 0;
 413 err_free_va:
 414         dma_free_coherent(dev, ring->size * sizeof(ring->va[0]),
 415                           (void *)ring->va, ring->pa);
 416         ring->va = NULL;
 417 err_free_ctx:
 418         kfree(ring->ctx);
 419         ring->ctx = NULL;
 420 err:
 421         return -ENOMEM;
 422 }
 423
 424 static void wil_ring_free_edma(struct wil6210_priv *wil, struct wil_ring *ring)
 425 {
 426         struct device *dev = wil_to_dev(wil);
 427         size_t sz;
 428         int ring_index = 0;
 429
 430         if (!ring->va)
 431                 return;
 432
 433         sz = ring->size * sizeof(ring->va[0]);
 434
 435         lockdep_assert_held(&wil->mutex);
 436         if (ring->is_rx) {
 437                 wil_dbg_misc(wil, "free Rx ring [%d] 0x%p:%pad 0x%p\n",
 438                              ring->size, ring->va,
 439                              &ring->pa, ring->ctx);
 440
 441                 wil_move_all_rx_buff_to_free_list(wil, ring);
 442                 dma_free_coherent(dev, sizeof(*ring->edma_rx_swtail.va),
 443                                   ring->edma_rx_swtail.va,
 444                                   ring->edma_rx_swtail.pa);
 445                 goto out;
 446         }
 447
 448         /* TX ring */
 449         ring_index = ring - wil->ring_tx;
 450
 451         wil_dbg_misc(wil, "free Tx ring %d [%d] 0x%p:%pad 0x%p\n",
 452                      ring_index, ring->size, ring->va,
 453                      &ring->pa, ring->ctx);
 454
 455         while (!wil_ring_is_empty(ring)) {
 456                 struct wil_ctx *ctx;
 457
 458                 struct wil_tx_enhanced_desc dd, *d = &dd;
 459                 struct wil_tx_enhanced_desc *_d =
 460                         (struct wil_tx_enhanced_desc *)
 461                         &ring->va[ring->swtail].tx.enhanced;
 462
 463                 ctx = &ring->ctx[ring->swtail];
 464                 if (!ctx) {
 465                         wil_dbg_txrx(wil,
 466                                      "ctx(%d) was already completed\n",
 467                                      ring->swtail);
 468                         ring->swtail = wil_ring_next_tail(ring);
 469                         continue;
 470                 }
 471                 *d = *_d;
 472                 wil_tx_desc_unmap_edma(dev, (union wil_tx_desc *)d, ctx);
 473                 if (ctx->skb)
 474                         dev_kfree_skb_any(ctx->skb);
 475                 ring->swtail = wil_ring_next_tail(ring);
 476         }
 477
 478 out:
 479         dma_free_coherent(dev, sz, (void *)ring->va, ring->pa);
 480         kfree(ring->ctx);
 481         ring->pa = 0;
 482         ring->va = NULL;
 483         ring->ctx = NULL;
 484 }
 485
 486 static int wil_init_rx_desc_ring(struct wil6210_priv *wil, u16 desc_ring_size,
 487                                  int status_ring_id)
 488 {
 489         struct wil_ring *ring = &wil->ring_rx;
 490         int rc;
 491
 492         wil_dbg_misc(wil, "init RX desc ring\n");
 493
 494         ring->size = desc_ring_size;
 495         ring->is_rx = true;
 496         rc = wil_ring_alloc_desc_ring(wil, ring);
 497         if (rc)
 498                 return rc;
 499
 500         rc = wil_wmi_rx_desc_ring_add(wil, status_ring_id);
 501         if (rc)
 502                 goto out_free;
 503
 504         return 0;
 505 out_free:
 506         wil_ring_free_edma(wil, ring);
 507         return rc;
 508 }
 509
 510 static void wil_get_reorder_params_edma(struct wil6210_priv *wil,
 511                                         struct sk_buff *skb, int *tid,
 512                                         int *cid, int *mid, u16 *seq,
 513                                         int *mcast, int *retry)
 514 {
 515         struct wil_rx_status_extended *s = wil_skb_rxstatus(skb);
 516
 517         *tid = wil_rx_status_get_tid(s);
 518         *cid = wil_rx_status_get_cid(s);
 519         *mid = wil_rx_status_get_mid(s);
 520         *seq = le16_to_cpu(wil_rx_status_get_seq(wil, s));
 521         *mcast = wil_rx_status_get_mcast(s);
 522         *retry = wil_rx_status_get_retry(s);
 523 }
 524
 525 static void wil_get_netif_rx_params_edma(struct sk_buff *skb, int *cid,
 526                                          int *security)
 527 {
 528         struct wil_rx_status_extended *s = wil_skb_rxstatus(skb);
 529
 530         *cid = wil_rx_status_get_cid(s);
 531         *security = wil_rx_status_get_security(s);
 532 }
 533
 534 static int wil_rx_crypto_check_edma(struct wil6210_priv *wil,
 535                                     struct sk_buff *skb)
 536 {
 537         struct wil_rx_status_extended *st;
 538         int cid, tid, key_id, mc;
 539         struct wil_sta_info *s;
 540         struct wil_tid_crypto_rx *c;
 541         struct wil_tid_crypto_rx_single *cc;
 542         const u8 *pn;
 543
 544         /* In HW reorder, HW is responsible for crypto check */
 545         if (wil->use_rx_hw_reordering)
 546                 return 0;
 547
 548         st = wil_skb_rxstatus(skb);
 549
 550         cid = wil_rx_status_get_cid(st);
 551         tid = wil_rx_status_get_tid(st);
 552         key_id = wil_rx_status_get_key_id(st);
 553         mc = wil_rx_status_get_mcast(st);
 554         s = &wil->sta[cid];
 555         c = mc ? &s->group_crypto_rx : &s->tid_crypto_rx[tid];
 556         cc = &c->key_id[key_id];
 557         pn = (u8 *)&st->ext.pn_15_0;
 558
 559         if (!cc->key_set) {
 560                 wil_err_ratelimited(wil,
 561                                     "Key missing. CID %d TID %d MCast %d KEY_ID %d\n",
 562                                     cid, tid, mc, key_id);
 563                 return -EINVAL;
 564         }
 565
 566         if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) {
 567                 wil_err_ratelimited(wil,
 568                                     "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n",
 569                                     cid, tid, mc, key_id, pn, cc->pn);
 570                 return -EINVAL;
 571         }
 572         memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN);
 573
 574         return 0;
 575 }
 576
 577 static bool wil_is_rx_idle_edma(struct wil6210_priv *wil)
 578 {
 579         struct wil_status_ring *sring;
 580         struct wil_rx_status_extended msg1;
 581         void *msg = &msg1;
 582         u8 dr_bit;
 583         int i;
 584
 585         for (i = 0; i < wil->num_rx_status_rings; i++) {
 586                 sring = &wil->srings[i];
 587                 if (!sring->va)
 588                         continue;
 589
 590                 wil_get_next_rx_status_msg(sring, msg);
 591                 dr_bit = wil_rx_status_get_desc_rdy_bit(msg);
 592
 593                 /* Check if there are unhandled RX status messages */
 594                 if (dr_bit == sring->desc_rdy_pol)
 595                         return false;
 596         }
 597
 598         return true;
 599 }
 600
 601 static void wil_rx_buf_len_init_edma(struct wil6210_priv *wil)
 602 {
 603         /* RX buffer size must be aligned to 4 bytes */
 604         wil->rx_buf_len = rx_large_buf ?
 605                 WIL_MAX_ETH_MTU : WIL_EDMA_RX_BUF_LEN_DEFAULT;
 606 }
 607
 608 static int wil_rx_init_edma(struct wil6210_priv *wil, uint desc_ring_order)
 609 {
 610         u16 status_ring_size, desc_ring_size = 1 << desc_ring_order;
 611         struct wil_ring *ring = &wil->ring_rx;
 612         int rc;
 613         size_t elem_size = wil->use_compressed_rx_status ?
 614                 sizeof(struct wil_rx_status_compressed) :
 615                 sizeof(struct wil_rx_status_extended);
 616         int i;
 617
 618         /* In SW reorder one must use extended status messages */
 619         if (wil->use_compressed_rx_status && !wil->use_rx_hw_reordering) {
 620                 wil_err(wil,
 621                         "compressed RX status cannot be used with SW reorder\n");
 622                 return -EINVAL;
 623         }
 624         if (wil->rx_status_ring_order <= desc_ring_order)
 625                 /* make sure sring is larger than desc ring */
 626                 wil->rx_status_ring_order = desc_ring_order + 1;
 627         if (wil->rx_buff_id_count <= desc_ring_size)
 628                 /* make sure we will not run out of buff_ids */
 629                 wil->rx_buff_id_count = desc_ring_size + 512;
 630         if (wil->rx_status_ring_order < WIL_SRING_SIZE_ORDER_MIN ||
 631             wil->rx_status_ring_order > WIL_SRING_SIZE_ORDER_MAX)
 632                 wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
 633
 634         status_ring_size = 1 << wil->rx_status_ring_order;
 635
 636         wil_dbg_misc(wil,
 637                      "rx_init, desc_ring_size=%u, status_ring_size=%u, elem_size=%zu\n",
 638                      desc_ring_size, status_ring_size, elem_size);
 639
 640         wil_rx_buf_len_init_edma(wil);
 641
 642         /* Use debugfs dbg_num_rx_srings if set, reserve one sring for TX */
 643         if (wil->num_rx_status_rings > WIL6210_MAX_STATUS_RINGS - 1)
 644                 wil->num_rx_status_rings = WIL6210_MAX_STATUS_RINGS - 1;
 645
 646         wil_dbg_misc(wil, "rx_init: allocate %d status rings\n",
 647                      wil->num_rx_status_rings);
 648
 649         rc = wil_wmi_cfg_def_rx_offload(wil, wil->rx_buf_len);
 650         if (rc)
 651                 return rc;
 652
 653         /* Allocate status ring */
 654         for (i = 0; i < wil->num_rx_status_rings; i++) {
 655                 int sring_id = wil_find_free_sring(wil);
 656
 657                 if (sring_id < 0) {
 658                         rc = -EFAULT;
 659                         goto err_free_status;
 660                 }
 661                 rc = wil_init_rx_sring(wil, status_ring_size, elem_size,
 662                                        sring_id);
 663                 if (rc)
 664                         goto err_free_status;
 665         }
 666
 667         /* Allocate descriptor ring */
 668         rc = wil_init_rx_desc_ring(wil, desc_ring_size,
 669                                    WIL_DEFAULT_RX_STATUS_RING_ID);
 670         if (rc)
 671                 goto err_free_status;
 672
 673         if (wil->rx_buff_id_count >= status_ring_size) {
 674                 wil_info(wil,
 675                          "rx_buff_id_count %d exceeds sring_size %d. set it to %d\n",
 676                          wil->rx_buff_id_count, status_ring_size,
 677                          status_ring_size - 1);
 678                 wil->rx_buff_id_count = status_ring_size - 1;
 679         }
 680
 681         /* Allocate Rx buffer array */
 682         rc = wil_init_rx_buff_arr(wil, wil->rx_buff_id_count);
 683         if (rc)
 684                 goto err_free_desc;
 685
 686         /* Fill descriptor ring with credits */
 687         rc = wil_rx_refill_edma(wil);
 688         if (rc)
 689                 goto err_free_rx_buff_arr;
 690
 691         return 0;
 692 err_free_rx_buff_arr:
 693         wil_free_rx_buff_arr(wil);
 694 err_free_desc:
 695         wil_ring_free_edma(wil, ring);
 696 err_free_status:
 697         for (i = 0; i < wil->num_rx_status_rings; i++)
 698                 wil_sring_free(wil, &wil->srings[i]);
 699
 700         return rc;
 701 }
 702
 703 static int wil_ring_init_tx_edma(struct wil6210_vif *vif, int ring_id,
 704                                  int size, int cid, int tid)
 705 {
 706         struct wil6210_priv *wil = vif_to_wil(vif);
 707         int rc;
 708         struct wil_ring *ring = &wil->ring_tx[ring_id];
 709         struct wil_ring_tx_data *txdata = &wil->ring_tx_data[ring_id];
 710
 711         lockdep_assert_held(&wil->mutex);
 712
 713         wil_dbg_misc(wil,
 714                      "init TX ring: ring_id=%u, cid=%u, tid=%u, sring_id=%u\n",
 715                      ring_id, cid, tid, wil->tx_sring_idx);
 716
 717         wil_tx_data_init(txdata);
 718         ring->size = size;
 719         rc = wil_ring_alloc_desc_ring(wil, ring);
 720         if (rc)
 721                 goto out;
 722
 723         wil->ring2cid_tid[ring_id][0] = cid;
 724         wil->ring2cid_tid[ring_id][1] = tid;
 725         if (!vif->privacy)
 726                 txdata->dot1x_open = true;
 727
 728         rc = wil_wmi_tx_desc_ring_add(vif, ring_id, cid, tid);
 729         if (rc) {
 730                 wil_err(wil, "WMI_TX_DESC_RING_ADD_CMD failed\n");
 731                 goto out_free;
 732         }
 733
 734         if (txdata->dot1x_open && agg_wsize >= 0)
 735                 wil_addba_tx_request(wil, ring_id, agg_wsize);
 736
 737         return 0;
 738  out_free:
 739         spin_lock_bh(&txdata->lock);
 740         txdata->dot1x_open = false;
 741         txdata->enabled = 0;
 742         spin_unlock_bh(&txdata->lock);
 743         wil_ring_free_edma(wil, ring);
 744         wil->ring2cid_tid[ring_id][0] = wil->max_assoc_sta;
 745         wil->ring2cid_tid[ring_id][1] = 0;
 746
 747  out:
 748         return rc;
 749 }
 750
 751 static int wil_tx_ring_modify_edma(struct wil6210_vif *vif, int ring_id,
 752                                    int cid, int tid)
 753 {
 754         struct wil6210_priv *wil = vif_to_wil(vif);
 755
 756         wil_err(wil, "ring modify is not supported for EDMA\n");
 757
 758         return -EOPNOTSUPP;
 759 }
 760
 761 /* This function is used only for RX SW reorder */
 762 static int wil_check_bar(struct wil6210_priv *wil, void *msg, int cid,
 763                          struct sk_buff *skb, struct wil_net_stats *stats)
 764 {
 765         u8 ftype;
 766         u8 fc1;
 767         int mid;
 768         int tid;
 769         u16 seq;
 770         struct wil6210_vif *vif;
 771
 772         ftype = wil_rx_status_get_frame_type(wil, msg);
 773         if (ftype == IEEE80211_FTYPE_DATA)
 774                 return 0;
 775
 776         fc1 = wil_rx_status_get_fc1(wil, msg);
 777         mid = wil_rx_status_get_mid(msg);
 778         tid = wil_rx_status_get_tid(msg);
 779         seq = le16_to_cpu(wil_rx_status_get_seq(wil, msg));
 780         vif = wil->vifs[mid];
 781
 782         if (unlikely(!vif)) {
 783                 wil_dbg_txrx(wil, "RX descriptor with invalid mid %d", mid);
 784                 return -EAGAIN;
 785         }
 786
 787         wil_dbg_txrx(wil,
 788                      "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
 789                      fc1, mid, cid, tid, seq);
 790         if (stats)
 791                 stats->rx_non_data_frame++;
 792         if (wil_is_back_req(fc1)) {
 793                 wil_dbg_txrx(wil,
 794                              "BAR: MID %d CID %d TID %d Seq 0x%03x\n",
 795                              mid, cid, tid, seq);
 796                 wil_rx_bar(wil, vif, cid, tid, seq);
 797         } else {
 798                 u32 sz = wil->use_compressed_rx_status ?
 799                         sizeof(struct wil_rx_status_compressed) :
 800                         sizeof(struct wil_rx_status_extended);
 801
 802                 /* print again all info. One can enable only this
 803                  * without overhead for printing every Rx frame
 804                  */
 805                 wil_dbg_txrx(wil,
 806                              "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
 807                              fc1, mid, cid, tid, seq);
 808                 wil_hex_dump_txrx("RxS ", DUMP_PREFIX_NONE, 32, 4,
 809                                   (const void *)msg, sz, false);
 810                 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
 811                                   skb->data, skb_headlen(skb), false);
 812         }
 813
 814         return -EAGAIN;
 815 }
 816
 817 static int wil_rx_error_check_edma(struct wil6210_priv *wil,
 818                                    struct sk_buff *skb,
 819                                    struct wil_net_stats *stats)
 820 {
 821         int l2_rx_status;
 822         void *msg = wil_skb_rxstatus(skb);
 823
 824         l2_rx_status = wil_rx_status_get_l2_rx_status(msg);
 825         if (l2_rx_status != 0) {
 826                 wil_dbg_txrx(wil, "L2 RX error, l2_rx_status=0x%x\n",
 827                              l2_rx_status);
 828                 /* Due to HW issue, KEY error will trigger a MIC error */
 829                 if (l2_rx_status == WIL_RX_EDMA_ERROR_MIC) {
 830                         wil_err_ratelimited(wil,
 831                                             "L2 MIC/KEY error, dropping packet\n");
 832                         stats->rx_mic_error++;
 833                 }
 834                 if (l2_rx_status == WIL_RX_EDMA_ERROR_KEY) {
 835                         wil_err_ratelimited(wil,
 836                                             "L2 KEY error, dropping packet\n");
 837                         stats->rx_key_error++;
 838                 }
 839                 if (l2_rx_status == WIL_RX_EDMA_ERROR_REPLAY) {
 840                         wil_err_ratelimited(wil,
 841                                             "L2 REPLAY error, dropping packet\n");
 842                         stats->rx_replay++;
 843                 }
 844                 if (l2_rx_status == WIL_RX_EDMA_ERROR_AMSDU) {
 845                         wil_err_ratelimited(wil,
 846                                             "L2 AMSDU error, dropping packet\n");
 847                         stats->rx_amsdu_error++;
 848                 }
 849                 return -EFAULT;
 850         }
 851
 852         skb->ip_summed = wil_rx_status_get_checksum(msg, stats);
 853
 854         return 0;
 855 }
 856
 857 static struct sk_buff *wil_sring_reap_rx_edma(struct wil6210_priv *wil,
 858                                               struct wil_status_ring *sring)
 859 {
 860         struct device *dev = wil_to_dev(wil);
 861         struct wil_rx_status_extended msg1;
 862         void *msg = &msg1;
 863         u16 buff_id;
 864         struct sk_buff *skb;
 865         dma_addr_t pa;
 866         struct wil_ring_rx_data *rxdata = &sring->rx_data;
 867         unsigned int sz = wil->rx_buf_len;
 868         struct wil_net_stats *stats = NULL;
 869         u16 dmalen;
 870         int cid;
 871         bool eop, headstolen;
 872         int delta;
 873         u8 dr_bit;
 874         u8 data_offset;
 875         struct wil_rx_status_extended *s;
 876         u16 sring_idx = sring - wil->srings;
 877
 878         BUILD_BUG_ON(sizeof(struct wil_rx_status_extended) > sizeof(skb->cb));
 879
 880 again:
 881         wil_get_next_rx_status_msg(sring, msg);
 882         dr_bit = wil_rx_status_get_desc_rdy_bit(msg);
 883
 884         /* Completed handling all the ready status messages */
 885         if (dr_bit != sring->desc_rdy_pol)
 886                 return NULL;
 887
 888         /* Extract the buffer ID from the status message */
 889         buff_id = le16_to_cpu(wil_rx_status_get_buff_id(msg));
 890
 891         while (!buff_id) {
 892                 struct wil_rx_status_extended *s;
 893                 int invalid_buff_id_retry = 0;
 894
 895                 wil_dbg_txrx(wil,
 896                              "buff_id is not updated yet by HW, (swhead 0x%x)\n",
 897                              sring->swhead);
 898                 if (++invalid_buff_id_retry > MAX_INVALID_BUFF_ID_RETRY)
 899                         break;
 900
 901                 /* Read the status message again */
 902                 s = (struct wil_rx_status_extended *)
 903                         (sring->va + (sring->elem_size * sring->swhead));
 904                 *(struct wil_rx_status_extended *)msg = *s;
 905                 buff_id = le16_to_cpu(wil_rx_status_get_buff_id(msg));
 906         }
 907
 908         if (unlikely(!wil_val_in_range(buff_id, 1, wil->rx_buff_mgmt.size))) {
 909                 wil_err(wil, "Corrupt buff_id=%d, sring->swhead=%d\n",
 910                         buff_id, sring->swhead);
 911                 wil_rx_status_reset_buff_id(sring);
 912                 wil_sring_advance_swhead(sring);
 913                 sring->invalid_buff_id_cnt++;
 914                 goto again;
 915         }
 916
 917         /* Extract the SKB from the rx_buff management array */
 918         skb = wil->rx_buff_mgmt.buff_arr[buff_id].skb;
 919         wil->rx_buff_mgmt.buff_arr[buff_id].skb = NULL;
 920         if (!skb) {
 921                 wil_err(wil, "No Rx skb at buff_id %d\n", buff_id);
 922                 wil_rx_status_reset_buff_id(sring);
 923                 /* Move the buffer from the active list to the free list */
 924                 list_move_tail(&wil->rx_buff_mgmt.buff_arr[buff_id].list,
 925                                &wil->rx_buff_mgmt.free);
 926                 wil_sring_advance_swhead(sring);
 927                 sring->invalid_buff_id_cnt++;
 928                 goto again;
 929         }
 930
 931         wil_rx_status_reset_buff_id(sring);
 932         wil_sring_advance_swhead(sring);
 933
 934         memcpy(&pa, skb->cb, sizeof(pa));
 935         dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE);
 936         dmalen = le16_to_cpu(wil_rx_status_get_length(msg));
 937
 938         trace_wil6210_rx_status(wil, wil->use_compressed_rx_status, buff_id,
 939                                 msg);
 940         wil_dbg_txrx(wil, "Rx, buff_id=%u, sring_idx=%u, dmalen=%u bytes\n",
 941                      buff_id, sring_idx, dmalen);
 942         wil_hex_dump_txrx("RxS ", DUMP_PREFIX_NONE, 32, 4,
 943                           (const void *)msg, wil->use_compressed_rx_status ?
 944                           sizeof(struct wil_rx_status_compressed) :
 945                           sizeof(struct wil_rx_status_extended), false);
 946
 947         /* Move the buffer from the active list to the free list */
 948         list_move_tail(&wil->rx_buff_mgmt.buff_arr[buff_id].list,
 949                        &wil->rx_buff_mgmt.free);
 950
 951         eop = wil_rx_status_get_eop(msg);
 952
 953         cid = wil_rx_status_get_cid(msg);
 954         if (unlikely(!wil_val_in_range(cid, 0, wil->max_assoc_sta))) {
 955                 wil_err(wil, "Corrupt cid=%d, sring->swhead=%d\n",
 956                         cid, sring->swhead);
 957                 rxdata->skipping = true;
 958                 goto skipping;
 959         }
 960         stats = &wil->sta[cid].stats;
 961
 962         if (unlikely(skb->len < ETH_HLEN)) {
 963                 wil_dbg_txrx(wil, "Short frame, len = %d\n", skb->len);
 964                 stats->rx_short_frame++;
 965                 rxdata->skipping = true;
 966                 goto skipping;
 967         }
 968
 969         if (unlikely(dmalen > sz)) {
 970                 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen);
 971                 stats->rx_large_frame++;
 972                 rxdata->skipping = true;
 973         }
 974
 975 skipping:
 976         /* skipping indicates if a certain SKB should be dropped.
 977          * It is set in case there is an error on the current SKB or in case
 978          * of RX chaining: as long as we manage to merge the SKBs it will
 979          * be false. once we have a bad SKB or we don't manage to merge SKBs
 980          * it will be set to the !EOP value of the current SKB.
 981          * This guarantees that all the following SKBs until EOP will also
 982          * get dropped.
 983          */
 984         if (unlikely(rxdata->skipping)) {
 985                 kfree_skb(skb);
 986                 if (rxdata->skb) {
 987                         kfree_skb(rxdata->skb);
 988                         rxdata->skb = NULL;
 989                 }
 990                 rxdata->skipping = !eop;
 991                 goto again;
 992         }
 993
 994         skb_trim(skb, dmalen);
 995
 996         prefetch(skb->data);
 997
 998         if (!rxdata->skb) {
 999                 rxdata->skb = skb;
1000         } else {
1001                 if (likely(skb_try_coalesce(rxdata->skb, skb, &headstolen,
1002                                             &delta))) {
1003                         kfree_skb_partial(skb, headstolen);
1004                 } else {
1005                         wil_err(wil, "failed to merge skbs!\n");
1006                         kfree_skb(skb);
1007                         kfree_skb(rxdata->skb);
1008                         rxdata->skb = NULL;
1009                         rxdata->skipping = !eop;
1010                         goto again;
1011                 }
1012         }
1013
1014         if (!eop)
1015                 goto again;
1016
1017         /* reaching here rxdata->skb always contains a full packet */
1018         skb = rxdata->skb;
1019         rxdata->skb = NULL;
1020         rxdata->skipping = false;
1021
1022         if (stats) {
1023                 stats->last_mcs_rx = wil_rx_status_get_mcs(msg);
1024                 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs))
1025                         stats->rx_per_mcs[stats->last_mcs_rx]++;
1026         }
1027
1028         if (!wil->use_rx_hw_reordering && !wil->use_compressed_rx_status &&
1029             wil_check_bar(wil, msg, cid, skb, stats) == -EAGAIN) {
1030                 kfree_skb(skb);
1031                 goto again;
1032         }
1033
1034         /* Compensate for the HW data alignment according to the status
1035          * message
1036          */
1037         data_offset = wil_rx_status_get_data_offset(msg);
1038         if (data_offset == 0xFF ||
1039             data_offset > WIL_EDMA_MAX_DATA_OFFSET) {
1040                 wil_err(wil, "Unexpected data offset %d\n", data_offset);
1041                 kfree_skb(skb);
1042                 goto again;
1043         }
1044
1045         skb_pull(skb, data_offset);
1046
1047         wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
1048                           skb->data, skb_headlen(skb), false);
1049
1050         /* Has to be done after dma_unmap_single as skb->cb is also
1051          * used for holding the pa
1052          */
1053         s = wil_skb_rxstatus(skb);
1054         memcpy(s, msg, sring->elem_size);
1055
1056         return skb;
1057 }
1058
1059 void wil_rx_handle_edma(struct wil6210_priv *wil, int *quota)
1060 {
1061         struct net_device *ndev;
1062         struct wil_ring *ring = &wil->ring_rx;
1063         struct wil_status_ring *sring;
1064         struct sk_buff *skb;
1065         int i;
1066
1067         if (unlikely(!ring->va)) {
1068                 wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
1069                 return;
1070         }
1071         wil_dbg_txrx(wil, "rx_handle\n");
1072
1073         for (i = 0; i < wil->num_rx_status_rings; i++) {
1074                 sring = &wil->srings[i];
1075                 if (unlikely(!sring->va)) {
1076                         wil_err(wil,
1077                                 "Rx IRQ while Rx status ring %d not yet initialized\n",
1078                                 i);
1079                         continue;
1080                 }
1081
1082                 while ((*quota > 0) &&
1083                        (NULL != (skb =
1084                         wil_sring_reap_rx_edma(wil, sring)))) {
1085                         (*quota)--;
1086                         if (wil->use_rx_hw_reordering) {
1087                                 void *msg = wil_skb_rxstatus(skb);
1088                                 int mid = wil_rx_status_get_mid(msg);
1089                                 struct wil6210_vif *vif = wil->vifs[mid];
1090
1091                                 if (unlikely(!vif)) {
1092                                         wil_dbg_txrx(wil,
1093                                                      "RX desc invalid mid %d",
1094                                                      mid);
1095                                         kfree_skb(skb);
1096                                         continue;
1097                                 }
1098                                 ndev = vif_to_ndev(vif);
1099                                 wil_netif_rx_any(skb, ndev);
1100                         } else {
1101                                 wil_rx_reorder(wil, skb);
1102                         }
1103                 }
1104
1105                 wil_w(wil, sring->hwtail, (sring->swhead - 1) % sring->size);
1106         }
1107
1108         wil_rx_refill_edma(wil);
1109 }
1110
1111 static int wil_tx_desc_map_edma(union wil_tx_desc *desc,
1112                                 dma_addr_t pa,
1113                                 u32 len,
1114                                 int ring_index)
1115 {
1116         struct wil_tx_enhanced_desc *d =
1117                 (struct wil_tx_enhanced_desc *)&desc->enhanced;
1118
1119         memset(d, 0, sizeof(struct wil_tx_enhanced_desc));
1120
1121         wil_desc_set_addr_edma(&d->dma.addr, &d->dma.addr_high_high, pa);
1122
1123         /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/
1124         d->dma.length = cpu_to_le16((u16)len);
1125         d->mac.d[0] = (ring_index << WIL_EDMA_DESC_TX_MAC_CFG_0_QID_POS);
1126         /* translation type:  0 - bypass; 1 - 802.3; 2 - native wifi;
1127          * 3 - eth mode
1128          */
1129         d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) |
1130                       (0x3 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS);
1131
1132         return 0;
1133 }
1134
1135 static inline void
1136 wil_get_next_tx_status_msg(struct wil_status_ring *sring,
1137                            struct wil_ring_tx_status *msg)
1138 {
1139         struct wil_ring_tx_status *_msg = (struct wil_ring_tx_status *)
1140                 (sring->va + (sring->elem_size * sring->swhead));
1141
1142         *msg = *_msg;
1143 }
1144
1145 /**
1146  * Clean up transmitted skb's from the Tx descriptor RING.
1147  * Return number of descriptors cleared.
1148  */
1149 int wil_tx_sring_handler(struct wil6210_priv *wil,
1150                          struct wil_status_ring *sring)
1151 {
1152         struct net_device *ndev;
1153         struct device *dev = wil_to_dev(wil);
1154         struct wil_ring *ring = NULL;
1155         struct wil_ring_tx_data *txdata;
1156         /* Total number of completed descriptors in all descriptor rings */
1157         int desc_cnt = 0;
1158         int cid;
1159         struct wil_net_stats *stats;
1160         struct wil_tx_enhanced_desc *_d;
1161         unsigned int ring_id;
1162         unsigned int num_descs, num_statuses = 0;
1163         int i;
1164         u8 dr_bit; /* Descriptor Ready bit */
1165         struct wil_ring_tx_status msg;
1166         struct wil6210_vif *vif;
1167         int used_before_complete;
1168         int used_new;
1169
1170         wil_get_next_tx_status_msg(sring, &msg);
1171         dr_bit = msg.desc_ready >> TX_STATUS_DESC_READY_POS;
1172
1173         /* Process completion messages while DR bit has the expected polarity */
1174         while (dr_bit == sring->desc_rdy_pol) {
1175                 num_descs = msg.num_descriptors;
1176                 if (!num_descs) {
1177                         wil_err(wil, "invalid num_descs 0\n");
1178                         goto again;
1179                 }
1180
1181                 /* Find the corresponding descriptor ring */
1182                 ring_id = msg.ring_id;
1183
1184                 if (unlikely(ring_id >= WIL6210_MAX_TX_RINGS)) {
1185                         wil_err(wil, "invalid ring id %d\n", ring_id);
1186                         goto again;
1187                 }
1188                 ring = &wil->ring_tx[ring_id];
1189                 if (unlikely(!ring->va)) {
1190                         wil_err(wil, "Tx irq[%d]: ring not initialized\n",
1191                                 ring_id);
1192                         goto again;
1193                 }
1194                 txdata = &wil->ring_tx_data[ring_id];
1195                 if (unlikely(!txdata->enabled)) {
1196                         wil_info(wil, "Tx irq[%d]: ring disabled\n", ring_id);
1197                         goto again;
1198                 }
1199                 vif = wil->vifs[txdata->mid];
1200                 if (unlikely(!vif)) {
1201                         wil_dbg_txrx(wil, "invalid MID %d for ring %d\n",
1202                                      txdata->mid, ring_id);
1203                         goto again;
1204                 }
1205
1206                 ndev = vif_to_ndev(vif);
1207
1208                 cid = wil->ring2cid_tid[ring_id][0];
1209                 stats = (cid < wil->max_assoc_sta) ? &wil->sta[cid].stats :
1210                                                      NULL;
1211
1212                 wil_dbg_txrx(wil,
1213                              "tx_status: completed desc_ring (%d), num_descs (%d)\n",
1214                              ring_id, num_descs);
1215
1216                 used_before_complete = wil_ring_used_tx(ring);
1217
1218                 for (i = 0 ; i < num_descs; ++i) {
1219                         struct wil_ctx *ctx = &ring->ctx[ring->swtail];
1220                         struct wil_tx_enhanced_desc dd, *d = &dd;
1221                         u16 dmalen;
1222                         struct sk_buff *skb = ctx->skb;
1223
1224                         _d = (struct wil_tx_enhanced_desc *)
1225                                 &ring->va[ring->swtail].tx.enhanced;
1226                         *d = *_d;
1227
1228                         dmalen = le16_to_cpu(d->dma.length);
1229                         trace_wil6210_tx_status(&msg, ring->swtail, dmalen);
1230                         wil_dbg_txrx(wil,
1231                                      "TxC[%2d][%3d] : %d bytes, status 0x%02x\n",
1232                                      ring_id, ring->swtail, dmalen,
1233                                      msg.status);
1234                         wil_hex_dump_txrx("TxS ", DUMP_PREFIX_NONE, 32, 4,
1235                                           (const void *)&msg, sizeof(msg),
1236                                           false);
1237
1238                         wil_tx_desc_unmap_edma(dev,
1239                                                (union wil_tx_desc *)d,
1240                                                ctx);
1241
1242                         if (skb) {
1243                                 if (likely(msg.status == 0)) {
1244                                         ndev->stats.tx_packets++;
1245                                         ndev->stats.tx_bytes += skb->len;
1246                                         if (stats) {
1247                                                 stats->tx_packets++;
1248                                                 stats->tx_bytes += skb->len;
1249
1250                                                 wil_tx_latency_calc(wil, skb,
1251                                                         &wil->sta[cid]);
1252                                         }
1253                                 } else {
1254                                         ndev->stats.tx_errors++;
1255                                         if (stats)
1256                                                 stats->tx_errors++;
1257                                 }
1258                                 wil_consume_skb(skb, msg.status == 0);
1259                         }
1260                         memset(ctx, 0, sizeof(*ctx));
1261                         /* Make sure the ctx is zeroed before updating the tail
1262                          * to prevent a case where wil_tx_ring will see
1263                          * this descriptor as used and handle it before ctx zero
1264                          * is completed.
1265                          */
1266                         wmb();
1267
1268                         ring->swtail = wil_ring_next_tail(ring);
1269
1270                         desc_cnt++;
1271                 }
1272
1273                 /* performance monitoring */
1274                 used_new = wil_ring_used_tx(ring);
1275                 if (wil_val_in_range(wil->ring_idle_trsh,
1276                                      used_new, used_before_complete)) {
1277                         wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n",
1278                                      ring_id, used_before_complete, used_new);
1279                         txdata->last_idle = get_cycles();
1280                 }
1281
1282 again:
1283                 num_statuses++;
1284                 if (num_statuses % WIL_EDMA_TX_SRING_UPDATE_HW_TAIL == 0)
1285                         /* update HW tail to allow HW to push new statuses */
1286                         wil_w(wil, sring->hwtail, sring->swhead);
1287
1288                 wil_sring_advance_swhead(sring);
1289
1290                 wil_get_next_tx_status_msg(sring, &msg);
1291                 dr_bit = msg.desc_ready >> TX_STATUS_DESC_READY_POS;
1292         }
1293
1294         /* shall we wake net queues? */
1295         if (desc_cnt)
1296                 wil_update_net_queues(wil, vif, NULL, false);
1297
1298         if (num_statuses % WIL_EDMA_TX_SRING_UPDATE_HW_TAIL != 0)
1299                 /* Update the HW tail ptr (RD ptr) */
1300                 wil_w(wil, sring->hwtail, (sring->swhead - 1) % sring->size);
1301
1302         return desc_cnt;
1303 }
1304
1305 /**
1306  * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding
1307  * @skb is used to obtain the protocol and headers length.
1308  * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data,
1309  * 2 - middle, 3 - last descriptor.
1310  */
1311 static void wil_tx_desc_offload_setup_tso_edma(struct wil_tx_enhanced_desc *d,
1312                                                int tso_desc_type, bool is_ipv4,
1313                                                int tcp_hdr_len,
1314                                                int skb_net_hdr_len,
1315                                                int mss)
1316 {
1317         /* Number of descriptors */
1318         d->mac.d[2] |= 1;
1319         /* Maximum Segment Size */
1320         d->mac.tso_mss |= cpu_to_le16(mss >> 2);
1321         /* L4 header len: TCP header length */
1322         d->dma.l4_hdr_len |= tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK;
1323         /* EOP, TSO desc type, Segmentation enable,
1324          * Insert IPv4 and TCP / UDP Checksum
1325          */
1326         d->dma.cmd |= BIT(WIL_EDMA_DESC_TX_CFG_EOP_POS) |
1327                       tso_desc_type << WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS |
1328                       BIT(WIL_EDMA_DESC_TX_CFG_SEG_EN_POS) |
1329                       BIT(WIL_EDMA_DESC_TX_CFG_INSERT_IP_CHKSUM_POS) |
1330                       BIT(WIL_EDMA_DESC_TX_CFG_INSERT_TCP_CHKSUM_POS);
1331         /* Calculate pseudo-header */
1332         d->dma.w1 |= BIT(WIL_EDMA_DESC_TX_CFG_PSEUDO_HEADER_CALC_EN_POS) |
1333                      BIT(WIL_EDMA_DESC_TX_CFG_L4_TYPE_POS);
1334         /* IP Header Length */
1335         d->dma.ip_length |= skb_net_hdr_len;
1336         /* MAC header length and IP address family*/
1337         d->dma.b11 |= ETH_HLEN |
1338                       is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS;
1339 }
1340
1341 static int wil_tx_tso_gen_desc(struct wil6210_priv *wil, void *buff_addr,
1342                                int len, uint i, int tso_desc_type,
1343                                skb_frag_t *frag, struct wil_ring *ring,
1344                                struct sk_buff *skb, bool is_ipv4,
1345                                int tcp_hdr_len, int skb_net_hdr_len,
1346                                int mss, int *descs_used)
1347 {
1348         struct device *dev = wil_to_dev(wil);
1349         struct wil_tx_enhanced_desc *_desc = (struct wil_tx_enhanced_desc *)
1350                 &ring->va[i].tx.enhanced;
1351         struct wil_tx_enhanced_desc desc_mem, *d = &desc_mem;
1352         int ring_index = ring - wil->ring_tx;
1353         dma_addr_t pa;
1354
1355         if (len == 0)
1356                 return 0;
1357
1358         if (!frag) {
1359                 pa = dma_map_single(dev, buff_addr, len, DMA_TO_DEVICE);
1360                 ring->ctx[i].mapped_as = wil_mapped_as_single;
1361         } else {
1362                 pa = skb_frag_dma_map(dev, frag, 0, len, DMA_TO_DEVICE);
1363                 ring->ctx[i].mapped_as = wil_mapped_as_page;
1364         }
1365         if (unlikely(dma_mapping_error(dev, pa))) {
1366                 wil_err(wil, "TSO: Skb DMA map error\n");
1367                 return -EINVAL;
1368         }
1369
1370         wil->txrx_ops.tx_desc_map((union wil_tx_desc *)d, pa,
1371                                    len, ring_index);
1372         wil_tx_desc_offload_setup_tso_edma(d, tso_desc_type, is_ipv4,
1373                                            tcp_hdr_len,
1374                                            skb_net_hdr_len, mss);
1375
1376         /* hold reference to skb
1377          * to prevent skb release before accounting
1378          * in case of immediate "tx done"
1379          */
1380         if (tso_desc_type == wil_tso_type_lst)
1381                 ring->ctx[i].skb = skb_get(skb);
1382
1383         wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
1384                           (const void *)d, sizeof(*d), false);
1385
1386         *_desc = *d;
1387         (*descs_used)++;
1388
1389         return 0;
1390 }
1391
1392 static int __wil_tx_ring_tso_edma(struct wil6210_priv *wil,
1393                                   struct wil6210_vif *vif,
1394                                   struct wil_ring *ring,
1395                                   struct sk_buff *skb)
1396 {
1397         int ring_index = ring - wil->ring_tx;
1398         struct wil_ring_tx_data *txdata = &wil->ring_tx_data[ring_index];
1399         int nr_frags = skb_shinfo(skb)->nr_frags;
1400         int min_desc_required = nr_frags + 2; /* Headers, Head, Fragments */
1401         int used, avail = wil_ring_avail_tx(ring);
1402         int f, hdrlen, headlen;
1403         int gso_type;
1404         bool is_ipv4;
1405         u32 swhead = ring->swhead;
1406         int descs_used = 0; /* total number of used descriptors */
1407         int rc = -EINVAL;
1408         int tcp_hdr_len;
1409         int skb_net_hdr_len;
1410         int mss = skb_shinfo(skb)->gso_size;
1411
1412         wil_dbg_txrx(wil, "tx_ring_tso: %d bytes to ring %d\n", skb->len,
1413                      ring_index);
1414
1415         if (unlikely(!txdata->enabled))
1416                 return -EINVAL;
1417
1418         if (unlikely(avail < min_desc_required)) {
1419                 wil_err_ratelimited(wil,
1420                                     "TSO: Tx ring[%2d] full. No space for %d fragments\n",
1421                                     ring_index, min_desc_required);
1422                 return -ENOMEM;
1423         }
1424
1425         gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4);
1426         switch (gso_type) {
1427         case SKB_GSO_TCPV4:
1428                 is_ipv4 = true;
1429                 break;
1430         case SKB_GSO_TCPV6:
1431                 is_ipv4 = false;
1432                 break;
1433         default:
1434                 return -EINVAL;
1435         }
1436
1437         if (skb->ip_summed != CHECKSUM_PARTIAL)
1438                 return -EINVAL;
1439
1440         /* tcp header length and skb network header length are fixed for all
1441          * packet's descriptors - read them once here
1442          */
1443         tcp_hdr_len = tcp_hdrlen(skb);
1444         skb_net_hdr_len = skb_network_header_len(skb);
1445
1446         /* First descriptor must contain the header only
1447          * Header Length = MAC header len + IP header len + TCP header len
1448          */
1449         hdrlen = ETH_HLEN + tcp_hdr_len + skb_net_hdr_len;
1450         wil_dbg_txrx(wil, "TSO: process header descriptor, hdrlen %u\n",
1451                      hdrlen);
1452         rc = wil_tx_tso_gen_desc(wil, skb->data, hdrlen, swhead,
1453                                  wil_tso_type_hdr, NULL, ring, skb,
1454                                  is_ipv4, tcp_hdr_len, skb_net_hdr_len,
1455                                  mss, &descs_used);
1456         if (rc)
1457                 return -EINVAL;
1458
1459         /* Second descriptor contains the head */
1460         headlen = skb_headlen(skb) - hdrlen;
1461         wil_dbg_txrx(wil, "TSO: process skb head, headlen %u\n", headlen);
1462         rc = wil_tx_tso_gen_desc(wil, skb->data + hdrlen, headlen,
1463                                  (swhead + descs_used) % ring->size,
1464                                  (nr_frags != 0) ? wil_tso_type_first :
1465                                  wil_tso_type_lst, NULL, ring, skb,
1466                                  is_ipv4, tcp_hdr_len, skb_net_hdr_len,
1467                                  mss, &descs_used);
1468         if (rc)
1469                 goto mem_error;
1470
1471         /* Rest of the descriptors are from the SKB fragments */
1472         for (f = 0; f < nr_frags; f++) {
1473                 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1474                 int len = frag->size;
1475
1476                 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u, descs_used %d\n", f,
1477                              len, descs_used);
1478
1479                 rc = wil_tx_tso_gen_desc(wil, NULL, len,
1480                                          (swhead + descs_used) % ring->size,
1481                                          (f != nr_frags - 1) ?
1482                                          wil_tso_type_mid : wil_tso_type_lst,
1483                                          frag, ring, skb, is_ipv4,
1484                                          tcp_hdr_len, skb_net_hdr_len,
1485                                          mss, &descs_used);
1486                 if (rc)
1487                         goto mem_error;
1488         }
1489
1490         /* performance monitoring */
1491         used = wil_ring_used_tx(ring);
1492         if (wil_val_in_range(wil->ring_idle_trsh,
1493                              used, used + descs_used)) {
1494                 txdata->idle += get_cycles() - txdata->last_idle;
1495                 wil_dbg_txrx(wil,  "Ring[%2d] not idle %d -> %d\n",
1496                              ring_index, used, used + descs_used);
1497         }
1498
1499         /* advance swhead */
1500         wil_ring_advance_head(ring, descs_used);
1501         wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, ring->swhead);
1502
1503         /* make sure all writes to descriptors (shared memory) are done before
1504          * committing them to HW
1505          */
1506         wmb();
1507
1508         if (wil->tx_latency)
1509                 *(ktime_t *)&skb->cb = ktime_get();
1510         else
1511                 memset(skb->cb, 0, sizeof(ktime_t));
1512
1513         wil_w(wil, ring->hwtail, ring->swhead);
1514
1515         return 0;
1516
1517 mem_error:
1518         while (descs_used > 0) {
1519                 struct device *dev = wil_to_dev(wil);
1520                 struct wil_ctx *ctx;
1521                 int i = (swhead + descs_used - 1) % ring->size;
1522                 struct wil_tx_enhanced_desc dd, *d = &dd;
1523                 struct wil_tx_enhanced_desc *_desc =
1524                         (struct wil_tx_enhanced_desc *)
1525                         &ring->va[i].tx.enhanced;
1526
1527                 *d = *_desc;
1528                 ctx = &ring->ctx[i];
1529                 wil_tx_desc_unmap_edma(dev, (union wil_tx_desc *)d, ctx);
1530                 memset(ctx, 0, sizeof(*ctx));
1531                 descs_used--;
1532         }
1533         return rc;
1534 }
1535
1536 static int wil_ring_init_bcast_edma(struct wil6210_vif *vif, int ring_id,
1537                                     int size)
1538 {
1539         struct wil6210_priv *wil = vif_to_wil(vif);
1540         struct wil_ring *ring = &wil->ring_tx[ring_id];
1541         int rc;
1542         struct wil_ring_tx_data *txdata = &wil->ring_tx_data[ring_id];
1543
1544         wil_dbg_misc(wil, "init bcast: ring_id=%d, sring_id=%d\n",
1545                      ring_id, wil->tx_sring_idx);
1546
1547         lockdep_assert_held(&wil->mutex);
1548
1549         wil_tx_data_init(txdata);
1550         ring->size = size;
1551         ring->is_rx = false;
1552         rc = wil_ring_alloc_desc_ring(wil, ring);
1553         if (rc)
1554                 goto out;
1555
1556         wil->ring2cid_tid[ring_id][0] = WIL6210_MAX_CID; /* CID */
1557         wil->ring2cid_tid[ring_id][1] = 0; /* TID */
1558         if (!vif->privacy)
1559                 txdata->dot1x_open = true;
1560
1561         rc = wil_wmi_bcast_desc_ring_add(vif, ring_id);
1562         if (rc)
1563                 goto out_free;
1564
1565         return 0;
1566
1567  out_free:
1568         spin_lock_bh(&txdata->lock);
1569         txdata->enabled = 0;
1570         txdata->dot1x_open = false;
1571         spin_unlock_bh(&txdata->lock);
1572         wil_ring_free_edma(wil, ring);
1573
1574 out:
1575         return rc;
1576 }
1577
1578 static void wil_tx_fini_edma(struct wil6210_priv *wil)
1579 {
1580         struct wil_status_ring *sring = &wil->srings[wil->tx_sring_idx];
1581
1582         wil_dbg_misc(wil, "free TX sring\n");
1583
1584         wil_sring_free(wil, sring);
1585 }
1586
1587 static void wil_rx_data_free(struct wil_status_ring *sring)
1588 {
1589         if (!sring)
1590                 return;
1591
1592         kfree_skb(sring->rx_data.skb);
1593         sring->rx_data.skb = NULL;
1594 }
1595
1596 static void wil_rx_fini_edma(struct wil6210_priv *wil)
1597 {
1598         struct wil_ring *ring = &wil->ring_rx;
1599         int i;
1600
1601         wil_dbg_misc(wil, "rx_fini_edma\n");
1602
1603         wil_ring_free_edma(wil, ring);
1604
1605         for (i = 0; i < wil->num_rx_status_rings; i++) {
1606                 wil_rx_data_free(&wil->srings[i]);
1607                 wil_sring_free(wil, &wil->srings[i]);
1608         }
1609
1610         wil_free_rx_buff_arr(wil);
1611 }
1612
1613 void wil_init_txrx_ops_edma(struct wil6210_priv *wil)
1614 {
1615         wil->txrx_ops.configure_interrupt_moderation =
1616                 wil_configure_interrupt_moderation_edma;
1617         /* TX ops */
1618         wil->txrx_ops.ring_init_tx = wil_ring_init_tx_edma;
1619         wil->txrx_ops.ring_fini_tx = wil_ring_free_edma;
1620         wil->txrx_ops.ring_init_bcast = wil_ring_init_bcast_edma;
1621         wil->txrx_ops.tx_init = wil_tx_init_edma;
1622         wil->txrx_ops.tx_fini = wil_tx_fini_edma;
1623         wil->txrx_ops.tx_desc_map = wil_tx_desc_map_edma;
1624         wil->txrx_ops.tx_desc_unmap = wil_tx_desc_unmap_edma;
1625         wil->txrx_ops.tx_ring_tso = __wil_tx_ring_tso_edma;
1626         wil->txrx_ops.tx_ring_modify = wil_tx_ring_modify_edma;
1627         /* RX ops */
1628         wil->txrx_ops.rx_init = wil_rx_init_edma;
1629         wil->txrx_ops.wmi_addba_rx_resp = wmi_addba_rx_resp_edma;
1630         wil->txrx_ops.get_reorder_params = wil_get_reorder_params_edma;
1631         wil->txrx_ops.get_netif_rx_params = wil_get_netif_rx_params_edma;
1632         wil->txrx_ops.rx_crypto_check = wil_rx_crypto_check_edma;
1633         wil->txrx_ops.rx_error_check = wil_rx_error_check_edma;
1634         wil->txrx_ops.is_rx_idle = wil_is_rx_idle_edma;
1635         wil->txrx_ops.rx_fini = wil_rx_fini_edma;
1636 }
1637