drivers/net/wireless/ath/ath6kl/init.c

   1
   2 /*
   3  * Copyright (c) 2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21 #include <linux/moduleparam.h>
  22 #include <linux/errno.h>
  23 #include <linux/export.h>
  24 #include <linux/of.h>
  25 #include <linux/mmc/sdio_func.h>
  26 #include <linux/vmalloc.h>
  27
  28 #include "core.h"
  29 #include "cfg80211.h"
  30 #include "target.h"
  31 #include "debug.h"
  32 #include "hif-ops.h"
  33 #include "htc-ops.h"
  34
  35 static const struct ath6kl_hw hw_list[] = {
  36         {
  37                 .id                             = AR6003_HW_2_0_VERSION,
  38                 .name                           = "ar6003 hw 2.0",
  39                 .dataset_patch_addr             = 0x57e884,
  40                 .app_load_addr                  = 0x543180,
  41                 .board_ext_data_addr            = 0x57e500,
  42                 .reserved_ram_size              = 6912,
  43                 .refclk_hz                      = 26000000,
  44                 .uarttx_pin                     = 8,
  45                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  46
  47                 /* hw2.0 needs override address hardcoded */
  48                 .app_start_override_addr        = 0x944C00,
  49
  50                 .fw = {
  51                         .dir            = AR6003_HW_2_0_FW_DIR,
  52                         .otp            = AR6003_HW_2_0_OTP_FILE,
  53                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  54                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  55                         .patch          = AR6003_HW_2_0_PATCH_FILE,
  56                 },
  57
  58                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  59                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  60         },
  61         {
  62                 .id                             = AR6003_HW_2_1_1_VERSION,
  63                 .name                           = "ar6003 hw 2.1.1",
  64                 .dataset_patch_addr             = 0x57ff74,
  65                 .app_load_addr                  = 0x1234,
  66                 .board_ext_data_addr            = 0x542330,
  67                 .reserved_ram_size              = 512,
  68                 .refclk_hz                      = 26000000,
  69                 .uarttx_pin                     = 8,
  70                 .testscript_addr                = 0x57ef74,
  71                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  72
  73                 .fw = {
  74                         .dir            = AR6003_HW_2_1_1_FW_DIR,
  75                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
  76                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  77                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  78                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  79                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  80                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  81                 },
  82
  83                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  84                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  85         },
  86         {
  87                 .id                             = AR6004_HW_1_0_VERSION,
  88                 .name                           = "ar6004 hw 1.0",
  89                 .dataset_patch_addr             = 0x57e884,
  90                 .app_load_addr                  = 0x1234,
  91                 .board_ext_data_addr            = 0x437000,
  92                 .reserved_ram_size              = 19456,
  93                 .board_addr                     = 0x433900,
  94                 .refclk_hz                      = 26000000,
  95                 .uarttx_pin                     = 11,
  96                 .flags                          = 0,
  97
  98                 .fw = {
  99                         .dir            = AR6004_HW_1_0_FW_DIR,
 100                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
 101                 },
 102
 103                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
 104                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
 105         },
 106         {
 107                 .id                             = AR6004_HW_1_1_VERSION,
 108                 .name                           = "ar6004 hw 1.1",
 109                 .dataset_patch_addr             = 0x57e884,
 110                 .app_load_addr                  = 0x1234,
 111                 .board_ext_data_addr            = 0x437000,
 112                 .reserved_ram_size              = 11264,
 113                 .board_addr                     = 0x43d400,
 114                 .refclk_hz                      = 40000000,
 115                 .uarttx_pin                     = 11,
 116                 .flags                          = 0,
 117                 .fw = {
 118                         .dir            = AR6004_HW_1_1_FW_DIR,
 119                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 120                 },
 121
 122                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 123                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 124         },
 125         {
 126                 .id                             = AR6004_HW_1_2_VERSION,
 127                 .name                           = "ar6004 hw 1.2",
 128                 .dataset_patch_addr             = 0x436ecc,
 129                 .app_load_addr                  = 0x1234,
 130                 .board_ext_data_addr            = 0x437000,
 131                 .reserved_ram_size              = 9216,
 132                 .board_addr                     = 0x435c00,
 133                 .refclk_hz                      = 40000000,
 134                 .uarttx_pin                     = 11,
 135                 .flags                          = 0,
 136
 137                 .fw = {
 138                         .dir            = AR6004_HW_1_2_FW_DIR,
 139                         .fw             = AR6004_HW_1_2_FIRMWARE_FILE,
 140                 },
 141                 .fw_board               = AR6004_HW_1_2_BOARD_DATA_FILE,
 142                 .fw_default_board       = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
 143         },
 144         {
 145                 .id                             = AR6004_HW_1_3_VERSION,
 146                 .name                           = "ar6004 hw 1.3",
 147                 .dataset_patch_addr             = 0x437860,
 148                 .app_load_addr                  = 0x1234,
 149                 .board_ext_data_addr            = 0x437000,
 150                 .reserved_ram_size              = 7168,
 151                 .board_addr                     = 0x436400,
 152                 .refclk_hz                      = 0,
 153                 .uarttx_pin                     = 11,
 154                 .flags                          = 0,
 155
 156                 .fw = {
 157                         .dir            = AR6004_HW_1_3_FW_DIR,
 158                         .fw             = AR6004_HW_1_3_FIRMWARE_FILE,
 159                         .tcmd           = AR6004_HW_1_3_TCMD_FIRMWARE_FILE,
 160                         .utf            = AR6004_HW_1_3_UTF_FIRMWARE_FILE,
 161                         .testscript     = AR6004_HW_1_3_TESTSCRIPT_FILE,
 162                 },
 163
 164                 .fw_board               = AR6004_HW_1_3_BOARD_DATA_FILE,
 165                 .fw_default_board       = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
 166         },
 167         {
 168                 .id                             = AR6004_HW_3_0_VERSION,
 169                 .name                           = "ar6004 hw 3.0",
 170                 .dataset_patch_addr             = 0,
 171                 .app_load_addr                  = 0x1234,
 172                 .board_ext_data_addr            = 0,
 173                 .reserved_ram_size              = 7168,
 174                 .board_addr                     = 0x436400,
 175                 .testscript_addr                = 0,
 176                 .uarttx_pin                     = 11,
 177                 .flags                          = 0,
 178
 179                 .fw = {
 180                         .dir            = AR6004_HW_3_0_FW_DIR,
 181                         .fw             = AR6004_HW_3_0_FIRMWARE_FILE,
 182                         .tcmd           = AR6004_HW_3_0_TCMD_FIRMWARE_FILE,
 183                         .utf            = AR6004_HW_3_0_UTF_FIRMWARE_FILE,
 184                         .testscript     = AR6004_HW_3_0_TESTSCRIPT_FILE,
 185                 },
 186
 187                 .fw_board               = AR6004_HW_3_0_BOARD_DATA_FILE,
 188                 .fw_default_board       = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE,
 189         },
 190 };
 191
 192 /*
 193  * Include definitions here that can be used to tune the WLAN module
 194  * behavior. Different customers can tune the behavior as per their needs,
 195  * here.
 196  */
 197
 198 /*
 199  * This configuration item enable/disable keepalive support.
 200  * Keepalive support: In the absence of any data traffic to AP, null
 201  * frames will be sent to the AP at periodic interval, to keep the association
 202  * active. This configuration item defines the periodic interval.
 203  * Use value of zero to disable keepalive support
 204  * Default: 60 seconds
 205  */
 206 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 207
 208 /*
 209  * This configuration item sets the value of disconnect timeout
 210  * Firmware delays sending the disconnec event to the host for this
 211  * timeout after is gets disconnected from the current AP.
 212  * If the firmware successly roams within the disconnect timeout
 213  * it sends a new connect event
 214  */
 215 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 216
 217
 218 #define ATH6KL_DATA_OFFSET    64
 219 struct sk_buff *ath6kl_buf_alloc(int size)
 220 {
 221         struct sk_buff *skb;
 222         u16 reserved;
 223
 224         /* Add chacheline space at front and back of buffer */
 225         reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 226                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
 227         skb = dev_alloc_skb(size + reserved);
 228
 229         if (skb)
 230                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
 231         return skb;
 232 }
 233
 234 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 235 {
 236         vif->ssid_len = 0;
 237         memset(vif->ssid, 0, sizeof(vif->ssid));
 238
 239         vif->dot11_auth_mode = OPEN_AUTH;
 240         vif->auth_mode = NONE_AUTH;
 241         vif->prwise_crypto = NONE_CRYPT;
 242         vif->prwise_crypto_len = 0;
 243         vif->grp_crypto = NONE_CRYPT;
 244         vif->grp_crypto_len = 0;
 245         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 246         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 247         memset(vif->bssid, 0, sizeof(vif->bssid));
 248         vif->bss_ch = 0;
 249 }
 250
 251 static int ath6kl_set_host_app_area(struct ath6kl *ar)
 252 {
 253         u32 address, data;
 254         struct host_app_area host_app_area;
 255
 256         /* Fetch the address of the host_app_area_s
 257          * instance in the host interest area */
 258         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 259         address = TARG_VTOP(ar->target_type, address);
 260
 261         if (ath6kl_diag_read32(ar, address, &data))
 262                 return -EIO;
 263
 264         address = TARG_VTOP(ar->target_type, data);
 265         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 266         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 267                               sizeof(struct host_app_area)))
 268                 return -EIO;
 269
 270         return 0;
 271 }
 272
 273 static inline void set_ac2_ep_map(struct ath6kl *ar,
 274                                   u8 ac,
 275                                   enum htc_endpoint_id ep)
 276 {
 277         ar->ac2ep_map[ac] = ep;
 278         ar->ep2ac_map[ep] = ac;
 279 }
 280
 281 /* connect to a service */
 282 static int ath6kl_connectservice(struct ath6kl *ar,
 283                                  struct htc_service_connect_req  *con_req,
 284                                  char *desc)
 285 {
 286         int status;
 287         struct htc_service_connect_resp response;
 288
 289         memset(&response, 0, sizeof(response));
 290
 291         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 292         if (status) {
 293                 ath6kl_err("failed to connect to %s service status:%d\n",
 294                            desc, status);
 295                 return status;
 296         }
 297
 298         switch (con_req->svc_id) {
 299         case WMI_CONTROL_SVC:
 300                 if (test_bit(WMI_ENABLED, &ar->flag))
 301                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 302                 ar->ctrl_ep = response.endpoint;
 303                 break;
 304         case WMI_DATA_BE_SVC:
 305                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 306                 break;
 307         case WMI_DATA_BK_SVC:
 308                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 309                 break;
 310         case WMI_DATA_VI_SVC:
 311                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 312                 break;
 313         case WMI_DATA_VO_SVC:
 314                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 315                 break;
 316         default:
 317                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 318                 return -EINVAL;
 319         }
 320
 321         return 0;
 322 }
 323
 324 static int ath6kl_init_service_ep(struct ath6kl *ar)
 325 {
 326         struct htc_service_connect_req connect;
 327
 328         memset(&connect, 0, sizeof(connect));
 329
 330         /* these fields are the same for all service endpoints */
 331         connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
 332         connect.ep_cb.rx = ath6kl_rx;
 333         connect.ep_cb.rx_refill = ath6kl_rx_refill;
 334         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 335
 336         /*
 337          * Set the max queue depth so that our ath6kl_tx_queue_full handler
 338          * gets called.
 339         */
 340         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 341         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 342         if (!connect.ep_cb.rx_refill_thresh)
 343                 connect.ep_cb.rx_refill_thresh++;
 344
 345         /* connect to control service */
 346         connect.svc_id = WMI_CONTROL_SVC;
 347         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 348                 return -EIO;
 349
 350         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 351
 352         /*
 353          * Limit the HTC message size on the send path, although e can
 354          * receive A-MSDU frames of 4K, we will only send ethernet-sized
 355          * (802.3) frames on the send path.
 356          */
 357         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 358
 359         /*
 360          * To reduce the amount of committed memory for larger A_MSDU
 361          * frames, use the recv-alloc threshold mechanism for larger
 362          * packets.
 363          */
 364         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 365         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 366
 367         /*
 368          * For the remaining data services set the connection flag to
 369          * reduce dribbling, if configured to do so.
 370          */
 371         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 372         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 373         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 374
 375         connect.svc_id = WMI_DATA_BE_SVC;
 376
 377         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 378                 return -EIO;
 379
 380         /* connect to back-ground map this to WMI LOW_PRI */
 381         connect.svc_id = WMI_DATA_BK_SVC;
 382         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 383                 return -EIO;
 384
 385         /* connect to Video service, map this to HI PRI */
 386         connect.svc_id = WMI_DATA_VI_SVC;
 387         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 388                 return -EIO;
 389
 390         /*
 391          * Connect to VO service, this is currently not mapped to a WMI
 392          * priority stream due to historical reasons. WMI originally
 393          * defined 3 priorities over 3 mailboxes We can change this when
 394          * WMI is reworked so that priorities are not dependent on
 395          * mailboxes.
 396          */
 397         connect.svc_id = WMI_DATA_VO_SVC;
 398         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 399                 return -EIO;
 400
 401         return 0;
 402 }
 403
 404 void ath6kl_init_control_info(struct ath6kl_vif *vif)
 405 {
 406         ath6kl_init_profile_info(vif);
 407         vif->def_txkey_index = 0;
 408         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 409         vif->ch_hint = 0;
 410 }
 411
 412 /*
 413  * Set HTC/Mbox operational parameters, this can only be called when the
 414  * target is in the BMI phase.
 415  */
 416 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 417                                  u8 htc_ctrl_buf)
 418 {
 419         int status;
 420         u32 blk_size;
 421
 422         blk_size = ar->mbox_info.block_size;
 423
 424         if (htc_ctrl_buf)
 425                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
 426
 427         /* set the host interest area for the block size */
 428         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
 429         if (status) {
 430                 ath6kl_err("bmi_write_memory for IO block size failed\n");
 431                 goto out;
 432         }
 433
 434         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 435                    blk_size,
 436                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 437
 438         if (mbox_isr_yield_val) {
 439                 /* set the host interest area for the mbox ISR yield limit */
 440                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
 441                                                mbox_isr_yield_val);
 442                 if (status) {
 443                         ath6kl_err("bmi_write_memory for yield limit failed\n");
 444                         goto out;
 445                 }
 446         }
 447
 448 out:
 449         return status;
 450 }
 451
 452 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 453 {
 454         int ret;
 455
 456         /*
 457          * Configure the device for rx dot11 header rules. "0,0" are the
 458          * default values. Required if checksum offload is needed. Set
 459          * RxMetaVersion to 2.
 460          */
 461         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 462                                                  ar->rx_meta_ver, 0, 0);
 463         if (ret) {
 464                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
 465                 return ret;
 466         }
 467
 468         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
 469                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 470                                               IGNORE_PS_FAIL_DURING_SCAN);
 471                 if (ret) {
 472                         ath6kl_err("unable to set power save fail event policy: %d\n",
 473                                    ret);
 474                         return ret;
 475                 }
 476         }
 477
 478         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
 479                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 480                                                    WMI_FOLLOW_BARKER_IN_ERP);
 481                 if (ret) {
 482                         ath6kl_err("unable to set barker preamble policy: %d\n",
 483                                    ret);
 484                         return ret;
 485                 }
 486         }
 487
 488         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 489                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
 490         if (ret) {
 491                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
 492                 return ret;
 493         }
 494
 495         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 496                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
 497         if (ret) {
 498                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
 499                 return ret;
 500         }
 501
 502         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
 503                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
 504                 if (ret) {
 505                         ath6kl_err("unable to set txop bursting: %d\n", ret);
 506                         return ret;
 507                 }
 508         }
 509
 510         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 511                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 512                                               P2P_FLAG_CAPABILITIES_REQ |
 513                                               P2P_FLAG_MACADDR_REQ |
 514                                               P2P_FLAG_HMODEL_REQ);
 515                 if (ret) {
 516                         ath6kl_dbg(ATH6KL_DBG_TRC,
 517                                    "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
 518                                    ret);
 519                         ar->p2p = false;
 520                 }
 521         }
 522
 523         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 524                 /* Enable Probe Request reporting for P2P */
 525                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 526                 if (ret) {
 527                         ath6kl_dbg(ATH6KL_DBG_TRC,
 528                                    "failed to enable Probe Request reporting (%d)\n",
 529                                    ret);
 530                 }
 531         }
 532
 533         return ret;
 534 }
 535
 536 int ath6kl_configure_target(struct ath6kl *ar)
 537 {
 538         u32 param, ram_reserved_size;
 539         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 540         int i, status;
 541
 542         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 543         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
 544                 ath6kl_err("bmi_write_memory for uart debug failed\n");
 545                 return -EIO;
 546         }
 547
 548         /*
 549          * Note: Even though the firmware interface type is
 550          * chosen as BSS_STA for all three interfaces, can
 551          * be configured to IBSS/AP as long as the fw submode
 552          * remains normal mode (0 - AP, STA and IBSS). But
 553          * due to an target assert in firmware only one interface is
 554          * configured for now.
 555          */
 556         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 557
 558         for (i = 0; i < ar->vif_max; i++)
 559                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 560
 561         /*
 562          * Submodes when fw does not support dynamic interface
 563          * switching:
 564          *              vif[0] - AP/STA/IBSS
 565          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 566          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 567          * Otherwise, All the interface are initialized to p2p dev.
 568          */
 569
 570         if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
 571                      ar->fw_capabilities)) {
 572                 for (i = 0; i < ar->vif_max; i++)
 573                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 574                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 575         } else {
 576                 for (i = 0; i < ar->max_norm_iface; i++)
 577                         fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 578                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 579
 580                 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 581                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 582                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 583
 584                 if (ar->p2p && ar->vif_max == 1)
 585                         fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 586         }
 587
 588         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
 589                                   HTC_PROTOCOL_VERSION) != 0) {
 590                 ath6kl_err("bmi_write_memory for htc version failed\n");
 591                 return -EIO;
 592         }
 593
 594         /* set the firmware mode to STA/IBSS/AP */
 595         param = 0;
 596
 597         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
 598                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 599                 return -EIO;
 600         }
 601
 602         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 603         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 604         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 605
 606         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 607         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 608
 609         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
 610                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 611                 return -EIO;
 612         }
 613
 614         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 615
 616         /*
 617          * Hardcode the address use for the extended board data
 618          * Ideally this should be pre-allocate by the OS at boot time
 619          * But since it is a new feature and board data is loaded
 620          * at init time, we have to workaround this from host.
 621          * It is difficult to patch the firmware boot code,
 622          * but possible in theory.
 623          */
 624
 625         if ((ar->target_type == TARGET_TYPE_AR6003) ||
 626             (ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
 627             (ar->version.target_ver == AR6004_HW_3_0_VERSION)) {
 628                 param = ar->hw.board_ext_data_addr;
 629                 ram_reserved_size = ar->hw.reserved_ram_size;
 630
 631                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
 632                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 633                         return -EIO;
 634                 }
 635
 636                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
 637                                           ram_reserved_size) != 0) {
 638                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 639                         return -EIO;
 640                 }
 641         }
 642
 643         /* set the block size for the target */
 644         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 645                 /* use default number of control buffers */
 646                 return -EIO;
 647
 648         /* Configure GPIO AR600x UART */
 649         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
 650                                        ar->hw.uarttx_pin);
 651         if (status)
 652                 return status;
 653
 654         /* Only set the baud rate if we're actually doing debug */
 655         if (ar->conf_flags & ATH6KL_CONF_UART_DEBUG) {
 656                 status = ath6kl_bmi_write_hi32(ar, hi_desired_baud_rate,
 657                                                ar->hw.uarttx_rate);
 658                 if (status)
 659                         return status;
 660         }
 661
 662         /* Configure target refclk_hz */
 663         if (ar->hw.refclk_hz != 0) {
 664                 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
 665                                                ar->hw.refclk_hz);
 666                 if (status)
 667                         return status;
 668         }
 669
 670         return 0;
 671 }
 672
 673 /* firmware upload */
 674 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 675                          u8 **fw, size_t *fw_len)
 676 {
 677         const struct firmware *fw_entry;
 678         int ret;
 679
 680         ret = reject_firmware(&fw_entry, filename, ar->dev);
 681         if (ret)
 682                 return ret;
 683
 684         *fw_len = fw_entry->size;
 685         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 686
 687         if (*fw == NULL)
 688                 ret = -ENOMEM;
 689
 690         release_firmware(fw_entry);
 691
 692         return ret;
 693 }
 694
 695 #ifdef CONFIG_OF
 696 /*
 697  * Check the device tree for a board-id and use it to construct
 698  * the pathname to the firmware file.  /*(DEBLOBBED)*/
 699 static bool check_device_tree(struct ath6kl *ar)
 700 {
 701         static const char *board_id_prop = "atheros,board-id";
 702         struct device_node *node;
 703         char board_filename[64];
 704         const char *board_id;
 705         int ret;
 706
 707         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 708                 board_id = of_get_property(node, board_id_prop, NULL);
 709                 if (board_id == NULL) {
 710                         ath6kl_warn("No \"%s\" property on %pOFn node.\n",
 711                                     board_id_prop, node);
 712                         continue;
 713                 }
 714                 snprintf(board_filename, sizeof(board_filename),
 715                          "/*(DEBLOBBED)*/", ar->hw.fw.dir, board_id);
 716
 717                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 718                                     &ar->fw_board_len);
 719                 if (ret) {
 720                         ath6kl_err("Failed to get DT board file %s: %d\n",
 721                                    board_filename, ret);
 722                         continue;
 723                 }
 724                 of_node_put(node);
 725                 return true;
 726         }
 727         return false;
 728 }
 729 #else
 730 static bool check_device_tree(struct ath6kl *ar)
 731 {
 732         return false;
 733 }
 734 #endif /* CONFIG_OF */
 735
 736 static int ath6kl_fetch_board_file(struct ath6kl *ar)
 737 {
 738         const char *filename;
 739         int ret;
 740
 741         if (ar->fw_board != NULL)
 742                 return 0;
 743
 744         if (WARN_ON(ar->hw.fw_board == NULL))
 745                 return -EINVAL;
 746
 747         filename = ar->hw.fw_board;
 748
 749         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 750                             &ar->fw_board_len);
 751         if (ret == 0) {
 752                 /* managed to get proper board file */
 753                 return 0;
 754         }
 755
 756         if (check_device_tree(ar)) {
 757                 /* got board file from device tree */
 758                 return 0;
 759         }
 760
 761         /* there was no proper board file, try to use default instead */
 762         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 763                     filename, ret);
 764
 765         filename = ar->hw.fw_default_board;
 766
 767         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 768                             &ar->fw_board_len);
 769         if (ret) {
 770                 ath6kl_err("Failed to get default board file %s: %d\n",
 771                            filename, ret);
 772                 return ret;
 773         }
 774
 775         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 776         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 777
 778         return 0;
 779 }
 780
 781 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 782 {
 783         char filename[100];
 784         int ret;
 785
 786         if (ar->fw_otp != NULL)
 787                 return 0;
 788
 789         if (ar->hw.fw.otp == NULL) {
 790                 ath6kl_dbg(ATH6KL_DBG_BOOT,
 791                            "no OTP file configured for this hw\n");
 792                 return 0;
 793         }
 794
 795         snprintf(filename, sizeof(filename), "%s/%s",
 796                  ar->hw.fw.dir, ar->hw.fw.otp);
 797
 798         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 799                             &ar->fw_otp_len);
 800         if (ret) {
 801                 ath6kl_err("Failed to get OTP file %s: %d\n",
 802                            filename, ret);
 803                 return ret;
 804         }
 805
 806         return 0;
 807 }
 808
 809 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
 810 {
 811         char filename[100];
 812         int ret;
 813
 814         if (ar->testmode == 0)
 815                 return 0;
 816
 817         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
 818
 819         if (ar->testmode == 2) {
 820                 if (ar->hw.fw.utf == NULL) {
 821                         ath6kl_warn("testmode 2 not supported\n");
 822                         return -EOPNOTSUPP;
 823                 }
 824
 825                 snprintf(filename, sizeof(filename), "%s/%s",
 826                          ar->hw.fw.dir, ar->hw.fw.utf);
 827         } else {
 828                 if (ar->hw.fw.tcmd == NULL) {
 829                         ath6kl_warn("testmode 1 not supported\n");
 830                         return -EOPNOTSUPP;
 831                 }
 832
 833                 snprintf(filename, sizeof(filename), "%s/%s",
 834                          ar->hw.fw.dir, ar->hw.fw.tcmd);
 835         }
 836
 837         set_bit(TESTMODE, &ar->flag);
 838
 839         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 840         if (ret) {
 841                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
 842                            ar->testmode, filename, ret);
 843                 return ret;
 844         }
 845
 846         return 0;
 847 }
 848
 849 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 850 {
 851         char filename[100];
 852         int ret;
 853
 854         if (ar->fw != NULL)
 855                 return 0;
 856
 857         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 858         if (WARN_ON(ar->hw.fw.fw == NULL))
 859                 return -EINVAL;
 860
 861         snprintf(filename, sizeof(filename), "%s/%s",
 862                  ar->hw.fw.dir, ar->hw.fw.fw);
 863
 864         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 865         if (ret) {
 866                 ath6kl_err("Failed to get firmware file %s: %d\n",
 867                            filename, ret);
 868                 return ret;
 869         }
 870
 871         return 0;
 872 }
 873
 874 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 875 {
 876         char filename[100];
 877         int ret;
 878
 879         if (ar->fw_patch != NULL)
 880                 return 0;
 881
 882         if (ar->hw.fw.patch == NULL)
 883                 return 0;
 884
 885         snprintf(filename, sizeof(filename), "%s/%s",
 886                  ar->hw.fw.dir, ar->hw.fw.patch);
 887
 888         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 889                             &ar->fw_patch_len);
 890         if (ret) {
 891                 ath6kl_err("Failed to get patch file %s: %d\n",
 892                            filename, ret);
 893                 return ret;
 894         }
 895
 896         return 0;
 897 }
 898
 899 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 900 {
 901         char filename[100];
 902         int ret;
 903
 904         if (ar->testmode != 2)
 905                 return 0;
 906
 907         if (ar->fw_testscript != NULL)
 908                 return 0;
 909
 910         if (ar->hw.fw.testscript == NULL)
 911                 return 0;
 912
 913         snprintf(filename, sizeof(filename), "%s/%s",
 914                  ar->hw.fw.dir, ar->hw.fw.testscript);
 915
 916         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 917                                 &ar->fw_testscript_len);
 918         if (ret) {
 919                 ath6kl_err("Failed to get testscript file %s: %d\n",
 920                            filename, ret);
 921                 return ret;
 922         }
 923
 924         return 0;
 925 }
 926
 927 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 928 {
 929         int ret;
 930
 931         ret = ath6kl_fetch_otp_file(ar);
 932         if (ret)
 933                 return ret;
 934
 935         ret = ath6kl_fetch_fw_file(ar);
 936         if (ret)
 937                 return ret;
 938
 939         ret = ath6kl_fetch_patch_file(ar);
 940         if (ret)
 941                 return ret;
 942
 943         ret = ath6kl_fetch_testscript_file(ar);
 944         if (ret)
 945                 return ret;
 946
 947         return 0;
 948 }
 949
 950 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 951 {
 952         size_t magic_len, len, ie_len;
 953         const struct firmware *fw;
 954         struct ath6kl_fw_ie *hdr;
 955         char filename[100];
 956         const u8 *data;
 957         int ret, ie_id, i, index, bit;
 958         __le32 *val;
 959
 960         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 961
 962         ret = reject_firmware(&fw, filename, ar->dev);
 963         if (ret) {
 964                 ath6kl_err("Failed request firmware, rv: %d\n", ret);
 965                 return ret;
 966         }
 967
 968         data = fw->data;
 969         len = fw->size;
 970
 971         /* magic also includes the null byte, check that as well */
 972         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 973
 974         if (len < magic_len) {
 975                 ath6kl_err("Magic length is invalid, len: %zd  magic_len: %zd\n",
 976                            len, magic_len);
 977                 ret = -EINVAL;
 978                 goto out;
 979         }
 980
 981         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 982                 ath6kl_err("Magic is invalid, magic_len: %zd\n",
 983                            magic_len);
 984                 ret = -EINVAL;
 985                 goto out;
 986         }
 987
 988         len -= magic_len;
 989         data += magic_len;
 990
 991         /* loop elements */
 992         while (len > sizeof(struct ath6kl_fw_ie)) {
 993                 /* hdr is unaligned! */
 994                 hdr = (struct ath6kl_fw_ie *) data;
 995
 996                 ie_id = le32_to_cpup(&hdr->id);
 997                 ie_len = le32_to_cpup(&hdr->len);
 998
 999                 len -= sizeof(*hdr);
1000                 data += sizeof(*hdr);
1001
1002                 ath6kl_dbg(ATH6KL_DBG_BOOT, "ie-id: %d  len: %zd (0x%zx)\n",
1003                            ie_id, ie_len, ie_len);
1004
1005                 if (len < ie_len) {
1006                         ath6kl_err("IE len is invalid, len: %zd  ie_len: %zd  ie-id: %d\n",
1007                                    len, ie_len, ie_id);
1008                         ret = -EINVAL;
1009                         goto out;
1010                 }
1011
1012                 switch (ie_id) {
1013                 case ATH6KL_FW_IE_FW_VERSION:
1014                         strlcpy(ar->wiphy->fw_version, data,
1015                                 min(sizeof(ar->wiphy->fw_version), ie_len+1));
1016
1017                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1018                                    "found fw version %s\n",
1019                                     ar->wiphy->fw_version);
1020                         break;
1021                 case ATH6KL_FW_IE_OTP_IMAGE:
1022                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
1023                                    ie_len);
1024
1025                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
1026
1027                         if (ar->fw_otp == NULL) {
1028                                 ath6kl_err("fw_otp cannot be allocated\n");
1029                                 ret = -ENOMEM;
1030                                 goto out;
1031                         }
1032
1033                         ar->fw_otp_len = ie_len;
1034                         break;
1035                 case ATH6KL_FW_IE_FW_IMAGE:
1036                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
1037                                    ie_len);
1038
1039                         /* in testmode we already might have a fw file */
1040                         if (ar->fw != NULL)
1041                                 break;
1042
1043                         ar->fw = vmalloc(ie_len);
1044
1045                         if (ar->fw == NULL) {
1046                                 ath6kl_err("fw storage cannot be allocated, len: %zd\n", ie_len);
1047                                 ret = -ENOMEM;
1048                                 goto out;
1049                         }
1050
1051                         memcpy(ar->fw, data, ie_len);
1052                         ar->fw_len = ie_len;
1053                         break;
1054                 case ATH6KL_FW_IE_PATCH_IMAGE:
1055                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1056                                    ie_len);
1057
1058                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1059
1060                         if (ar->fw_patch == NULL) {
1061                                 ath6kl_err("fw_patch storage cannot be allocated, len: %zd\n", ie_len);
1062                                 ret = -ENOMEM;
1063                                 goto out;
1064                         }
1065
1066                         ar->fw_patch_len = ie_len;
1067                         break;
1068                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1069                         val = (__le32 *) data;
1070                         ar->hw.reserved_ram_size = le32_to_cpup(val);
1071
1072                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1073                                    "found reserved ram size ie %d\n",
1074                                    ar->hw.reserved_ram_size);
1075                         break;
1076                 case ATH6KL_FW_IE_CAPABILITIES:
1077                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1078                                    "found firmware capabilities ie (%zd B)\n",
1079                                    ie_len);
1080
1081                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1082                                 index = i / 8;
1083                                 bit = i % 8;
1084
1085                                 if (index == ie_len)
1086                                         break;
1087
1088                                 if (data[index] & (1 << bit))
1089                                         __set_bit(i, ar->fw_capabilities);
1090                         }
1091
1092                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1093                                         ar->fw_capabilities,
1094                                         sizeof(ar->fw_capabilities));
1095                         break;
1096                 case ATH6KL_FW_IE_PATCH_ADDR:
1097                         if (ie_len != sizeof(*val))
1098                                 break;
1099
1100                         val = (__le32 *) data;
1101                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
1102
1103                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1104                                    "found patch address ie 0x%x\n",
1105                                    ar->hw.dataset_patch_addr);
1106                         break;
1107                 case ATH6KL_FW_IE_BOARD_ADDR:
1108                         if (ie_len != sizeof(*val))
1109                                 break;
1110
1111                         val = (__le32 *) data;
1112                         ar->hw.board_addr = le32_to_cpup(val);
1113
1114                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1115                                    "found board address ie 0x%x\n",
1116                                    ar->hw.board_addr);
1117                         break;
1118                 case ATH6KL_FW_IE_VIF_MAX:
1119                         if (ie_len != sizeof(*val))
1120                                 break;
1121
1122                         val = (__le32 *) data;
1123                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1124                                             ATH6KL_VIF_MAX);
1125
1126                         if (ar->vif_max > 1 && !ar->p2p)
1127                                 ar->max_norm_iface = 2;
1128
1129                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1130                                    "found vif max ie %d\n", ar->vif_max);
1131                         break;
1132                 default:
1133                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1134                                    le32_to_cpup(&hdr->id));
1135                         break;
1136                 }
1137
1138                 len -= ie_len;
1139                 data += ie_len;
1140         }
1141
1142         ret = 0;
1143 out:
1144         release_firmware(fw);
1145
1146         return ret;
1147 }
1148
1149 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1150 {
1151         int ret;
1152
1153         ret = ath6kl_fetch_board_file(ar);
1154         if (ret)
1155                 return ret;
1156
1157         ret = ath6kl_fetch_testmode_file(ar);
1158         if (ret)
1159                 return ret;
1160
1161         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE);
1162         if (ret == 0) {
1163                 ar->fw_api = 5;
1164                 goto out;
1165         }
1166
1167         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1168         if (ret == 0) {
1169                 ar->fw_api = 4;
1170                 goto out;
1171         }
1172
1173         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1174         if (ret == 0) {
1175                 ar->fw_api = 3;
1176                 goto out;
1177         }
1178
1179         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1180         if (ret == 0) {
1181                 ar->fw_api = 2;
1182                 goto out;
1183         }
1184
1185         ret = ath6kl_fetch_fw_api1(ar);
1186         if (ret)
1187                 return ret;
1188
1189         ar->fw_api = 1;
1190
1191 out:
1192         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1193
1194         return 0;
1195 }
1196
1197 static int ath6kl_upload_board_file(struct ath6kl *ar)
1198 {
1199         u32 board_address, board_ext_address, param;
1200         u32 board_data_size, board_ext_data_size;
1201         int ret;
1202
1203         if (WARN_ON(ar->fw_board == NULL))
1204                 return -ENOENT;
1205
1206         /*
1207          * Determine where in Target RAM to write Board Data.
1208          * For AR6004, host determine Target RAM address for
1209          * writing board data.
1210          */
1211         if (ar->hw.board_addr != 0) {
1212                 board_address = ar->hw.board_addr;
1213                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1214                                       board_address);
1215         } else {
1216                 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1217                 if (ret) {
1218                         ath6kl_err("Failed to get board file target address.\n");
1219                         return ret;
1220                 }
1221         }
1222
1223         /* determine where in target ram to write extended board data */
1224         ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1225         if (ret) {
1226                 ath6kl_err("Failed to get extended board file target address.\n");
1227                 return ret;
1228         }
1229
1230         if (ar->target_type == TARGET_TYPE_AR6003 &&
1231             board_ext_address == 0) {
1232                 ath6kl_err("Failed to get board file target address.\n");
1233                 return -EINVAL;
1234         }
1235
1236         switch (ar->target_type) {
1237         case TARGET_TYPE_AR6003:
1238                 board_data_size = AR6003_BOARD_DATA_SZ;
1239                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1240                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1241                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1242                 break;
1243         case TARGET_TYPE_AR6004:
1244                 board_data_size = AR6004_BOARD_DATA_SZ;
1245                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1246                 break;
1247         default:
1248                 WARN_ON(1);
1249                 return -EINVAL;
1250         }
1251
1252         if (board_ext_address &&
1253             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1254                 /* write extended board data */
1255                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1256                            "writing extended board data to 0x%x (%d B)\n",
1257                            board_ext_address, board_ext_data_size);
1258
1259                 ret = ath6kl_bmi_write(ar, board_ext_address,
1260                                        ar->fw_board + board_data_size,
1261                                        board_ext_data_size);
1262                 if (ret) {
1263                         ath6kl_err("Failed to write extended board data: %d\n",
1264                                    ret);
1265                         return ret;
1266                 }
1267
1268                 /* record that extended board data is initialized */
1269                 param = (board_ext_data_size << 16) | 1;
1270
1271                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1272         }
1273
1274         if (ar->fw_board_len < board_data_size) {
1275                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1276                 ret = -EINVAL;
1277                 return ret;
1278         }
1279
1280         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1281                    board_address, board_data_size);
1282
1283         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1284                                board_data_size);
1285
1286         if (ret) {
1287                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1288                 return ret;
1289         }
1290
1291         /* record the fact that Board Data IS initialized */
1292         if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
1293             (ar->version.target_ver == AR6004_HW_3_0_VERSION))
1294                 param = board_data_size;
1295         else
1296                 param = 1;
1297
1298         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
1299
1300         return ret;
1301 }
1302
1303 static int ath6kl_upload_otp(struct ath6kl *ar)
1304 {
1305         u32 address, param;
1306         bool from_hw = false;
1307         int ret;
1308
1309         if (ar->fw_otp == NULL)
1310                 return 0;
1311
1312         address = ar->hw.app_load_addr;
1313
1314         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1315                    ar->fw_otp_len);
1316
1317         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1318                                        ar->fw_otp_len);
1319         if (ret) {
1320                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1321                 return ret;
1322         }
1323
1324         /* read firmware start address */
1325         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1326
1327         if (ret) {
1328                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1329                 return ret;
1330         }
1331
1332         if (ar->hw.app_start_override_addr == 0) {
1333                 ar->hw.app_start_override_addr = address;
1334                 from_hw = true;
1335         }
1336
1337         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1338                    from_hw ? " (from hw)" : "",
1339                    ar->hw.app_start_override_addr);
1340
1341         /* execute the OTP code */
1342         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1343                    ar->hw.app_start_override_addr);
1344         param = 0;
1345         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1346
1347         return ret;
1348 }
1349
1350 static int ath6kl_upload_firmware(struct ath6kl *ar)
1351 {
1352         u32 address;
1353         int ret;
1354
1355         if (WARN_ON(ar->fw == NULL))
1356                 return 0;
1357
1358         address = ar->hw.app_load_addr;
1359
1360         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1361                    address, ar->fw_len);
1362
1363         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1364
1365         if (ret) {
1366                 ath6kl_err("Failed to write firmware: %d\n", ret);
1367                 return ret;
1368         }
1369
1370         /*
1371          * Set starting address for firmware
1372          * Don't need to setup app_start override addr on AR6004
1373          */
1374         if (ar->target_type != TARGET_TYPE_AR6004) {
1375                 address = ar->hw.app_start_override_addr;
1376                 ath6kl_bmi_set_app_start(ar, address);
1377         }
1378         return ret;
1379 }
1380
1381 static int ath6kl_upload_patch(struct ath6kl *ar)
1382 {
1383         u32 address;
1384         int ret;
1385
1386         if (ar->fw_patch == NULL)
1387                 return 0;
1388
1389         address = ar->hw.dataset_patch_addr;
1390
1391         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1392                    address, ar->fw_patch_len);
1393
1394         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1395         if (ret) {
1396                 ath6kl_err("Failed to write patch file: %d\n", ret);
1397                 return ret;
1398         }
1399
1400         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1401
1402         return 0;
1403 }
1404
1405 static int ath6kl_upload_testscript(struct ath6kl *ar)
1406 {
1407         u32 address;
1408         int ret;
1409
1410         if (ar->testmode != 2)
1411                 return 0;
1412
1413         if (ar->fw_testscript == NULL)
1414                 return 0;
1415
1416         address = ar->hw.testscript_addr;
1417
1418         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1419                    address, ar->fw_testscript_len);
1420
1421         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1422                 ar->fw_testscript_len);
1423         if (ret) {
1424                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1425                 return ret;
1426         }
1427
1428         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1429
1430         if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) &&
1431             (ar->version.target_ver != AR6004_HW_3_0_VERSION))
1432                 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1433
1434         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1435
1436         return 0;
1437 }
1438
1439 static int ath6kl_init_upload(struct ath6kl *ar)
1440 {
1441         u32 param, options, sleep, address;
1442         int status = 0;
1443
1444         if (ar->target_type != TARGET_TYPE_AR6003 &&
1445             ar->target_type != TARGET_TYPE_AR6004)
1446                 return -EINVAL;
1447
1448         /* temporarily disable system sleep */
1449         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1450         status = ath6kl_bmi_reg_read(ar, address, &param);
1451         if (status)
1452                 return status;
1453
1454         options = param;
1455
1456         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1457         status = ath6kl_bmi_reg_write(ar, address, param);
1458         if (status)
1459                 return status;
1460
1461         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1462         status = ath6kl_bmi_reg_read(ar, address, &param);
1463         if (status)
1464                 return status;
1465
1466         sleep = param;
1467
1468         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1469         status = ath6kl_bmi_reg_write(ar, address, param);
1470         if (status)
1471                 return status;
1472
1473         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1474                    options, sleep);
1475
1476         /* program analog PLL register */
1477         /* no need to control 40/44MHz clock on AR6004 */
1478         if (ar->target_type != TARGET_TYPE_AR6004) {
1479                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1480                                               0xF9104001);
1481
1482                 if (status)
1483                         return status;
1484
1485                 /* Run at 80/88MHz by default */
1486                 param = SM(CPU_CLOCK_STANDARD, 1);
1487
1488                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1489                 status = ath6kl_bmi_reg_write(ar, address, param);
1490                 if (status)
1491                         return status;
1492         }
1493
1494         param = 0;
1495         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1496         param = SM(LPO_CAL_ENABLE, 1);
1497         status = ath6kl_bmi_reg_write(ar, address, param);
1498         if (status)
1499                 return status;
1500
1501         /* WAR to avoid SDIO CRC err */
1502         if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1503                 ath6kl_err("temporary war to avoid sdio crc error\n");
1504
1505                 param = 0x28;
1506                 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1507                 status = ath6kl_bmi_reg_write(ar, address, param);
1508                 if (status)
1509                         return status;
1510
1511                 param = 0x20;
1512
1513                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1514                 status = ath6kl_bmi_reg_write(ar, address, param);
1515                 if (status)
1516                         return status;
1517
1518                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1519                 status = ath6kl_bmi_reg_write(ar, address, param);
1520                 if (status)
1521                         return status;
1522
1523                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1524                 status = ath6kl_bmi_reg_write(ar, address, param);
1525                 if (status)
1526                         return status;
1527
1528                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1529                 status = ath6kl_bmi_reg_write(ar, address, param);
1530                 if (status)
1531                         return status;
1532         }
1533
1534         /* write EEPROM data to Target RAM */
1535         status = ath6kl_upload_board_file(ar);
1536         if (status)
1537                 return status;
1538
1539         /* transfer One time Programmable data */
1540         status = ath6kl_upload_otp(ar);
1541         if (status)
1542                 return status;
1543
1544         /* Download Target firmware */
1545         status = ath6kl_upload_firmware(ar);
1546         if (status)
1547                 return status;
1548
1549         status = ath6kl_upload_patch(ar);
1550         if (status)
1551                 return status;
1552
1553         /* Download the test script */
1554         status = ath6kl_upload_testscript(ar);
1555         if (status)
1556                 return status;
1557
1558         /* Restore system sleep */
1559         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1560         status = ath6kl_bmi_reg_write(ar, address, sleep);
1561         if (status)
1562                 return status;
1563
1564         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1565         param = options | 0x20;
1566         status = ath6kl_bmi_reg_write(ar, address, param);
1567         if (status)
1568                 return status;
1569
1570         return status;
1571 }
1572
1573 int ath6kl_init_hw_params(struct ath6kl *ar)
1574 {
1575         const struct ath6kl_hw *uninitialized_var(hw);
1576         int i;
1577
1578         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1579                 hw = &hw_list[i];
1580
1581                 if (hw->id == ar->version.target_ver)
1582                         break;
1583         }
1584
1585         if (i == ARRAY_SIZE(hw_list)) {
1586                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1587                            ar->version.target_ver);
1588                 return -EINVAL;
1589         }
1590
1591         ar->hw = *hw;
1592
1593         ath6kl_dbg(ATH6KL_DBG_BOOT,
1594                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1595                    ar->version.target_ver, ar->target_type,
1596                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1597         ath6kl_dbg(ATH6KL_DBG_BOOT,
1598                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1599                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1600                    ar->hw.reserved_ram_size);
1601         ath6kl_dbg(ATH6KL_DBG_BOOT,
1602                    "refclk_hz %d uarttx_pin %d",
1603                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1604
1605         return 0;
1606 }
1607
1608 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1609 {
1610         switch (type) {
1611         case ATH6KL_HIF_TYPE_SDIO:
1612                 return "sdio";
1613         case ATH6KL_HIF_TYPE_USB:
1614                 return "usb";
1615         }
1616
1617         return NULL;
1618 }
1619
1620
1621 static const struct fw_capa_str_map {
1622         int id;
1623         const char *name;
1624 } fw_capa_map[] = {
1625         { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1626         { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1627         { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1628         { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1629         { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1630         { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1631         { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1632         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1633         { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1634         { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1635         { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1636         { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1637         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1638         { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1639         { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1640         { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1641         { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1642         { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" },
1643         { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" },
1644 };
1645
1646 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1647 {
1648         int i;
1649
1650         for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1651                 if (fw_capa_map[i].id == id)
1652                         return fw_capa_map[i].name;
1653         }
1654
1655         return "<unknown>";
1656 }
1657
1658 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1659 {
1660         u8 *data = (u8 *) ar->fw_capabilities;
1661         size_t trunc_len, len = 0;
1662         int i, index, bit;
1663         char *trunc = "...";
1664
1665         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1666                 index = i / 8;
1667                 bit = i % 8;
1668
1669                 if (index >= sizeof(ar->fw_capabilities) * 4)
1670                         break;
1671
1672                 if (buf_len - len < 4) {
1673                         ath6kl_warn("firmware capability buffer too small!\n");
1674
1675                         /* add "..." to the end of string */
1676                         trunc_len = strlen(trunc) + 1;
1677                         strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1678
1679                         return;
1680                 }
1681
1682                 if (data[index] & (1 << bit)) {
1683                         len += scnprintf(buf + len, buf_len - len, "%s,",
1684                                             ath6kl_init_get_fw_capa_name(i));
1685                 }
1686         }
1687
1688         /* overwrite the last comma */
1689         if (len > 0)
1690                 len--;
1691
1692         buf[len] = '\0';
1693 }
1694
1695 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1696 {
1697         ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1698
1699         return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1700                                    cpu_to_le32(RESET_CONTROL_COLD_RST));
1701 }
1702
1703 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1704 {
1705         long timeleft;
1706         int ret, i;
1707         char buf[200];
1708
1709         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1710
1711         ret = ath6kl_hif_power_on(ar);
1712         if (ret)
1713                 return ret;
1714
1715         ret = ath6kl_configure_target(ar);
1716         if (ret)
1717                 goto err_power_off;
1718
1719         ret = ath6kl_init_upload(ar);
1720         if (ret)
1721                 goto err_power_off;
1722
1723         /* Do we need to finish the BMI phase */
1724         ret = ath6kl_bmi_done(ar);
1725         if (ret)
1726                 goto err_power_off;
1727
1728         /*
1729          * The reason we have to wait for the target here is that the
1730          * driver layer has to init BMI in order to set the host block
1731          * size.
1732          */
1733         ret = ath6kl_htc_wait_target(ar->htc_target);
1734
1735         if (ret == -ETIMEDOUT) {
1736                 /*
1737                  * Most likely USB target is in odd state after reboot and
1738                  * needs a reset. A cold reset makes the whole device
1739                  * disappear from USB bus and initialisation starts from
1740                  * beginning.
1741                  */
1742                 ath6kl_warn("htc wait target timed out, resetting device\n");
1743                 ath6kl_init_hw_reset(ar);
1744                 goto err_power_off;
1745         } else if (ret) {
1746                 ath6kl_err("htc wait target failed: %d\n", ret);
1747                 goto err_power_off;
1748         }
1749
1750         ret = ath6kl_init_service_ep(ar);
1751         if (ret) {
1752                 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1753                 goto err_cleanup_scatter;
1754         }
1755
1756         /* setup credit distribution */
1757         ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1758
1759         /* start HTC */
1760         ret = ath6kl_htc_start(ar->htc_target);
1761         if (ret) {
1762                 /* FIXME: call this */
1763                 ath6kl_cookie_cleanup(ar);
1764                 goto err_cleanup_scatter;
1765         }
1766
1767         /* Wait for Wmi event to be ready */
1768         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1769                                                     test_bit(WMI_READY,
1770                                                              &ar->flag),
1771                                                     WMI_TIMEOUT);
1772         if (timeleft <= 0) {
1773                 clear_bit(WMI_READY, &ar->flag);
1774                 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1775                            timeleft);
1776                 ret = -EIO;
1777                 goto err_htc_stop;
1778         }
1779
1780         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1781
1782         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1783                 ath6kl_info("%s %s fw %s api %d%s\n",
1784                             ar->hw.name,
1785                             ath6kl_init_get_hif_name(ar->hif_type),
1786                             ar->wiphy->fw_version,
1787                             ar->fw_api,
1788                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1789                 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1790                 ath6kl_info("firmware supports: %s\n", buf);
1791         }
1792
1793         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1794                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1795                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1796                 ret = -EIO;
1797                 goto err_htc_stop;
1798         }
1799
1800         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1801
1802         /* communicate the wmi protocol verision to the target */
1803         /* FIXME: return error */
1804         if ((ath6kl_set_host_app_area(ar)) != 0)
1805                 ath6kl_err("unable to set the host app area\n");
1806
1807         for (i = 0; i < ar->vif_max; i++) {
1808                 ret = ath6kl_target_config_wlan_params(ar, i);
1809                 if (ret)
1810                         goto err_htc_stop;
1811         }
1812
1813         return 0;
1814
1815 err_htc_stop:
1816         ath6kl_htc_stop(ar->htc_target);
1817 err_cleanup_scatter:
1818         ath6kl_hif_cleanup_scatter(ar);
1819 err_power_off:
1820         ath6kl_hif_power_off(ar);
1821
1822         return ret;
1823 }
1824
1825 int ath6kl_init_hw_start(struct ath6kl *ar)
1826 {
1827         int err;
1828
1829         err = __ath6kl_init_hw_start(ar);
1830         if (err)
1831                 return err;
1832         ar->state = ATH6KL_STATE_ON;
1833         return 0;
1834 }
1835
1836 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1837 {
1838         int ret;
1839
1840         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1841
1842         ath6kl_htc_stop(ar->htc_target);
1843
1844         ath6kl_hif_stop(ar);
1845
1846         ath6kl_bmi_reset(ar);
1847
1848         ret = ath6kl_hif_power_off(ar);
1849         if (ret)
1850                 ath6kl_warn("failed to power off hif: %d\n", ret);
1851
1852         return 0;
1853 }
1854
1855 int ath6kl_init_hw_stop(struct ath6kl *ar)
1856 {
1857         int err;
1858
1859         err = __ath6kl_init_hw_stop(ar);
1860         if (err)
1861                 return err;
1862         ar->state = ATH6KL_STATE_OFF;
1863         return 0;
1864 }
1865
1866 void ath6kl_init_hw_restart(struct ath6kl *ar)
1867 {
1868         clear_bit(WMI_READY, &ar->flag);
1869
1870         ath6kl_cfg80211_stop_all(ar);
1871
1872         if (__ath6kl_init_hw_stop(ar)) {
1873                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1874                 return;
1875         }
1876
1877         if (__ath6kl_init_hw_start(ar)) {
1878                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1879                 return;
1880         }
1881 }
1882
1883 void ath6kl_stop_txrx(struct ath6kl *ar)
1884 {
1885         struct ath6kl_vif *vif, *tmp_vif;
1886         int i;
1887
1888         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1889
1890         if (down_interruptible(&ar->sem)) {
1891                 ath6kl_err("down_interruptible failed\n");
1892                 return;
1893         }
1894
1895         for (i = 0; i < AP_MAX_NUM_STA; i++)
1896                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1897
1898         spin_lock_bh(&ar->list_lock);
1899         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1900                 list_del(&vif->list);
1901                 spin_unlock_bh(&ar->list_lock);
1902                 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1903                 rtnl_lock();
1904                 ath6kl_cfg80211_vif_cleanup(vif);
1905                 rtnl_unlock();
1906                 spin_lock_bh(&ar->list_lock);
1907         }
1908         spin_unlock_bh(&ar->list_lock);
1909
1910         clear_bit(WMI_READY, &ar->flag);
1911
1912         if (ar->fw_recovery.enable)
1913                 del_timer_sync(&ar->fw_recovery.hb_timer);
1914
1915         /*
1916          * After wmi_shudown all WMI events will be dropped. We
1917          * need to cleanup the buffers allocated in AP mode and
1918          * give disconnect notification to stack, which usually
1919          * happens in the disconnect_event. Simulate the disconnect
1920          * event by calling the function directly. Sometimes
1921          * disconnect_event will be received when the debug logs
1922          * are collected.
1923          */
1924         ath6kl_wmi_shutdown(ar->wmi);
1925
1926         clear_bit(WMI_ENABLED, &ar->flag);
1927         if (ar->htc_target) {
1928                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1929                 ath6kl_htc_stop(ar->htc_target);
1930         }
1931
1932         /*
1933          * Try to reset the device if we can. The driver may have been
1934          * configure NOT to reset the target during a debug session.
1935          */
1936         ath6kl_init_hw_reset(ar);
1937
1938         up(&ar->sem);
1939 }
1940 EXPORT_SYMBOL(ath6kl_stop_txrx);