bf53535fb44e9fe31631018d8f190e68ea40a36c
[oweals/u-boot.git] / drivers / net / vsc9953.c
1 /*
2  *  Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  *  SPDX-License-Identifier:      GPL-2.0+
5  *
6  *  Driver for the Vitesse VSC9953 L2 Switch
7  */
8
9 #include <asm/io.h>
10 #include <asm/fsl_serdes.h>
11 #include <fm_eth.h>
12 #include <fsl_memac.h>
13 #include <bitfield.h>
14 #include <errno.h>
15 #include <malloc.h>
16 #include <vsc9953.h>
17 #include <ethsw.h>
18
19 static struct vsc9953_info vsc9953_l2sw = {
20                 .port[0] = VSC9953_PORT_INFO_INITIALIZER(0),
21                 .port[1] = VSC9953_PORT_INFO_INITIALIZER(1),
22                 .port[2] = VSC9953_PORT_INFO_INITIALIZER(2),
23                 .port[3] = VSC9953_PORT_INFO_INITIALIZER(3),
24                 .port[4] = VSC9953_PORT_INFO_INITIALIZER(4),
25                 .port[5] = VSC9953_PORT_INFO_INITIALIZER(5),
26                 .port[6] = VSC9953_PORT_INFO_INITIALIZER(6),
27                 .port[7] = VSC9953_PORT_INFO_INITIALIZER(7),
28                 .port[8] = VSC9953_PORT_INFO_INITIALIZER(8),
29                 .port[9] = VSC9953_PORT_INFO_INITIALIZER(9),
30 };
31
32 void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus)
33 {
34         if (!VSC9953_PORT_CHECK(port_no))
35                 return;
36
37         vsc9953_l2sw.port[port_no].bus = bus;
38 }
39
40 void vsc9953_port_info_set_phy_address(int port_no, int address)
41 {
42         if (!VSC9953_PORT_CHECK(port_no))
43                 return;
44
45         vsc9953_l2sw.port[port_no].phyaddr = address;
46 }
47
48 void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int)
49 {
50         if (!VSC9953_PORT_CHECK(port_no))
51                 return;
52
53         vsc9953_l2sw.port[port_no].enet_if = phy_int;
54 }
55
56 void vsc9953_port_enable(int port_no)
57 {
58         if (!VSC9953_PORT_CHECK(port_no))
59                 return;
60
61         vsc9953_l2sw.port[port_no].enabled = 1;
62 }
63
64 void vsc9953_port_disable(int port_no)
65 {
66         if (!VSC9953_PORT_CHECK(port_no))
67                 return;
68
69         vsc9953_l2sw.port[port_no].enabled = 0;
70 }
71
72 static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,
73                 int regnum, int value)
74 {
75         int timeout = 50000;
76
77         out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
78                         ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
79                         (0x1 << 1));
80         asm("sync");
81
82         while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
83                 udelay(1);
84
85         if (timeout == 0)
86                 debug("Timeout waiting for MDIO write\n");
87 }
88
89 static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,
90                 int regnum)
91 {
92         int value = 0xFFFF;
93         int timeout = 50000;
94
95         while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout)
96                 udelay(1);
97         if (timeout == 0) {
98                 debug("Timeout waiting for MDIO operation to finish\n");
99                 return value;
100         }
101
102         /* Put the address of the phy, and the register
103          * number into MIICMD
104          */
105         out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
106                         ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
107                         (0x2 << 1));
108
109         timeout = 50000;
110         /* Wait for the the indication that the read is done */
111         while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
112                 udelay(1);
113         if (timeout == 0)
114                 debug("Timeout waiting for MDIO read\n");
115
116         /* Grab the value read from the PHY */
117         value = in_le32(&phyregs->miimdata);
118
119         if ((value & 0x00030000) == 0)
120                 return value & 0x0000ffff;
121
122         return value;
123 }
124
125 static int init_phy(struct eth_device *dev)
126 {
127         struct vsc9953_port_info *l2sw_port = dev->priv;
128         struct phy_device *phydev = NULL;
129
130 #ifdef CONFIG_PHYLIB
131         if (!l2sw_port->bus)
132                 return 0;
133         phydev = phy_connect(l2sw_port->bus, l2sw_port->phyaddr, dev,
134                         l2sw_port->enet_if);
135         if (!phydev) {
136                 printf("Failed to connect\n");
137                 return -1;
138         }
139
140         phydev->supported &= SUPPORTED_10baseT_Half |
141                         SUPPORTED_10baseT_Full |
142                         SUPPORTED_100baseT_Half |
143                         SUPPORTED_100baseT_Full |
144                         SUPPORTED_1000baseT_Full;
145         phydev->advertising = phydev->supported;
146
147         l2sw_port->phydev = phydev;
148
149         phy_config(phydev);
150 #endif
151
152         return 0;
153 }
154
155 static int vsc9953_port_init(int port_no)
156 {
157         struct eth_device *dev;
158
159         /* Internal ports never have a PHY */
160         if (VSC9953_INTERNAL_PORT_CHECK(port_no))
161                 return 0;
162
163         /* alloc eth device */
164         dev = (struct eth_device *)calloc(1, sizeof(struct eth_device));
165         if (!dev)
166                 return -ENOMEM;
167
168         sprintf(dev->name, "SW@PORT%d", port_no);
169         dev->priv = &vsc9953_l2sw.port[port_no];
170         dev->init = NULL;
171         dev->halt = NULL;
172         dev->send = NULL;
173         dev->recv = NULL;
174
175         if (init_phy(dev)) {
176                 free(dev);
177                 return -ENODEV;
178         }
179
180         return 0;
181 }
182
183 static int vsc9953_vlan_table_poll_idle(void)
184 {
185         struct vsc9953_analyzer *l2ana_reg;
186         int timeout;
187
188         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
189                         VSC9953_ANA_OFFSET);
190
191         timeout = 50000;
192         while (((in_le32(&l2ana_reg->ana_tables.vlan_access) &
193                  VSC9953_VLAN_CMD_MASK) != VSC9953_VLAN_CMD_IDLE) && --timeout)
194                 udelay(1);
195
196         return timeout ? 0 : -EBUSY;
197 }
198
199 /* vlan table set/clear all membership of vid */
200 static void vsc9953_vlan_table_membership_all_set(int vid, int set_member)
201 {
202         uint val;
203         struct vsc9953_analyzer *l2ana_reg;
204
205         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
206                         VSC9953_ANA_OFFSET);
207
208         if (vsc9953_vlan_table_poll_idle() < 0) {
209                 debug("VLAN table timeout\n");
210                 return;
211         }
212
213         /* read current vlan configuration */
214         val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
215         out_le32(&l2ana_reg->ana_tables.vlan_tidx,
216                  bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
217
218         clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
219                         VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
220
221         if (vsc9953_vlan_table_poll_idle() < 0) {
222                 debug("VLAN table timeout\n");
223                 return;
224         }
225
226         val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
227         out_le32(&l2ana_reg->ana_tables.vlan_tidx,
228                  bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
229
230         clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
231                         VSC9953_VLAN_PORT_MASK | VSC9953_VLAN_CMD_MASK,
232                         VSC9953_VLAN_CMD_WRITE |
233                         (set_member ? VSC9953_VLAN_PORT_MASK : 0));
234 }
235
236 /* Set PVID for a VSC9953 port */
237 static void vsc9953_port_vlan_pvid_set(int port_no, int pvid)
238 {
239         uint val;
240         struct vsc9953_analyzer *l2ana_reg;
241         struct vsc9953_rew_reg *l2rew_reg;
242
243         /* Administrative down */
244         if (!vsc9953_l2sw.port[port_no].enabled) {
245                 printf("Port %d is administrative down\n", port_no);
246                 return;
247         }
248
249         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
250                         VSC9953_ANA_OFFSET);
251         l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
252                         VSC9953_REW_OFFSET);
253
254         /* Set PVID on ingress */
255         val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
256         val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_VID_MASK, pvid);
257         out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
258
259         /* Set PVID on egress */
260         val = in_le32(&l2rew_reg->port[port_no].port_vlan_cfg);
261         val = bitfield_replace_by_mask(val, VSC9953_PORT_VLAN_CFG_VID_MASK,
262                                        pvid);
263         out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val);
264 }
265
266 static void vsc9953_port_all_vlan_pvid_set(int pvid)
267 {
268         int i;
269
270         for (i = 0; i < VSC9953_MAX_PORTS; i++)
271                 vsc9953_port_vlan_pvid_set(i, pvid);
272 }
273
274 /* Enable/disable vlan aware of a VSC9953 port */
275 static void vsc9953_port_vlan_aware_set(int port_no, int enabled)
276 {
277         struct vsc9953_analyzer *l2ana_reg;
278
279         /* Administrative down */
280         if (!vsc9953_l2sw.port[port_no].enabled) {
281                 printf("Port %d is administrative down\n", port_no);
282                 return;
283         }
284
285         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
286                         VSC9953_ANA_OFFSET);
287
288         if (enabled)
289                 setbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
290                              VSC9953_VLAN_CFG_AWARE_ENA);
291         else
292                 clrbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
293                              VSC9953_VLAN_CFG_AWARE_ENA);
294 }
295
296 /* Set all VSC9953 ports' vlan aware  */
297 static void vsc9953_port_all_vlan_aware_set(int enabled)
298 {
299         int i;
300
301         for (i = 0; i < VSC9953_MAX_PORTS; i++)
302                 vsc9953_port_vlan_aware_set(i, enabled);
303 }
304
305 /* Enable/disable vlan pop count of a VSC9953 port */
306 static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt)
307 {
308         uint val;
309         struct vsc9953_analyzer *l2ana_reg;
310
311         /* Administrative down */
312         if (!vsc9953_l2sw.port[port_no].enabled) {
313                 printf("Port %d is administrative down\n", port_no);
314                 return;
315         }
316
317         if (popcnt > 3 || popcnt < 0) {
318                 printf("Invalid pop count value: %d\n", port_no);
319                 return;
320         }
321
322         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
323                         VSC9953_ANA_OFFSET);
324
325         val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
326         val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_POP_CNT_MASK,
327                                        popcnt);
328         out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
329 }
330
331 /* Set all VSC9953 ports' pop count  */
332 static void vsc9953_port_all_vlan_poncnt_set(int popcnt)
333 {
334         int i;
335
336         for (i = 0; i < VSC9953_MAX_PORTS; i++)
337                 vsc9953_port_vlan_popcnt_set(i, popcnt);
338 }
339
340 /* Enable/disable learning for frames dropped due to ingress filtering */
341 static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)
342 {
343         struct vsc9953_analyzer *l2ana_reg;
344
345         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
346                         VSC9953_ANA_OFFSET);
347
348         if (enable)
349                 setbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
350         else
351                 clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
352 }
353
354 /* Egress untag modes of a VSC9953 port */
355 enum egress_untag_mode {
356         EGRESS_UNTAG_ALL = 0,
357         EGRESS_UNTAG_PVID_AND_ZERO,
358         EGRESS_UNTAG_ZERO,
359         EGRESS_UNTAG_NONE,
360 };
361
362 static void vsc9953_port_vlan_egr_untag_set(int port_no,
363                                             enum egress_untag_mode mode)
364 {
365         struct vsc9953_rew_reg *l2rew_reg;
366
367         /* Administrative down */
368         if (!vsc9953_l2sw.port[port_no].enabled) {
369                 printf("Port %d is administrative down\n", port_no);
370                 return;
371         }
372
373         l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
374                         VSC9953_REW_OFFSET);
375
376         switch (mode) {
377         case EGRESS_UNTAG_ALL:
378                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
379                                 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_NONE);
380                 break;
381         case EGRESS_UNTAG_PVID_AND_ZERO:
382                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
383                                 VSC9953_TAG_CFG_MASK,
384                                 VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO);
385                 break;
386         case EGRESS_UNTAG_ZERO:
387                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
388                                 VSC9953_TAG_CFG_MASK,
389                                 VSC9953_TAG_CFG_ALL_BUT_ZERO);
390                 break;
391         case EGRESS_UNTAG_NONE:
392                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
393                                 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_ALL);
394                 break;
395         default:
396                 printf("Unknown untag mode for port %d\n", port_no);
397         }
398 }
399
400 static void vsc9953_port_all_vlan_egress_untagged_set(
401                 enum egress_untag_mode mode)
402 {
403         int i;
404
405         for (i = 0; i < VSC9953_MAX_PORTS; i++)
406                 vsc9953_port_vlan_egr_untag_set(i, mode);
407 }
408
409 #ifdef CONFIG_CMD_ETHSW
410
411 /* Enable/disable status of a VSC9953 port */
412 static void vsc9953_port_status_set(int port_no, u8 enabled)
413 {
414         struct vsc9953_qsys_reg *l2qsys_reg;
415
416         /* Administrative down */
417         if (!vsc9953_l2sw.port[port_no].enabled)
418                 return;
419
420         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
421                         VSC9953_QSYS_OFFSET);
422
423         if (enabled)
424                 setbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
425                              VSC9953_PORT_ENA);
426         else
427                 clrbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
428                              VSC9953_PORT_ENA);
429 }
430
431 /* Start autonegotiation for a VSC9953 PHY */
432 static void vsc9953_phy_autoneg(int port_no)
433 {
434         if (!vsc9953_l2sw.port[port_no].phydev)
435                 return;
436
437         if (vsc9953_l2sw.port[port_no].phydev->drv->startup(
438                         vsc9953_l2sw.port[port_no].phydev))
439                 printf("Failed to start PHY for port %d\n", port_no);
440 }
441
442 /* Print a VSC9953 port's configuration */
443 static void vsc9953_port_config_show(int port_no)
444 {
445         int speed;
446         int duplex;
447         int link;
448         u8 enabled;
449         u32 val;
450         struct vsc9953_qsys_reg *l2qsys_reg;
451
452         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
453                         VSC9953_QSYS_OFFSET);
454
455         val = in_le32(&l2qsys_reg->sys.switch_port_mode[port_no]);
456         enabled = vsc9953_l2sw.port[port_no].enabled &&
457                   (val & VSC9953_PORT_ENA);
458
459         /* internal ports (8 and 9) are fixed */
460         if (VSC9953_INTERNAL_PORT_CHECK(port_no)) {
461                 link = 1;
462                 speed = SPEED_2500;
463                 duplex = DUPLEX_FULL;
464         } else {
465                 if (vsc9953_l2sw.port[port_no].phydev) {
466                         link = vsc9953_l2sw.port[port_no].phydev->link;
467                         speed = vsc9953_l2sw.port[port_no].phydev->speed;
468                         duplex = vsc9953_l2sw.port[port_no].phydev->duplex;
469                 } else {
470                         link = -1;
471                         speed = -1;
472                         duplex = -1;
473                 }
474         }
475
476         printf("%8d ", port_no);
477         printf("%8s ", enabled == 1 ? "enabled" : "disabled");
478         printf("%8s ", link == 1 ? "up" : "down");
479
480         switch (speed) {
481         case SPEED_10:
482                 printf("%8d ", 10);
483                 break;
484         case SPEED_100:
485                 printf("%8d ", 100);
486                 break;
487         case SPEED_1000:
488                 printf("%8d ", 1000);
489                 break;
490         case SPEED_2500:
491                 printf("%8d ", 2500);
492                 break;
493         case SPEED_10000:
494                 printf("%8d ", 10000);
495                 break;
496         default:
497                 printf("%8s ", "-");
498         }
499
500         printf("%8s\n", duplex == DUPLEX_FULL ? "full" : "half");
501 }
502
503 static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd)
504 {
505         int i;
506         u8 enabled;
507
508         /* Last keyword should tell us if we should enable/disable the port */
509         if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
510             ethsw_id_enable)
511                 enabled = 1;
512         else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
513                  ethsw_id_disable)
514                 enabled = 0;
515         else
516                 return CMD_RET_USAGE;
517
518         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
519                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
520                         printf("Invalid port number: %d\n", parsed_cmd->port);
521                         return CMD_RET_FAILURE;
522                 }
523                 vsc9953_port_status_set(parsed_cmd->port, enabled);
524         } else {
525                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
526                         vsc9953_port_status_set(i, enabled);
527         }
528
529         return CMD_RET_SUCCESS;
530 }
531
532 static int vsc9953_port_config_key_func(struct ethsw_command_def *parsed_cmd)
533 {
534         int i;
535
536         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
537                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
538                         printf("Invalid port number: %d\n", parsed_cmd->port);
539                         return CMD_RET_FAILURE;
540                 }
541                 vsc9953_phy_autoneg(parsed_cmd->port);
542                 printf("%8s %8s %8s %8s %8s\n",
543                        "Port", "Status", "Link", "Speed",
544                        "Duplex");
545                 vsc9953_port_config_show(parsed_cmd->port);
546
547         } else {
548                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
549                         vsc9953_phy_autoneg(i);
550                 printf("%8s %8s %8s %8s %8s\n",
551                        "Port", "Status", "Link", "Speed", "Duplex");
552                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
553                         vsc9953_port_config_show(i);
554         }
555
556         return CMD_RET_SUCCESS;
557 }
558
559 static struct ethsw_command_func vsc9953_cmd_func = {
560                 .ethsw_name = "L2 Switch VSC9953",
561                 .port_enable = &vsc9953_port_status_key_func,
562                 .port_disable = &vsc9953_port_status_key_func,
563                 .port_show = &vsc9953_port_config_key_func,
564 };
565
566 #endif /* CONFIG_CMD_ETHSW */
567
568 /*****************************************************************************
569 At startup, the default configuration would be:
570         - HW learning enabled on all ports; (HW default)
571         - All ports are in VLAN 1;
572         - All ports are VLAN aware;
573         - All ports have POP_COUNT 1;
574         - All ports have PVID 1;
575         - All ports have TPID 0x8100; (HW default)
576         - All ports tag frames classified to all VLANs that are not PVID;
577 *****************************************************************************/
578 void vsc9953_default_configuration(void)
579 {
580         int i;
581
582         for (i = 0; i < VSC9953_MAX_VLAN; i++)
583                 vsc9953_vlan_table_membership_all_set(i, 0);
584         vsc9953_port_all_vlan_aware_set(1);
585         vsc9953_port_all_vlan_pvid_set(1);
586         vsc9953_port_all_vlan_poncnt_set(1);
587         vsc9953_vlan_table_membership_all_set(1, 1);
588         vsc9953_vlan_ingr_fltr_learn_drop(1);
589         vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO);
590 }
591
592 void vsc9953_init(bd_t *bis)
593 {
594         u32 i;
595         u32 hdx_cfg = 0;
596         u32 phy_addr = 0;
597         int timeout;
598         struct vsc9953_system_reg *l2sys_reg;
599         struct vsc9953_qsys_reg *l2qsys_reg;
600         struct vsc9953_dev_gmii *l2dev_gmii_reg;
601         struct vsc9953_analyzer *l2ana_reg;
602         struct vsc9953_devcpu_gcb *l2dev_gcb;
603
604         l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(VSC9953_OFFSET +
605                         VSC9953_DEV_GMII_OFFSET);
606
607         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
608                         VSC9953_ANA_OFFSET);
609
610         l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
611                         VSC9953_SYS_OFFSET);
612
613         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
614                         VSC9953_QSYS_OFFSET);
615
616         l2dev_gcb = (struct vsc9953_devcpu_gcb *)(VSC9953_OFFSET +
617                         VSC9953_DEVCPU_GCB);
618
619         out_le32(&l2dev_gcb->chip_regs.soft_rst,
620                  VSC9953_SOFT_SWC_RST_ENA);
621         timeout = 50000;
622         while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) &
623                         VSC9953_SOFT_SWC_RST_ENA) && --timeout)
624                 udelay(1); /* busy wait for vsc9953 soft reset */
625         if (timeout == 0)
626                 debug("Timeout waiting for VSC9953 to reset\n");
627
628         out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE |
629                  VSC9953_MEM_INIT);
630
631         timeout = 50000;
632         while ((in_le32(&l2sys_reg->sys.reset_cfg) &
633                 VSC9953_MEM_INIT) && --timeout)
634                 udelay(1); /* busy wait for vsc9953 memory init */
635         if (timeout == 0)
636                 debug("Timeout waiting for VSC9953 memory to initialize\n");
637
638         out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg)
639                         | VSC9953_CORE_ENABLE));
640
641         /* VSC9953 Setting to be done once only */
642         out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00);
643
644         for (i = 0; i < VSC9953_MAX_PORTS; i++) {
645                 if (vsc9953_port_init(i))
646                         printf("Failed to initialize l2switch port %d\n", i);
647
648                 /* Enable VSC9953 GMII Ports Port ID 0 - 7 */
649                 if (VSC9953_INTERNAL_PORT_CHECK(i)) {
650                         out_le32(&l2ana_reg->pfc[i].pfc_cfg,
651                                  VSC9953_PFC_FC_QSGMII);
652                         out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
653                                  VSC9953_MAC_FC_CFG_QSGMII);
654                 } else {
655                         out_le32(&l2ana_reg->pfc[i].pfc_cfg,
656                                  VSC9953_PFC_FC);
657                         out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
658                                  VSC9953_MAC_FC_CFG);
659                 }
660                 out_le32(&l2dev_gmii_reg->port_mode.clock_cfg,
661                          VSC9953_CLOCK_CFG);
662                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg,
663                          VSC9953_MAC_ENA_CFG);
664                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg,
665                          VSC9953_MAC_MODE_CFG);
666                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg,
667                          VSC9953_MAC_IFG_CFG);
668                 /* mac_hdx_cfg varies with port id*/
669                 hdx_cfg = VSC9953_MAC_HDX_CFG | (i << 16);
670                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg);
671                 out_le32(&l2sys_reg->sys.front_port_mode[i],
672                          VSC9953_FRONT_PORT_MODE);
673                 setbits_le32(&l2qsys_reg->sys.switch_port_mode[i],
674                              VSC9953_PORT_ENA);
675                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg,
676                          VSC9953_MAC_MAX_LEN);
677                 out_le32(&l2sys_reg->pause_cfg.pause_cfg[i],
678                          VSC9953_PAUSE_CFG);
679                 /* WAIT FOR 2 us*/
680                 udelay(2);
681
682                 l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(
683                                 (char *)l2dev_gmii_reg
684                                 + T1040_SWITCH_GMII_DEV_OFFSET);
685
686                 /* Initialize Lynx PHY Wrappers */
687                 phy_addr = 0;
688                 if (vsc9953_l2sw.port[i].enet_if ==
689                                 PHY_INTERFACE_MODE_QSGMII)
690                         phy_addr = (i + 0x4) & 0x1F;
691                 else if (vsc9953_l2sw.port[i].enet_if ==
692                                 PHY_INTERFACE_MODE_SGMII)
693                         phy_addr = (i + 1) & 0x1F;
694
695                 if (phy_addr) {
696                         /* SGMII IF mode + AN enable */
697                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
698                                            0x14, PHY_SGMII_IF_MODE_AN |
699                                            PHY_SGMII_IF_MODE_SGMII);
700                         /* Dev ability according to SGMII specification */
701                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
702                                            0x4, PHY_SGMII_DEV_ABILITY_SGMII);
703                         /* Adjust link timer for SGMII
704                          * 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40
705                          */
706                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
707                                            0x13, 0x0003);
708                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
709                                            0x12, 0x0d40);
710                         /* Restart AN */
711                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
712                                            0x0, PHY_SGMII_CR_DEF_VAL |
713                                            PHY_SGMII_CR_RESET_AN);
714
715                         timeout = 50000;
716                         while ((vsc9953_mdio_read(&l2dev_gcb->mii_mng[0],
717                                         phy_addr, 0x01) & 0x0020) && --timeout)
718                                 udelay(1); /* wait for AN to complete */
719                         if (timeout == 0)
720                                 debug("Timeout waiting for AN to complete\n");
721                 }
722         }
723
724         vsc9953_default_configuration();
725
726 #ifdef CONFIG_CMD_ETHSW
727         if (ethsw_define_functions(&vsc9953_cmd_func) < 0)
728                 debug("Unable to use \"ethsw\" commands\n");
729 #endif
730
731         printf("VSC9953 L2 switch initialized\n");
732         return;
733 }