1 // SPDX-License-Identifier: GPL-2.0+
3 * Xilinx PCS/PMA Core phy driver
5 * Copyright (C) 2015 - 2016 Xilinx, Inc.
13 DECLARE_GLOBAL_DATA_PTR;
15 #define MII_PHY_STATUS_SPD_MASK 0x0C00
16 #define MII_PHY_STATUS_FULLDUPLEX 0x1000
17 #define MII_PHY_STATUS_1000 0x0800
18 #define MII_PHY_STATUS_100 0x0400
19 #define XPCSPMA_PHY_CTRL_ISOLATE_DISABLE 0xFBFF
21 /* Mask used for ID comparisons */
22 #define XILINX_PHY_ID_MASK 0xfffffff0
25 #define XILINX_PHY_ID 0x01740c00
27 /* struct phy_device dev_flags definitions */
28 #define XAE_PHY_TYPE_MII 0
29 #define XAE_PHY_TYPE_GMII 1
30 #define XAE_PHY_TYPE_RGMII_1_3 2
31 #define XAE_PHY_TYPE_RGMII_2_0 3
32 #define XAE_PHY_TYPE_SGMII 4
33 #define XAE_PHY_TYPE_1000BASE_X 5
35 static int xilinxphy_startup(struct phy_device *phydev)
40 debug("%s\n", __func__);
41 /* Update the link, but return if there
44 err = genphy_update_link(phydev);
48 if (AUTONEG_ENABLE == phydev->autoneg) {
49 status = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
50 status = status & MII_PHY_STATUS_SPD_MASK;
52 if (status & MII_PHY_STATUS_FULLDUPLEX)
53 phydev->duplex = DUPLEX_FULL;
55 phydev->duplex = DUPLEX_HALF;
58 case MII_PHY_STATUS_1000:
59 phydev->speed = SPEED_1000;
62 case MII_PHY_STATUS_100:
63 phydev->speed = SPEED_100;
67 phydev->speed = SPEED_10;
71 int bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
76 if (bmcr & BMCR_FULLDPLX)
77 phydev->duplex = DUPLEX_FULL;
79 phydev->duplex = DUPLEX_HALF;
81 if (bmcr & BMCR_SPEED1000)
82 phydev->speed = SPEED_1000;
83 else if (bmcr & BMCR_SPEED100)
84 phydev->speed = SPEED_100;
86 phydev->speed = SPEED_10;
90 * For 1000BASE-X Phy Mode the speed/duplex will always be
93 if (phydev->flags == XAE_PHY_TYPE_1000BASE_X) {
94 phydev->duplex = DUPLEX_FULL;
95 phydev->speed = SPEED_1000;
101 static int xilinxphy_of_init(struct phy_device *phydev)
105 debug("%s\n", __func__);
106 phytype = fdtdec_get_int(gd->fdt_blob, dev_of_offset(phydev->dev),
107 "xlnx,phy-type", -1);
108 if (phytype == XAE_PHY_TYPE_1000BASE_X)
109 phydev->flags |= XAE_PHY_TYPE_1000BASE_X;
114 static int xilinxphy_config(struct phy_device *phydev)
118 debug("%s\n", __func__);
119 xilinxphy_of_init(phydev);
120 temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
121 temp &= XPCSPMA_PHY_CTRL_ISOLATE_DISABLE;
122 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, temp);
127 static struct phy_driver xilinxphy_driver = {
128 .uid = XILINX_PHY_ID,
129 .mask = XILINX_PHY_ID_MASK,
130 .name = "Xilinx PCS/PMA PHY",
131 .features = PHY_GBIT_FEATURES,
132 .config = &xilinxphy_config,
133 .startup = &xilinxphy_startup,
134 .shutdown = &genphy_shutdown,
137 int phy_xilinx_init(void)
139 debug("%s\n", __func__);
140 phy_register(&xilinxphy_driver);