4 * SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2010-2011, 2015 Freescale Semiconductor, Inc.
8 * Copyright 2016 Karsten Merker <merker@debian.org>
14 #define PHY_AUTONEGOTIATE_TIMEOUT 5000
16 /* RTL8211x 1000BASE-T Control Register */
17 #define MIIM_RTL8211x_CTRL1000T_MSCE (1 << 12);
18 #define MIIM_RTL8211X_CTRL1000T_MASTER (1 << 11);
20 /* RTL8211x PHY Status Register */
21 #define MIIM_RTL8211x_PHY_STATUS 0x11
22 #define MIIM_RTL8211x_PHYSTAT_SPEED 0xc000
23 #define MIIM_RTL8211x_PHYSTAT_GBIT 0x8000
24 #define MIIM_RTL8211x_PHYSTAT_100 0x4000
25 #define MIIM_RTL8211x_PHYSTAT_DUPLEX 0x2000
26 #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
27 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
29 /* RTL8211x PHY Interrupt Enable Register */
30 #define MIIM_RTL8211x_PHY_INER 0x12
31 #define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01
32 #define MIIM_RTL8211x_PHY_INTR_DIS 0x0000
34 /* RTL8211x PHY Interrupt Status Register */
35 #define MIIM_RTL8211x_PHY_INSR 0x13
37 /* RTL8211F PHY Status Register */
38 #define MIIM_RTL8211F_PHY_STATUS 0x1a
39 #define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000
40 #define MIIM_RTL8211F_PHYSTAT_SPEED 0x0030
41 #define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020
42 #define MIIM_RTL8211F_PHYSTAT_100 0x0010
43 #define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008
44 #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800
45 #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
47 #define MIIM_RTL8211F_PAGE_SELECT 0x1f
48 #define MIIM_RTL8211F_TX_DELAY 0x100
49 #define MIIM_RTL8211F_LCR 0x10
51 /* RealTek RTL8211x */
52 static int rtl8211x_config(struct phy_device *phydev)
54 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
56 /* mask interrupt at init; if the interrupt is
57 * needed indeed, it should be explicitly enabled
59 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
60 MIIM_RTL8211x_PHY_INTR_DIS);
61 #ifdef CONFIG_RTL8211X_PHY_FORCE_MASTER
62 unsigned int reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
63 /* force manual master/slave configuration */
64 reg |= MIIM_RTL8211x_CTRL1000T_MSCE;
65 /* force master mode */
66 reg |= MIIM_RTL8211X_CTRL1000T_MASTER;
67 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg);
69 /* read interrupt status just to clear it */
70 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);
72 genphy_config_aneg(phydev);
77 static int rtl8211f_config(struct phy_device *phydev)
81 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
83 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
85 phy_write(phydev, MDIO_DEVAD_NONE,
86 MIIM_RTL8211F_PAGE_SELECT, 0xd08);
87 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11);
88 reg |= MIIM_RTL8211F_TX_DELAY;
89 phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
90 /* restore to default page 0 */
91 phy_write(phydev, MDIO_DEVAD_NONE,
92 MIIM_RTL8211F_PAGE_SELECT, 0x0);
95 /* Set green LED for Link, yellow LED for Active */
96 phy_write(phydev, MDIO_DEVAD_NONE,
97 MIIM_RTL8211F_PAGE_SELECT, 0xd04);
98 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f);
99 phy_write(phydev, MDIO_DEVAD_NONE,
100 MIIM_RTL8211F_PAGE_SELECT, 0x0);
102 genphy_config_aneg(phydev);
107 static int rtl8211x_parse_status(struct phy_device *phydev)
110 unsigned int mii_reg;
112 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS);
114 if (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
117 /* in case of timeout ->link is cleared */
119 puts("Waiting for PHY realtime link");
120 while (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
121 /* Timeout reached ? */
122 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
123 puts(" TIMEOUT !\n");
128 if ((i++ % 1000) == 0)
130 udelay(1000); /* 1 ms */
131 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
132 MIIM_RTL8211x_PHY_STATUS);
135 udelay(500000); /* another 500 ms (results in faster booting) */
137 if (mii_reg & MIIM_RTL8211x_PHYSTAT_LINK)
143 if (mii_reg & MIIM_RTL8211x_PHYSTAT_DUPLEX)
144 phydev->duplex = DUPLEX_FULL;
146 phydev->duplex = DUPLEX_HALF;
148 speed = (mii_reg & MIIM_RTL8211x_PHYSTAT_SPEED);
151 case MIIM_RTL8211x_PHYSTAT_GBIT:
152 phydev->speed = SPEED_1000;
154 case MIIM_RTL8211x_PHYSTAT_100:
155 phydev->speed = SPEED_100;
158 phydev->speed = SPEED_10;
164 static int rtl8211f_parse_status(struct phy_device *phydev)
167 unsigned int mii_reg;
170 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43);
171 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS);
174 while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) {
175 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
176 puts(" TIMEOUT !\n");
181 if ((i++ % 1000) == 0)
184 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
185 MIIM_RTL8211F_PHY_STATUS);
188 if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX)
189 phydev->duplex = DUPLEX_FULL;
191 phydev->duplex = DUPLEX_HALF;
193 speed = (mii_reg & MIIM_RTL8211F_PHYSTAT_SPEED);
196 case MIIM_RTL8211F_PHYSTAT_GBIT:
197 phydev->speed = SPEED_1000;
199 case MIIM_RTL8211F_PHYSTAT_100:
200 phydev->speed = SPEED_100;
203 phydev->speed = SPEED_10;
209 static int rtl8211x_startup(struct phy_device *phydev)
213 /* Read the Status (2x to make sure link is right) */
214 ret = genphy_update_link(phydev);
218 return rtl8211x_parse_status(phydev);
221 static int rtl8211e_startup(struct phy_device *phydev)
225 ret = genphy_update_link(phydev);
229 return genphy_parse_link(phydev);
232 static int rtl8211f_startup(struct phy_device *phydev)
236 /* Read the Status (2x to make sure link is right) */
237 ret = genphy_update_link(phydev);
240 /* Read the Status (2x to make sure link is right) */
242 return rtl8211f_parse_status(phydev);
245 /* Support for RTL8211B PHY */
246 static struct phy_driver RTL8211B_driver = {
247 .name = "RealTek RTL8211B",
250 .features = PHY_GBIT_FEATURES,
251 .config = &rtl8211x_config,
252 .startup = &rtl8211x_startup,
253 .shutdown = &genphy_shutdown,
256 /* Support for RTL8211E-VB-CG, RTL8211E-VL-CG and RTL8211EG-VB-CG PHYs */
257 static struct phy_driver RTL8211E_driver = {
258 .name = "RealTek RTL8211E",
261 .features = PHY_GBIT_FEATURES,
262 .config = &rtl8211x_config,
263 .startup = &rtl8211e_startup,
264 .shutdown = &genphy_shutdown,
267 /* Support for RTL8211DN PHY */
268 static struct phy_driver RTL8211DN_driver = {
269 .name = "RealTek RTL8211DN",
272 .features = PHY_GBIT_FEATURES,
273 .config = &rtl8211x_config,
274 .startup = &rtl8211x_startup,
275 .shutdown = &genphy_shutdown,
278 /* Support for RTL8211F PHY */
279 static struct phy_driver RTL8211F_driver = {
280 .name = "RealTek RTL8211F",
283 .features = PHY_GBIT_FEATURES,
284 .config = &rtl8211f_config,
285 .startup = &rtl8211f_startup,
286 .shutdown = &genphy_shutdown,
289 int phy_realtek_init(void)
291 phy_register(&RTL8211B_driver);
292 phy_register(&RTL8211E_driver);
293 phy_register(&RTL8211F_driver);
294 phy_register(&RTL8211DN_driver);