4 * SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2010-2011, 2015 Freescale Semiconductor, Inc.
8 * Copyright 2016 Karsten Merker <merker@debian.org>
12 #include <linux/bitops.h>
15 #define PHY_RTL8211x_FORCE_MASTER BIT(1)
17 #define PHY_AUTONEGOTIATE_TIMEOUT 5000
19 /* RTL8211x 1000BASE-T Control Register */
20 #define MIIM_RTL8211x_CTRL1000T_MSCE BIT(12);
21 #define MIIM_RTL8211x_CTRL1000T_MASTER BIT(11);
23 /* RTL8211x PHY Status Register */
24 #define MIIM_RTL8211x_PHY_STATUS 0x11
25 #define MIIM_RTL8211x_PHYSTAT_SPEED 0xc000
26 #define MIIM_RTL8211x_PHYSTAT_GBIT 0x8000
27 #define MIIM_RTL8211x_PHYSTAT_100 0x4000
28 #define MIIM_RTL8211x_PHYSTAT_DUPLEX 0x2000
29 #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
30 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
32 /* RTL8211x PHY Interrupt Enable Register */
33 #define MIIM_RTL8211x_PHY_INER 0x12
34 #define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01
35 #define MIIM_RTL8211x_PHY_INTR_DIS 0x0000
37 /* RTL8211x PHY Interrupt Status Register */
38 #define MIIM_RTL8211x_PHY_INSR 0x13
40 /* RTL8211F PHY Status Register */
41 #define MIIM_RTL8211F_PHY_STATUS 0x1a
42 #define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000
43 #define MIIM_RTL8211F_PHYSTAT_SPEED 0x0030
44 #define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020
45 #define MIIM_RTL8211F_PHYSTAT_100 0x0010
46 #define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008
47 #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800
48 #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
50 #define MIIM_RTL8211F_PAGE_SELECT 0x1f
51 #define MIIM_RTL8211F_TX_DELAY 0x100
52 #define MIIM_RTL8211F_LCR 0x10
54 static int rtl8211b_probe(struct phy_device *phydev)
56 #ifdef CONFIG_RTL8211X_PHY_FORCE_MASTER
57 phydev->flags |= PHY_RTL8211x_FORCE_MASTER;
63 /* RealTek RTL8211x */
64 static int rtl8211x_config(struct phy_device *phydev)
66 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
68 /* mask interrupt at init; if the interrupt is
69 * needed indeed, it should be explicitly enabled
71 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
72 MIIM_RTL8211x_PHY_INTR_DIS);
74 if (phydev->flags & PHY_RTL8211x_FORCE_MASTER) {
77 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
78 /* force manual master/slave configuration */
79 reg |= MIIM_RTL8211x_CTRL1000T_MSCE;
80 /* force master mode */
81 reg |= MIIM_RTL8211x_CTRL1000T_MASTER;
82 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg);
84 /* read interrupt status just to clear it */
85 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);
87 genphy_config_aneg(phydev);
92 static int rtl8211f_config(struct phy_device *phydev)
96 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
98 phy_write(phydev, MDIO_DEVAD_NONE,
99 MIIM_RTL8211F_PAGE_SELECT, 0xd08);
100 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11);
102 /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
103 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
104 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
105 reg |= MIIM_RTL8211F_TX_DELAY;
107 reg &= ~MIIM_RTL8211F_TX_DELAY;
109 phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
110 /* restore to default page 0 */
111 phy_write(phydev, MDIO_DEVAD_NONE,
112 MIIM_RTL8211F_PAGE_SELECT, 0x0);
114 /* Set green LED for Link, yellow LED for Active */
115 phy_write(phydev, MDIO_DEVAD_NONE,
116 MIIM_RTL8211F_PAGE_SELECT, 0xd04);
117 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f);
118 phy_write(phydev, MDIO_DEVAD_NONE,
119 MIIM_RTL8211F_PAGE_SELECT, 0x0);
121 genphy_config_aneg(phydev);
126 static int rtl8211x_parse_status(struct phy_device *phydev)
129 unsigned int mii_reg;
131 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS);
133 if (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
136 /* in case of timeout ->link is cleared */
138 puts("Waiting for PHY realtime link");
139 while (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
140 /* Timeout reached ? */
141 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
142 puts(" TIMEOUT !\n");
147 if ((i++ % 1000) == 0)
149 udelay(1000); /* 1 ms */
150 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
151 MIIM_RTL8211x_PHY_STATUS);
154 udelay(500000); /* another 500 ms (results in faster booting) */
156 if (mii_reg & MIIM_RTL8211x_PHYSTAT_LINK)
162 if (mii_reg & MIIM_RTL8211x_PHYSTAT_DUPLEX)
163 phydev->duplex = DUPLEX_FULL;
165 phydev->duplex = DUPLEX_HALF;
167 speed = (mii_reg & MIIM_RTL8211x_PHYSTAT_SPEED);
170 case MIIM_RTL8211x_PHYSTAT_GBIT:
171 phydev->speed = SPEED_1000;
173 case MIIM_RTL8211x_PHYSTAT_100:
174 phydev->speed = SPEED_100;
177 phydev->speed = SPEED_10;
183 static int rtl8211f_parse_status(struct phy_device *phydev)
186 unsigned int mii_reg;
189 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43);
190 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS);
193 while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) {
194 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
195 puts(" TIMEOUT !\n");
200 if ((i++ % 1000) == 0)
203 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
204 MIIM_RTL8211F_PHY_STATUS);
207 if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX)
208 phydev->duplex = DUPLEX_FULL;
210 phydev->duplex = DUPLEX_HALF;
212 speed = (mii_reg & MIIM_RTL8211F_PHYSTAT_SPEED);
215 case MIIM_RTL8211F_PHYSTAT_GBIT:
216 phydev->speed = SPEED_1000;
218 case MIIM_RTL8211F_PHYSTAT_100:
219 phydev->speed = SPEED_100;
222 phydev->speed = SPEED_10;
228 static int rtl8211x_startup(struct phy_device *phydev)
232 /* Read the Status (2x to make sure link is right) */
233 ret = genphy_update_link(phydev);
237 return rtl8211x_parse_status(phydev);
240 static int rtl8211e_startup(struct phy_device *phydev)
244 ret = genphy_update_link(phydev);
248 return genphy_parse_link(phydev);
251 static int rtl8211f_startup(struct phy_device *phydev)
255 /* Read the Status (2x to make sure link is right) */
256 ret = genphy_update_link(phydev);
259 /* Read the Status (2x to make sure link is right) */
261 return rtl8211f_parse_status(phydev);
264 /* Support for RTL8211B PHY */
265 static struct phy_driver RTL8211B_driver = {
266 .name = "RealTek RTL8211B",
269 .features = PHY_GBIT_FEATURES,
270 .probe = &rtl8211b_probe,
271 .config = &rtl8211x_config,
272 .startup = &rtl8211x_startup,
273 .shutdown = &genphy_shutdown,
276 /* Support for RTL8211E-VB-CG, RTL8211E-VL-CG and RTL8211EG-VB-CG PHYs */
277 static struct phy_driver RTL8211E_driver = {
278 .name = "RealTek RTL8211E",
281 .features = PHY_GBIT_FEATURES,
282 .config = &rtl8211x_config,
283 .startup = &rtl8211e_startup,
284 .shutdown = &genphy_shutdown,
287 /* Support for RTL8211DN PHY */
288 static struct phy_driver RTL8211DN_driver = {
289 .name = "RealTek RTL8211DN",
292 .features = PHY_GBIT_FEATURES,
293 .config = &rtl8211x_config,
294 .startup = &rtl8211x_startup,
295 .shutdown = &genphy_shutdown,
298 /* Support for RTL8211F PHY */
299 static struct phy_driver RTL8211F_driver = {
300 .name = "RealTek RTL8211F",
303 .features = PHY_GBIT_FEATURES,
304 .config = &rtl8211f_config,
305 .startup = &rtl8211f_startup,
306 .shutdown = &genphy_shutdown,
309 int phy_realtek_init(void)
311 phy_register(&RTL8211B_driver);
312 phy_register(&RTL8211E_driver);
313 phy_register(&RTL8211F_driver);
314 phy_register(&RTL8211DN_driver);