3 bool "Bit-banged ethernet MII management channel support"
5 config MV88E6352_SWITCH
6 bool "Marvell 88E6352 switch support"
9 bool "Ethernet PHY (physical media interface) support"
12 Enable Ethernet PHY (physical media interface) support.
16 config PHY_ADDR_ENABLE
17 bool "Limit phy address"
18 default y if ARCH_SUNXI
20 Select this if you want to control which phy address is used
25 default 1 if ARCH_SUNXI
28 The address of PHY on MII bus. Usually in range of 0 to 31.
32 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
34 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
35 This currently supports BCM53125 and similar models.
44 hex "Bitmask of PHY ports"
48 config MV88E61XX_SWITCH
49 bool "Marvell MV88E61xx Ethernet switch PHY support."
53 config MV88E61XX_CPU_PORT
56 config MV88E61XX_PHY_PORTS
57 hex "Bitmask of PHY Ports"
59 config MV88E61XX_FIXED_PORTS
60 hex "Bitmask of PHYless serdes Ports"
62 endif # MV88E61XX_SWITCH
65 bool "Generic 10G PHY support"
67 menuconfig PHY_AQUANTIA
68 bool "Aquantia Ethernet PHYs support"
72 config PHY_AQUANTIA_UPLOAD_FW
73 bool "Aquantia firmware loading support"
75 depends on PHY_AQUANTIA
77 Aquantia PHYs use firmware which can be either loaded automatically
78 from storage directly attached to the phy or loaded by the boot loader
79 via MDIO commands. The firmware is loaded from a file, specified by
80 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
82 config PHY_AQUANTIA_FW_PART
83 string "Aquantia firmware partition"
84 depends on PHY_AQUANTIA_UPLOAD_FW
86 Partition containing the firmware file.
88 config PHY_AQUANTIA_FW_NAME
89 string "Aquantia firmware filename"
90 depends on PHY_AQUANTIA_UPLOAD_FW
95 bool "Atheros Ethernet PHYs support"
98 bool "Broadcom Ethernet PHYs support"
101 bool "Cortina Ethernet PHYs support"
104 prompt "Location of the Cortina firmware"
105 default SYS_CORTINA_FW_IN_NOR
106 depends on PHY_CORTINA
108 config SYS_CORTINA_FW_IN_MMC
109 bool "Cortina firmware in MMC"
111 config SYS_CORTINA_FW_IN_NAND
112 bool "Cortina firmware in NAND flash"
114 config SYS_CORTINA_FW_IN_NOR
115 bool "Cortina firmware in NOR flash"
117 config SYS_CORTINA_FW_IN_REMOTE
118 bool "Cortina firmware in remote device"
120 config SYS_CORTINA_FW_IN_SPIFLASH
121 bool "Cortina firmware in SPI flash"
126 bool "Davicom Ethernet PHYs support"
129 bool "LSI TruePHY ET1011C support"
132 bool "LXT971 Ethernet PHY support"
135 bool "Marvell Ethernet PHYs support"
138 bool "Amlogic Meson GXL Internal PHY support"
141 bool "Micrel Ethernet PHYs support"
143 Enable support for the GbE PHYs manufactured by Micrel (now
144 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
145 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
146 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
147 KSZ90x1 family support" is selected).
151 config PHY_MICREL_KSZ9021
153 select PHY_MICREL_KSZ90X1
155 config PHY_MICREL_KSZ9031
157 select PHY_MICREL_KSZ90X1
159 config PHY_MICREL_KSZ90X1
160 bool "Micrel KSZ90x1 family support"
163 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
164 enabled, the extended register read/write for KSZ90x1 PHYs
165 is supported through the 'mdio' command and any RGMII signal
166 delays configured in the device tree will be applied to the
167 PHY during initialization.
169 config PHY_MICREL_KSZ8XXX
170 bool "Micrel KSZ8xxx family support"
172 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
173 (now a part of Microchip). This includes drivers for the KSZ804,
174 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
179 bool "Microsemi Corp Ethernet PHYs support"
182 bool "National Semiconductor Ethernet PHYs support"
185 bool "Realtek Ethernet PHYs support"
187 config RTL8211E_PINE64_GIGABIT_FIX
188 bool "Fix gigabit throughput on some Pine64+ models"
189 depends on PHY_REALTEK
191 Configure the Realtek RTL8211E found on some Pine64+ models differently to
192 fix throughput on Gigabit links, turning off all internal delays in the
193 process. The settings that this touches are not documented in the CONFREG
194 section of the RTL8211E datasheet, but come from Realtek by way of the
195 Pine64 engineering team.
197 config RTL8211X_PHY_FORCE_MASTER
198 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
199 depends on PHY_REALTEK
201 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
202 This can work around link stability and data corruption issues on gigabit
203 links which can occur in slave mode on certain PHYs, e.g. on the
206 Please note that two directly connected devices (i.e. via crossover cable)
207 will not be able to establish a link between each other if they both force
208 master mode. Multiple devices forcing master mode when connected by a
209 network switch do not pose a problem as the switch configures its affected
210 ports into slave mode.
212 This option only affects gigabit links. If you must establish a direct
213 connection between two devices which both force master mode, try forcing
214 the link speed to 100MBit/s.
218 config RTL8211F_PHY_FORCE_EEE_RXC_ON
219 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
220 depends on PHY_REALTEK
223 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
224 transitions to/from a lower power consumption level (Low Power Idle
225 mode) based on link utilization. When no packets are being
226 transmitted, the system goes to Low Power Idle mode to save power.
228 Under particular circumstances this setting can cause issues where
229 the PHY is unable to transmit or receive any packet when in LPI mode.
230 The problem is caused when the PHY is configured to stop receiving
231 the xMII clock while it is signaling LPI. For some PHYs the bit
232 configuring this behavior is set by the Linux kernel, causing the
233 issue in U-Boot on reboot if the PHY retains the register value.
235 Default n, which means that the PHY state is not changed. To work
236 around the issues, change this setting to y.
239 bool "Microchip(SMSC) Ethernet PHYs support"
241 config PHY_TERANETICS
242 bool "Teranetics Ethernet PHYs support"
245 bool "Texas Instruments Ethernet PHYs support"
248 bool "Vitesse Ethernet PHYs support"
251 bool "Xilinx Ethernet PHYs support"
253 config PHY_XILINX_GMII2RGMII
254 bool "Xilinx GMII to RGMII Ethernet PHYs support"
256 This adds support for Xilinx GMII to RGMII IP core. This IP acts
257 as bridge between MAC connected over GMII and external phy that
258 is connected over RGMII interface.
261 bool "Fixed-Link PHY"
264 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
265 connection (MII, RGMII, ...).
266 There is nothing like autoneogation and so
267 on, the link is always up with fixed speed and fixed duplex-setting.
268 More information: doc/device-tree-bindings/net/fixed-link.txt